UNITED STATES PATENT AND TRADEMARK OFFICE
`
`___________________________________
`
`BEFORE THE PATENT TRIAL AND APPEAL BOARD
`
`___________________________________
`
`TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.,
`Petitioner,
`
`v.
`
`GODO KAISHA IP BRIDGE 1,
`Patent Owner.
`
`___________________________________
`
`Case No. IPR2016-01379
`Patent Number 6,197,696
`
`Before JUSTIN T. ARBES, MICHAEL J. FITZPATRICK, and
`JENNIFER MEYER CHAGNON, Administrative Patent Judges.
`
`DECLARATION OF ALEXANDER GLEW, Ph.D.
`
`IP Bridge Exhibit 2009
`TSMC v. IP Bridge
` IPR2016-01379
`Page 0001
`
`

`

`TABLE OF CONTENTS
`
`
`Page
`
`Qualifications...................................................................................................1
`I.
`II. Materials Considered.......................................................................................8
`III. Level of Ordinary Skill for the ’696 Patent...................................................10
`IV. Relevant Legal Standards ..............................................................................13
`Anticipation.........................................................................................13
`A.
`Obviousness.........................................................................................14
`B.
`Priority Date of a Patent......................................................................18
`C.
`Standard for Claim Construction in Inter Partes Review ...................19
`D.
`Background of the ’696 Patent ......................................................................20
`V.
`VI. Claim Construction........................................................................................23
`Proper construction of “using the [first resist pattern/second resist
`A.
`pattern and the mask pattern/patterned third insulating film] as a mask” (Claim
`10)
`.............................................................................................................23
`1. The exclusion of using two layers having flush edges as a
`mask is inconsistent with the understanding of a skilled person in
`view of the disclosure of the ’696 patent and the ’371 application ....27
`2. The exclusion of using two layers having flush edges as a
`mask is inconsistent with the plain and ordinary meaning in view
`of the disclosure of the ’696 patent and the ’371 application as
`understood by a person of ordinary skill in the art. ............................34
`VII. Grill Is Not Prior Art to the ’696 Patent........................................................40
`Claim 10 of the ’696 Patent is fully supported by the foreign priority
`A.
`document and is entitled to the claimed March 28, 1998 priority date ...............42
`1. Claim 10 (Preamble) – “A method for forming an
`interconnection structure, comprising the steps of:”...........................42
`2. Claim 10 (step a) – “forming a first insulating film over
`lower-level metal interconnects;”........................................................43
`3. Claim 10 (step b) – “forming a second insulating film, having
`a different composition than that of the first insulating film, over
`the first insulating film;” .....................................................................43
`
`i
`
`IPR2016-01379 Page 0002
`
`

`

`TABLE OF CONTENTS
`
`4. Claim 10 (step c) – “forming a third insulating film, having a
`different composition than that of the second insulating film, over
`the second insulating film;”.................................................................44
`5. Claim 10 (step d) – “forming a fourth insulating film, having a
`different composition than that of the third insulating film, over
`the third insulating film;” ....................................................................45
`6. Claim 10 (step e) – “forming a thin film over the fourth
`insulating film;”...................................................................................45
`7. Claim 10 (step f) – “forming a first resist pattern on the thin
`film, the first resist pattern having openings for forming wiring
`grooves;” .............................................................................................46
`8. Claim 10 (step g) – “etching the thin film using the first resist
`pattern as a mask, thereby forming a mask pattern out of the thin
`film to have the openings for forming wiring grooves;” ....................47
`9. Claim 10 (step h) – “removing the first resist pattern and then
`forming a second resist pattern on the fourth insulating film and
`the mask pattern, the second resist pattern having openings for
`forming contact holes;” .......................................................................47
`10. Claim 10 (step i) – “dry-etching the fourth insulating film
`using the second resist pattern and the mask pattern as a mask,
`thereby patterning the fourth insulating film to have the openings
`for forming contact holes;” .................................................................49
`11. Claim 10 (step j) – “dry-etching the third insulating film using
`the patterned fourth insulating film as a mask, thereby patterning
`the third insulating film to have the openings for forming contact
`holes;”..................................................................................................53
`12. Claim 10 (step k) – “dry-etching the patterned fourth
`insulating film and the second insulating film using the mask
`pattern and the patterned third insulating film as respective masks,
`thereby forming wiring grooves in the patterned fourth insulating
`film and patterning the second insulating film to have the
`openings for forming contact holes;”..................................................56
`13. Claim 10 (step l)– “dry-etching the patterned third insulating
`film and the first insulating film using the mask pattern and the
`patterned second insulating film as respective masks, thereby
`forming the wiring grooves and the contact holes in the patterned
`
`ii
`
`IPR2016-01379 Page 0003
`
`

`

`TABLE OF CONTENTS
`
`third insulating film and the first insulating film, respectively;
`and”......................................................................................................58
`14. Claim 10 (step m) – “filling in the wiring grooves and the
`contact holes with a metal film, thereby forming upper-level
`metal interconnects and contacts connecting the lower- and
`upper-level metal interconnects together.” .........................................61
`Petitioner has not shown and cannot show that Grill is entitled to the
`B.
`priority date of the Grill Provisional....................................................................62
`1. Grill includes multiple statements that were added to and not
`disclosed in Grill’s provisional ...........................................................64
`2. Dr. Smith has failed to show that the ’628 provides written
`description support for the claims of Grill ..........................................66
`VIII. Overview of Petitioner’s Prior Art References .............................................79
`Grill......................................................................................................79
`A.
`Aoyama................................................................................................80
`B.
`IX. The Combination of Grill and Aoyama and Wetzel is not obvious..............81
`Petitioner’s proposed modification of Grill eliminates Grill’s use of
`A.
`dual-relief patterns to form dual-relief cavities ...................................................83
`Petitioner’s proposed modifications of Grill would eliminate Grill’s
`B.
`control over its wiring dimensions.......................................................................90
`Grill teaches away from incorporating Aoyama’s disclosures .........102
`C.
`1. Grill teaches away from incorporating processes that expose
`carbon based compounds to wet etching or photoresist stripping,
`and ashing steps.................................................................................103
`2. Grill teaches away from incorporating processes that have a
`thick resist over via holes..................................................................108
`Conclusion ...................................................................................................111
`
`X.
`
`iii
`
`IPR2016-01379 Page 0004
`
`

`

`I, Dr. Alexander Glew, Ph.D., hereby declare under penalty of perjury under the
`
`laws of the United States of America:
`
`I.
`
`Qualifications
`
`1.
`
`I am currently President of Glew Engineering Consulting, Inc. (“Glew
`
`Engineering”) of Mountain View, California. Glew Engineering provides
`
`consulting and engineering services relating to various technology or engineering
`
`areas, including CVD technology. My responsibilities at Glew Engineering
`
`include acting as a consultant and as a principal managing the company. 1
`
`2.
`
`I received a Bachelors of Science degree in Mechanical Engineering
`
`from University of California, Berkeley in 1985; a Master of Science degree in
`
`Mechanical Engineering from University of California, Berkeley in 1987; a Master
`
`of Science in Materials Science and Engineering from Stanford University in 1995.
`
`I later also obtained a Doctor of Philosophy degree in Materials Science and
`
`Engineering from Stanford University in 2003. A copy of my Curriculum Vitae is
`
`attached to this report as Attachment A.
`
`1 All emphasis and annotations added unless otherwise noted. A list of exhibits
`
`considered is attached to this Declaration as Attachment B. Citations to the
`
`exhibits in this declaration are exemplary and are not meant to be limiting.
`
`1
`
`IPR2016-01379 Page 0005
`
`

`

`3.
`
`The subject matter of my doctoral dissertation at Stanford University
`
`related to chemical vapor deposition (“CVD”) of dielectric films. CVD generally
`
`consists of mixing two or more gases in a process reactor or chamber, and having
`
`the gases meet on the surface of a substrate to deposit a thin film. Many of the
`
`CVD films that I worked on were deposited on undoped silicon glass (SiO2), and
`
`boron and phosphorous doped glass. The CVD equipment to be manufactured in
`
`this case was to mix various gaseous chemicals and to deposit the chemicals onto
`
`glass to produce certain types of specialty glasses. For my doctoral dissertation, I
`
`constructed a CVD reactor. Then, I developed CVD processes for certain low k
`
`dielectric films such as diamond-like carbon and fluorinated amorphous carbon.
`
`Further, I characterized those thin films for their engineering properties, including
`
`optical, electrical, and mechanical. Also, I analyzed the chemical composition of
`
`the thin films.
`
`4.
`
`From 1987-1997, I was employed by Applied Materials, Inc.
`
`(“Applied Materials”), one of the world’s largest and most advanced manufacturers
`
`of, among other things, CVD-related equipment. I was hired by the CVD division.
`
`The first process tool that I worked on was the Precision 5000 CVD tool. It was
`
`the first cluster tool, a tool with multiple CVD processing chambers. Because this
`
`tool represented the major advance in tool architecture, multiple chambers attached
`
`to a central vacuum load lock chamber, resulting in the ability to process one
`
`2
`
`IPR2016-01379 Page 0006
`
`

`

`workpiece at a time instead of in batch, it was eventually placed in the Smithsonian
`
`Institute, Natural History Museum.
`
`5.
`
`From approximately 1987-1989, I was a Systems Engineer for
`
`Applied Materials. In this position, I designed semiconductor processing
`
`equipment, and worked with all aspects of the process tool. After a period of time,
`
`along with the product marketing manager, I signed off on every tool or machine
`
`that we shipped. My signature was required to ensure that the manufactured
`
`process tool and the chemical processes it produced matched what was required by
`
`the purchase order, and that it was built accordingly and safely.
`
`6.
`
`Subsequent to being a Systems Engineer, from approximately 1989-
`
`1991, I was an Engineering Manager at Applied Materials responsible for customer
`
`engineering specials (“CES”). This included customization of equipment to meet
`
`customer requests and specifications. The CES requests were diverse and covered
`
`nearly all aspects of the equipment, including modifying process chambers, gas
`
`panels, wafer handlers/robotics, wafer storage elevators, sensors, vacuum systems,
`
`framing, and other components. We worked on very tight schedules, and exercised
`
`disciplined project management. If our engineering work was not completed on
`
`time, and the materials not procured, then this would hold up the shipment of a
`
`multimillion dollar CVD process tool. Because we exercised disciplined project
`
`management, such delays rarely happened. We also had to accurately estimate the
`
`3
`
`IPR2016-01379 Page 0007
`
`

`

`cost of our work, materials and labor, because the CES projects were billed to the
`
`customer.
`
`7.
`
`Next, I was the manager of the engineering design and support group
`
`for the CVD division of Applied Materials. In this capacity, I was in charge of all
`
`of the designers and drafters, generating all of the engineering drawings, and
`
`reviewing all of the engineering design work. I am intimately familiar with
`
`computer aided design (“CAD”) and engineering documentation.
`
`8.
`
`In the early 1990s, I was awarded the position of Core Technologist
`
`(one of only 15 at Applied Materials). My area of expertise was gas and chemical
`
`systems and components. The gas and chemical systems largely delivered ultra-
`
`high purity fluids to the process chambers and reactors. Components used in the
`
`systems included the following: valves, flow controllers, pressure regulators, filters,
`
`purifiers, pressure transducers and related devices, and systems as a whole. As a
`
`core technologist, I was responsible for consulting with different divisions during
`
`the design of new products, testing fluid delivery components, reviewing invention
`
`disclosures, and reviewing papers written by Applied Materials personnel, holding
`
`meetings across the divisions for workers in the field, setting technology trends
`
`with suppliers, and reviewing technology trends with customers. Our different
`
`divisions included product lines such as CVD, ETCH, CMP, implant, TFT, and
`
`others. I also represented the company at industry consortium meetings. The core
`
`4
`
`IPR2016-01379 Page 0008
`
`

`

`technology group met monthly with the president or other senior executives of the
`
`company.
`
`9.
`
`From 1994-1996, I managed a project funded by SEMATECH
`
`(Semiconductor Manufacturing Technology—a non-profit R&D consortium to
`
`advance chip manufacturing) that I proposed to its factory working group. These
`
`efforts resulted in the publication of two SEMATECH technology transfer
`
`standards. The goal of this project was to develop industry standard methods to
`
`determine the effects of trace chemicals and contamination on semiconductor
`
`processing and on semiconductor equipment reliability. As part of this project, I
`
`designed, built, and tested gas delivery systems, including the components
`
`contained therein, such as filter cartridges or assemblies, flow controllers, valves,
`
`and pressure regulators, and tested them to failure. Approximately 90% of wafer
`
`yield loss is from particles, so the industry was very interested in the particle
`
`effects of the chemical delivery system. I also tested the effects of micro-
`
`contamination in the process gas stream on tungsten CVD deposition and on metal
`
`etching. In some of the tests, we introduced controlled amounts of fluid into
`
`corrosive gas streams, and then measured the effect on system reliability, including
`
`particle generation.
`
`10. As part of the SEMATCH project, we studied the effects of trace
`
`chemical contamination on tungsten CVD processing and on metal etching. We
`
`5
`
`IPR2016-01379 Page 0009
`
`

`

`introduced trace chemicals into a standard process, measured the amounts of
`
`chemical in the process chamber by residual gas analyzer (RGA), and then
`
`measured the resulting film quality and properties by multiple techniques, and
`
`measured incorporation of the trace chemicals into the deposited layers.
`
`11.
`
`From 1994-1997, I was a CVD Supplier Quality Engineering Manager
`
`at Applied Materials. During this time, I was the engineering manager responsible
`
`for the suppliers of the components of the fluid delivery systems, such as valves,
`
`flow controllers, pressure regulators, filters, purifiers, pressure transducers and
`
`related devices, and systems as a whole. I tested and evaluated fluid delivery
`
`components. I both supervised and personally conducted this testing.
`
`12.
`
`Since leaving Applied Materials in 1997 and until the present, I have
`
`served as president of Glew Engineering. At Glew Engineering, I have worked on
`
`projects that include for example: project turnaround for failed projects, testing /
`
`metrology, gas panel design, integrated circuits failures, semiconductor equipment
`
`failures, Excimer laser sources for photolithography, KrF and ArF. I have assisted
`
`component suppliers, and equipment suppliers, and, to a lesser extent, investors.
`
`13. My practice at Glew Engineering also includes multi-physics finite
`
`element analysis and CAD modeling, which includes three dimensional modeling
`
`of machinery, and analysis of the heat transfer, radiation, fluid flow, resultant
`
`stresses and strains from running such machinery.
`
`6
`
`IPR2016-01379 Page 0010
`
`

`

`14.
`
`I am or have been a member of a number of professional
`
`organizations including: American Society of Mechanical Engineers, Materials
`
`Research Society, and IEEE (Institute of Electrical and Electronics Engineers).
`
`Glew Engineering is an Affiliate Member of the Semiconductor Equipment and
`
`Materials Institute (SEMI). In addition to being a member of these professional
`
`organizations, I have served on committees at SEMATECH.
`
`15.
`
`I have authored or co-authored dozens of papers, reports, and
`
`presentations relating to semiconductor processing, and semiconductor equipment,
`
`fluid delivery components in semiconductor processing, and equipment reliability.
`
`16.
`
`I am an inventor of three issued U.S. Patents, Nos. 6,679,476, related
`
`to a high-purity control valve; 6,204,174, related to semiconductor processing; and
`
`7,118,090, related to a high-purity fluid control valve. I have another patent
`
`application pending relating to design of CVD equipment components.
`
`17.
`
`For more aspects of my qualifications and publications, see my
`
`curriculum vitae (“CV”), attached hereto as Attachment A.
`
`18.
`
`I have been retained on behalf of Patent Owner Godo Kaisha IP
`
`Bridge 1 (“IP Bridge” or “Patent Owner”) to offer opinions regarding certain
`
`issues relating to U.S. Patent No. 6,197,696 (“the ’696 patent”) assigned to Patent
`
`Owner, as well as other references presented to me by counsel for Patent Owner. I
`
`7
`
`IPR2016-01379 Page 0011
`
`

`

`have also been retained by Patent Owner to offer certain opinions relating to
`
`the ’696 patent in a co-pending litigation in the Eastern District of Texas.
`
`19. Glew Engineering charges an hourly rate of $665 per hour plus
`
`expenses for my work performed in connection with this Inter Partes Review. I
`
`have received no additional compensation for my work in this Inter Partes Review,
`
`and my compensation does not depend on the contents of this report, any testimony
`
`I provide, or the ultimate outcome of this or any other Inter Partes Review.
`
`II. Materials Considered
`20.
`In developing my opinions below relating to the ’696 Patent, I have
`
`considered the following materials:
`
`(cid:120) U.S. Patent No. 6,197,696 (Exhibit EX1001);
`
`(cid:120) U.S. Patent No. 6,197,696 Patent File History (Exhibit EX1012);
`(cid:120) Petition for Inter Partes Review of U.S. Patent No. 6,197,696
`(IPR2016-01379) (“Petition” or “Pet.”) (Paper No. 2);
`
`(cid:120) Patent Owner’s Preliminary Response (IPR2016-01379) (Paper
`No.6;
`
`(cid:120) Decision – Institution of Inter Partes Review (IPR2016-01379)
`(Paper No. 11) (“ID”);
`
`(cid:120) Declaration of Bruce W. Smith (IPR2016-01379) (Exhibit
`EX1002);
`
`(cid:120)
`
`Japanese Patent Application No. 10-079371 to Aoi (Exhibit
`EX1013)
`(cid:120) Certified Translation of Japanese Patent Application No. 10-
`079371 to Aoi (Exhibit EX1014)
`
`8
`
`IPR2016-01379 Page 0012
`
`

`

`(cid:120)
`
`Japanese Patent Application No. 11-075519 to Aoi (Exhibit
`EX1015)
`(cid:120) Certified Translation of Japanese Patent Application No. 11-
`075519 to Aoi (Exhibit EX1016)
`(cid:120) U.S. Patent No. 6,140,226 to Grill et al (“Grill”) (Exhibit EX1005)
`(cid:120) U.S. Provisional Patent Application No. 60-071,628 (“’628” or
`“Grill Provisional”) (Exhibit EX1017)
`(cid:120) U.S. Patent No. 5,592,024 to Aoyama et al (“Aoyama”) (Exhibit
`EX1018)
`(cid:120) U.S. Patent No. 5,920,790 to Wetzel et al (“Wetzel”) (Exhibit
`EX1019)
`(cid:120) U.S. Patent No. 3,617,824 to Shinoda et al (“Shinoda”) (Exhibit
`EX1003)
`(cid:120) U.S. Patent No. 3,838,442 to Humphreys (“Humphreys”) (Exhibit
`EX1004)
`(cid:120) U.S. Patent No. 5,635,423 to Huang et al (“Huang”) (Exhibit
`EX1006)
`(cid:120) U.S. Patent No. 5,741,626 to Jain et al (“Jain”) (Exhibit EX1007)
`(cid:120) C. Akrout et al., “A 480-MHz Microprocessor in a 0.12μm Leff
`CMOS Technology with Copper Interconnects,” IEEE J. of Solid-
`State Circuits, Vol. 33, no. 11 (November 1998) (“Akrout”)
`(Exhibit EX1008)
`J.N. Burghartz et al.,“Monolithic Spiral Inductors Fabricated Using
`a VLSI Cu-Damascene Interconnect Tech. & Low-Loss
`Substrates,” Int'l Electron Devices Mtg (Dec. 1996) (“Burghartz”)
`(Exhibit EX1009)
`(cid:120) U.S. Patent No. 6,100,184 to Zhao et al (Exhibit EX1010)
`(cid:120) U.S. Patent No. 6,103,616 to Yu et al (Exhibit EX1011)
`(cid:120) Transcript of the Deposition of Bruce W. Smith, Ph.D. (March 23,
`2017) (“Smith Dep.”) (Exhibit EX2010);
`
`(cid:120)
`
`(cid:120) Redline Comparing Grill (EX1005) with Grill’s Provisional
`(EX1017) Application (Exhibit EX2011)
`
`9
`
`IPR2016-01379 Page 0013
`
`

`

`(cid:120) Translation of Japanese Application 10-079371 to Aoi as
`Submitted in European Patent Application No. 99 105 946.0
`(Exhibit EX2012)
`(cid:120) Declaration of Takeo Ohashi, Ph.D. (Exhibit EX2013)
`Influence of reactor wall conditions on etch processes in
`(cid:120)
`inductively coupled fluorocarbon plasmas by M. Schaepkens, et al.
`(Exhibit EX2014)
`(cid:120) Handbook of VLSI Microlithography, Second Edition, Principles,
`Technology, and Applications by John N. Helbert (excerpted)
`(Exhibit EX2015)
`(cid:120) Silicon VLSI Technology Fundamentals, Practice and Modeling by
`James D. Plummer, et al. (excerpted) (Exhibit EX2016)
`(cid:120) Microlithography: Science and Technology by James R. Sheats
`and Bruce W. Smith (excerpted) [First Edition] (Exhibit EX2017)
`(cid:120) Microlithography: Science and Technology by Kazuaki Suzuki and
`Bruce W. Smith (excerpted) [Second Edition] [Ch 12] (Smith Dep.
`Exhibit 3) (Exhibit EX2018)
`(cid:120) Microlithography: Science and Technology by Kazuaki Suzuki and
`Bruce W. Smith (excerpted) [Second Edition] [Ch 11] (Smith Dep.
`Exhibit 9) (Exhibit EX2019)
`(cid:120) Silicon Processing for the VLSI Era Vol. 1 by S. Wolf and R.N.
`Tauber (excerpted) [Ch 16] (Exhibit EX2020)
`(cid:120) Mask Definition, Merriam-Webster.com (last accessed Dec.
`17,2016) (https://www.merriam-webster.com/dictionary/mask)
`(Exhibit EX3001)
`(cid:120) District Court Claim Construction, 2:16-CV-134-JRG-RSP (E.D.
`Tex.) (Exhibit EX3002)
`(cid:120) All other materials referenced herein, including those referenced in
`Attachment B.
`
`III. Level of Ordinary Skill for the ’696 Patent
`21.
`I understand that the factors that may be considered in determining the
`
`ordinary level of skill in the art include: (1) the levels of education and experience
`
`10
`
`IPR2016-01379 Page 0014
`
`

`

`of persons working in the field; (2) the types of problems encountered in the field;
`
`and (3) the sophistication of the technology. I understand that a person of ordinary
`
`skill in the art (also referred to as a “skilled person”) is not a specific real
`
`individual, but rather a hypothetical individual having the qualities reflected by the
`
`factors above.
`
`22. At least as of March 26, 1998, the foreign priority date of the ’696
`
`patent, a person of ordinary skill in the art would have had a Bachelor’s of Science
`
`degree in materials science engineering, electrical engineering, mechanical
`
`engineering, chemical engineering, or an equivalent degree, and at least two years
`
`of experience in semiconductor processing or equipment.
`
`23.
`
`I met and surpassed these criteria as of at least March 26, 1998 (and
`
`thereafter), and consider myself to be a person with at least ordinary skill in the art
`
`of the ’696 patent. My analyses set forth herein are from the perspective of a
`
`person of ordinary skill in March 26, 1998, as set forth above. My opinions would
`
`not change even if the ’696 patent is only entitled to the later priority date of
`
`March 23, 1999 (see §VII).
`
`24.
`
`I note that Dr. Smith has opined that a person of ordinary skill in the
`
`relevant art for the ’696 patent would have at least a Master of Science degree in
`
`Electrical Engineering, Materials Science, Physics, or the equivalent, a working
`
`knowledge of semiconductor processing technologies for integrated circuits, and at
`
`11
`
`IPR2016-01379 Page 0015
`
`

`

`least two years of experience in related semiconductor processing analysis, design
`
`and development. EX1002 at ¶161. Dr. Smith has further opined that “[a]dditional
`
`graduate education could substitute for professional experience, and significant
`
`work experience could substitute for formal education.” EX1002 at ¶161.
`
`I
`
`disagree with Dr. Smith that this is the appropriate level of skill in the art, but even
`
`applying Dr. Smith’s standard, my opinions herein would not change.
`
`25. Unless otherwise stated, when I state that something would have been
`
`known or understood by a person of ordinary skill in the art, I am referring to a
`
`person with the level of education and experience expressed in ¶¶21-24 above, as
`
`of March 26, 1998. As described above and in my CV (Attachment A), I have
`
`decades of experience with semiconductor devices, including the design and
`
`fabrication of memory devices. As of March 28, 1998, I had a Master degree of
`
`Science in Materials Science and Engineering, and in Mechanical Engineering, and
`
`over 10 years of industry as well as academic experience in semiconductor
`
`processing or equipment. I would have qualified as one of ordinary skill in the art
`
`according to any of the above definitions. Therefore, I am qualified to testify
`
`about what a person of ordinary skill in the art would have known and understood
`
`at that time.
`
`12
`
`IPR2016-01379 Page 0016
`
`

`

`IV. Relevant Legal Standards
`26.
`I have been informed that if an independent claim is found to be novel
`
`and non-obvious, every claim that depends from it is also novel and non-obvious.
`
`I have also been informed that if an independent claim is not found to be novel and
`
`non-obvious, the claims which depend from it may still be found to be novel and
`
`non-obvious. I understand that to be valid, a patent claim must be novel and non-
`
`obvious.
`
`27.
`
`I understand that a party challenging validity carries the burden of
`
`proving invalidity by a preponderance of the evidence on a claim-by-claim basis.
`
`Each claim is analyzed independently. It is my understanding that when a party has
`
`the burden of proving a claim or defense by a preponderance of the evidence, that
`
`party must show that it is more likely than not.
`
`A.
`28.
`
`Anticipation
`
`I also understand that a patent claim is not novel if is anticipated by a
`
`single prior art reference – that is, a single prior art reference discloses each and
`
`every element of the claim either expressly or inherently. I also understand that a
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`single reference cannot merely disclose each element. Rather, it must disclose all
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`of the elements as arranged in the claim. I further understand that for a reference to
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`“inherently” disclose something, the missing descriptive matter must necessarily
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`be present in the reference, not merely probably or possibly present, and that it
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`would be so recognized by a person of ordinary skill. I understand that if an
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`element of the claim is not disclosed by one prior art reference, then the claim is
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`not anticipated.
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`29.
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`I understand that a limitation is found inherently within a reference
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`only if that limitation is necessarily disclosed by the reference (e.g., “necessarily
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`present” in the reference). The mere fact that something may result from a given
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`set of circumstances is not sufficient to show inherency, as inherency cannot be
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`established by probabilities or possibilities.
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`Instead, there must be no other
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`possible alternative to the implementation of the feature, in view of the prior art
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`reference’s disclosure.
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`B.
`30.
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`Obviousness
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`I understand that under §103 of the patent statutes, a patent claim is
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`deemed obvious if the differences between it and the prior art are such that the
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`subject matter as a whole would have been obvious at the time the invention was
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`made to a person having ordinary skill in the art. That is, a person of ordinary skill
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`must have had a reasonable expectation of success in making or practicing the
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`claimed invention, based on the prior art. I also understand that the obviousness
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`analysis does not permit the use of hindsight. One way of avoiding a hindsight
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`analysis is to point to a suggestion or a motivation in the prior art to make or
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`practice the claimed invention.
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`31.
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`I have been informed that to render a claim obvious, a combination of
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`prior art references must disclose each and every claim element of that claim, and
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`that obviousness is a question of law (i.e., for the Board to determine) based on the
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`underlying facts. I understand that the underlying factual inquiries are: (1) the
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`scope and content of the prior art, (2) the differences between the prior art and the
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`claims at issue, (3) the level of ordinary skill in the pertinent art, and (4) secondary
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`considerations of nonobviousness. I also understand that a patent composed of
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`several elements is not proven to be obvious by simply demonstrating that each of
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`its elements was, independently, known in the prior art. Instead, I understand that
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`there must be some rationale given to support the conclusion.
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`32.
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`I have also been advised that in considering whether an invention for a
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`claimed combination would have been obvious, I may assess whether there are
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`apparent reasons to combine known elements in the prior art in the manner claimed
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`in view of interrelated teachings of multiple prior art references, the effects of
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`demands known to the design community or present in the marketplace, and/or the
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`background knowledge possessed by a person having ordinary skill in the art. I
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`understand that other principles may be relied on in evaluating whether a claimed
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`invention would have been obvious, and that these principles include the following:
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`(cid:120) A combination of familiar elements according to known methods is likely
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`to be obvious when it does no more than yield predictable results;
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`(cid:120) When a device or technology is available in one field of endeavor, design
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`incentives and other market forces can prompt variations of it, either in
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`the same field or in a different one, so that if a person of ordinary skill
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`can implement a predictable variation, the variation is likely obvious;
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`(cid:120) If a technique has been used to improve one device, and a person of
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`ordinary skill in the art would recognize that it would improve similar
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`devices in the same way, using the technique is obvious unless its actual
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`application is beyond his or her skill;
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`(cid:120) An explicit or implicit teaching, suggestion, or motivation to combine
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`two prior art references to form the claimed combination may
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`demonstrate obviousness, but proof of obviousness does not depend on or
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`require showing a teaching, suggestion, or motivation to combine;
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`(cid:120) Market demand, rather than scientific literature, can drive design trends
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`and may show obviousness;
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`(cid:120) In determining whether the subject matter of a patent claim would have
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`been obvious, neither the particular motivation nor the avowed purpose
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`of the named inventor controls;
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`(cid:120) One of the ways in which a paten