`ULSI Technology
`
`
`
`
`
`
`EDITED BY
`
`
`
`
`
`
`C. Y. Chang
`
`
`
`
`
`
`
`
`Chair Professor: College of Electrical Engineering and Computer Science
`
`National Chiaa Tang University
`
`
`
`
`Director: National Nam; Device Laboratories
`
`
`
`
`Heine-ha, flszan, ROC
`
`
`
`
`
`
`
`
`
`
`S. M. Sze
`UMC Chair Professor
`
`
`
`
`
`Department of EIecrmnic-s Engineering
`
`
`
`
`
`Dir-germ; Microelectronics and Information Systems Research Center
`
`
`
`National Chiao Tung Universin
`
`
`
`
`Hsinchn, Taiwan, ROC
`
`
`
`
`
`
`THE McGRAW-HILL COMPANIES, INC.
`
`
`
`
`
`
`
`
`San Francisco Auckland Bogotfi Caracas Lisbon
`New York St. Louis
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`London Madrid Mexico City Milan Montreal New Delhi
`
`
`
`
`
`
`
`San Juan Singapore
`Sydney Tokyo Toronto
`
`
`
`Page 1 0f 71
`
`TSMC Exhibit 1032
`
`TSMC v. IP Bridge
`IPR2016-01377
`
`Page 1 of 71
`
`TSMC Exhibit 1032
`TSMC v. IP Bridge
`IPR2016-01377
`
`

`

`g
`McGraw-Ht'll
`
`
`
`A Division of'f‘heMeGmw-Hill Companies
`
`
`
`
`
`
`ULSI TECHNOLOGY
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`Copyright ©1996 by The McGraw—Hill Companies, Inc. All rights reserved. Printed in the United
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`Slates of America. Except as permitted under the United States Copyright Act of 1976. no part of
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`this publication may be reproduced or distributed in any form or by any means, or stored in a data
`
`
`
`
`
`
`
`
`
`
`
`
`base or relrievel system. without the prior written pcrrrtission of the publisher.
`
`
`
`
`
`
`
`
`
`
`
`
`Acknowledgments begin on page 724 and appear on this page by reference.
`
`
`
`
`
`
`
`
`
`
`This book is printed on acid-free paper.
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`234567890DOCDOC909876
`
`
`
`
`iSBN 0-07-063062—3
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`'I'his book Was set in flutes Roman by Pnbiication. Services. Inc.
`
`
`
`
`
`
`
`
`
`The editors were Lynn Cox and John M. Morrirs.‘
`
`
`
`
`
`
`
`the production supervisor was Denise L. Pnryear:
`
`
`
`
`
`
`
`
`The cover was designed by Farengn Design Gmr-tp.
`
`
`
`
`
`
`
`
`Prefect supervision was done by Publication Services, inc.
`
`
`
`
`
`
`
`
`
`
`R. R. Donneliey 0‘1: Sorts Company was printer and binder:
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`Cover photo: Electron micrograph of contact holes filled with CVD tungsten plugs (see Chapter 8).
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`The diameter is 0.25 micron. Courtesy of the National Nam) Device Laboratories, Natiorm! Science
`Cmmcii. RC3. C.
`
`
`
`
`
`
`
`
`
`
`
`Library of Congress CataIOg Card Number: 95-81366
`
`
`
`Page 2 of 71
`
`Page 2 of 71
`
`

`

`CONTENTS
`
`
`
`
`
`
`List of Contributors
`
`
`
`Preface
`Introduction
`
`
`
`
`
`
`
`
`
`
`Cleanroom Technology
`
`
`
`
`
`
`H. P. Tsang and R. Jansen
`
`
`1.1
`Introduction
`
`
`1.2 Cleanroom Classification
`
`
`
`1.3 Cleanroom Design Concept
`
`
`
`1.4 Cleanroom Installation
`
`
`
`1.5 Cleanroom Operations
`
`
`1.6 Automation
`
`
`
`
`1.7 Rel atcd Facility Systems
`
`
`
`
`1.8 Summary and Future Trends
`
`References
`
`
`
`Problems
`
`
`
`
`
`
`Wafer-Cleaning Technology
`
`
`
`
`
`
`
`C. Y. Chang and T. S. Char)
`
`
`2.1
`Introduction
`
`
`
`
`
`2.2 Basic Concepts of Wafer Cleaning
`
`
`
`2.3 Wet-Cleaning Technology
`
`
`
`2.4 Dry-Cleaning Technology
`
`
`
`
`2.5 Summary and Future Trends
`
`References
`
`
`
`Problems
`
`
`
`
`
`
`
`
`
`xiii
`
`
`
`xv
`
`xvii
`
`
`
`
`
`
`1
`
`4
`
`8
`
`24
`
`
`
`
`
`
`
`
`38
`
`54
`
`55
`
`58
`
`32
`
`34
`
`
`
`
`
`60
`
`60
`
`
`
`60
`
`92
`
`93
`
`100
`
`10]
`
`104
`
`
`
`105
`
`
`
`Epitaxy
`
`
`P. Wang
`
`
`3.1
`Introduction
`
`
`
`
`3.2 Fundamental Aspects of Epitaxy
`
`
`
`
`3.3 C(mVentional Si Epitaxy
`
`
`
`
`3.4 Low-Temperature Epitaxy of Si
`
`
`
`
`
`3.5 Selective Epitaxial Growth of Si
`
`
`
`
`
`
`
`.1 [)7
`
`
`105
`
`
`
`
`
`115
`125
`131
`
`Page 3 of 71
`
`vii
`
`
`
`Page 3 of 71
`
`

`

`135
`
`
`
`138
`
`139
`
`
`143
`
`
`
`
`144
`
`viii
`
`
`
`
`Contents
`
`
`3.6
`
`3.7
`
`
`
`
`Characterization of Epitaxial Films
`
`
`
`
`Summary and Future Trends
`
`References
`
`
`
`Problems
`
`
`
`
`
`
`
`
`4 Conventional and Rapid Thermal Processes
`
`
`
`R. B. Fair
`
`Introduction
`4.1
`
`4.2
`
`4.3
`
`4.4
`
`
`
`
`
`Requirements for Thermal Processes
`
`
`
`Rapid Thermal Processing
`
`
`
`Summary and Future Trends
`
`References
`
`
`
`
`
`Problems
`
`
`
`
`
`
`
`
`5 Dielectric and Polysilicon Film Deposition
`
`
`
`H. C. Cheng
`
`Introduction
`5.1
`
`5.2
`
`5.3
`
`
`
`
`Deposition Processes
`
`
`
`
`
`151
`
`144
`
`
`
`
`159
`
`196
`
`198
`
`203
`
`
`205
`
`
`205
`
`205
`
`
`215
`
`225
`
`226
`
`240
`
`247
`
`257
`
`
`
`262
`
`264
`
`
`268
`
`
`
`Atmospheric—Pressure Chemical-Vapor—Deposited
`
`
`
`
`(APCVD) and Low—Pressure Chemical—Vapor—Deposited
`
`
`
`(LPCVD) Silicon Oxides
`
`
`
`LPCVD Silicon Nitrides
`
`
`LPCVD Polysilicon Films
`
`Plasma—Assisted Depositions
`
`
`
`Other Deposition Methods
`
`
`
`
`
`Applications of Deposited Polysilieon, Silicon Oxide,
`
`
`
`
`and Silicon Nitride Films
`
`
`
`
`
`
`
`
`
`
`Summary and Future. Toends
`
`References
`
`
`
`Problems
`
`
`
`
`5.4
`
`5.5
`
`5.6
`
`5.7
`
`
`5.8
`
`5.9
`
`
`
`
`
`
`6 Lithography
`
`
`K. Nakamum
`
`6.1
`Introduction
`
`6.2
`
`6.3
`
`6.4
`
`6.5
`
`
`
`
`Optical Lithography
`
`Electron Lithography
`
`
`X—Ray Lithography
`
`
`Ion Lithography
`
`
`
`
`
`
`2'70
`
`
`270
`
`272
`
`295
`312
`
`
`
`320
`
`Page 4 of 71
`
`Page 4 of 71
`
`

`

`
`Contents
`
`
`
`
`
`
`6.6 Summary and Future Trends
`
`References
`
`Problems
`
`
`
`
`
`7.8
`
`
`Etching
`
`
`
`
`Y. J. T. Lit
`
`
`7.1
`Introduction
`
`
`
`7.2 Low-Pressure Gas Discharge
`
`
`
`
`
`
`7.3 Etch Mechanisms, Selectivity, and Profile Control
`
`
`
`
`
`
`7.4 Reactive Plasma Etching Techniques and Equipment
`
`
`
`
`7.5
`Plasma Processing Processes
`
`
`
`
`
`
`
`7.6
`Diagnostics, End Point Control, and Damage
`
`
`
`
`7.7
`Wet Chemical Etching
`
`
`
`
`S-ununaly and Future Trends
`
`References
`
`
`
`
`
`
`
`
`
`Problems
`
`
`
`
`
`Metallization
`
`
`
`
`Introduction
`
`
`R. Lin
`
`
`8.]
`
`
`
`8.2 Metal Deposition Techniques
`
`
`
`8.3 Silicide Process
`
`
`
`
`
`
`
`
`8.4 CVD Tungsten Plug and Other Plug Processes
`
`
`
`8.5 Multilevel Metallization
`
`
`
`8.6 Metallization Reliability
`
`
`
`
`8.7 Summary and Future Trends
`
`References
`
`
`
`
`
`Problems
`
`
`
`
`
`
`
`
`Process Integration
`
`
`
`
`
`
`
`C. KLuandW ELee
`
`
`9.1 Introduction
`
`
`
`
`
`
`
`
`9.2 Basic Process Modules and Device Considerations for
`
`ULSI
`
`
`9.3
`
`9.4
`
`9.5
`
`9.6
`
`Page 5 of 71
`
`
`
`
`
`CMOS Technology
`
`Bipolar Technology
`
`BiCMOS Technology
`
`
`MOS Memory Technology
`
`
`
`
`
`
`
`ix
`
`
`323
`
`3 24
`
`
`327
`
`
`329
`
`334
`
`
`329
`
`330
`
`
`343
`353
`
`
`
`
`366
`
`367
`
`369
`
`362
`
`364
`
`
`371
`
`3'71
`
`
`
`379
`
`395
`
`406
`
`
`451
`
`
`457
`
`
`412
`
`448
`
`468
`
`
`472
`
`
`472
`
`
`473
`
`489
`
`495
`
`502
`
`
`5 l 0
`
`Page 5 of 71
`
`

`

`
`x Contents:
`
`
`
`
`
`
`
`
`
`
`9.7 Prncess Integration Considerations in ULSI lfitbricatinn
`
`
`'l'cchnnlngy
`
`
`
`
`9.8 Summary and Future Trends
`
`References
`
`
`
`Problems
`
`
`
`
`
`
`
`Assemth and Packaging
`
`
`
`TI ’fitchikmm
`
`
`10.1
`Introduction
`
`
`
`10.2 Package '1‘ypcs
`
`
`
`111.3 ULSI Assembly 'l‘ceitnulngies
`
`
`
`10.4 Package Fabrication Technologies
`
`
`
`
`
`10.5 Package Design (Iunsiclcmliuns
`
`
`
`
`
`10.6 Special Package Considerations
`
`
`
`
`111.“? Other ULSI Packages
`
`
`
`
`10.3 Summary and Future Trends
`
`References
`
`
`
`
`
`
`
`Problems
`
`
`
`
`10
`
`11
`
`
`
`
`
`
`Wafer Fab Manufacturing ’l‘cchnelugy
`
`
`
`
`
`
`T: F. Slum and I“: C. Wang
`
`
`
`
`“.1 What 15 Manufacturing?
`
`
`
`
`
`11.2 Wafer Full Manufacturing Considerations
`
`
`
`
`11.3 Munufacmring Start—Up Technology
`
`
`
`
`
`11.4 Volume Rump Up Cunsiderutiuns
`
`
`
`11.5 Continuous Improvement
`
`
`
`
`111-. Summary and l1‘uture 'I‘rends
`
`References
`
`
`
`
`
`
`
`5 I!)
`
`523
`
`525
`
`
`
`
`
`529
`
`531)
`
`
`
`531}
`
`
`
`53 l
`
`552
`
`55'?
`
`5'?3
`
`
`540
`
`
`
`
`56‘)
`
`
`530
`
`583
`
`
`
`
`
`535
`
`
`
`587
`
`
`
`
`537
`593
`
`
`(11 1‘)
`(339
`
`646
`
`
`
`
`
`652
`
`(353
`
`(:55
`
`Problems
`
`
`
`
`
`
`[2. Reliability
`
`
`
`J. '1: Hip
`12.1
`intruduetien
`
`
`
`
`
`
`
`
`12.2 lint Currier lnjectiun
`
`
`12.3 Electruntigratinn
`
`
`
`12.4 Stress Migration
`
`
`
`12.5 Oxide Breakdown
`
`
`
`
`
`
`12.6 Effect of Scaling utt Device Reliability
`
`F156
`
`1'15 6
`
`
`
`(357
`
`663
`
`
`67‘)
`
`654
`
`(1'34
`
`
`
`Page 6 of 71
`
`Page 6 of 71
`
`

`

`
`
`
`
`
`
`12.7 Relations between DC and AC Lifetimes
`
`
`
`
`
`
`12.8 Some Recent ULSI Reliability Concerns
`
`
`
`
`
`12.9 Mamematics of Failure Distribution
`
`
`
`
`
`12.10 Summary and Future Trends
`
`References
`
`
`
`Problems
`
`
`
`
`Appendixes
`
`
`
`
`
`
`A. Properties of Si at 300 K
`
`
`
`
`B. List of Symbols
`
`
`
`
`C.
`International System of Units
`
`
`
`1). Physical Constants
`
`
`
`
`
`Index
`
`
`
`Contents
`
`
`
`
`xi
`
`
`686
`
`690
`
`692
`
`696
`
`697
`
`703
`
`
`705
`
`705
`
`707
`
`709
`
`710
`
`711
`
`
`
`Page 7 of 71
`
`Page 7 of 71
`
`

`

`INTRODUCTION
`
`
`
`,-;~__1;r_'/_'.:!_E='_
`
`'
`
`'
`
`.
`
`_ _ _
`
`_
`
`
`
`
`GROWTH OF THE INDUSTRY
`
`
`
`
`
`
`
`
`
`
`
`
`
`The'United States has the largest electronics industry in the world, with a global
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`market share of over 40%. Since 1958, the beginning of the integratcdseircuit [1(3)
`
`
`
`
`
`
`
`
`
`
`
`era, the factory sales of electronic products have increased by about thirty times [see
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`Fig. 1 , curve (o)"2]. Electronics sales. which were $303 billion in 1993. are projected
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`to increase at an average annual rate of 8.5% and reach a half-trillion-dollar level by
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`the year 2000. In the same period, the [(3 market itself has increased at an even
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`higher rate [see Fig. 1, curve (mutt: 'lC. sales in the United States were $28 billion
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`in 1993 and are expected to grow by 13% annually. reaching $65 billion by the
`
`
`
`
`
`
`
`
`
`
`
`
`year 9.000. The main irnpetuses for such phenomenal market growth are the intrinsic
`
`
`
`
`
`
`
`
`
`
`
`pcrvasivencss of electronic products and the continued technological breakthroughs
`
`
`
`
`
`in integrated Circuits.
`
`
`
`
`
`
`The world markets of electronics and semiconductor industries will grow at
`
`
`
`
`
`
`
`
`
`
`
`
`
`comparable rates. Figure 2 shows the 1993 world electronics industry with a global
`
`
`
`
`
`
`
`
`
`
`
`
`sales volume of $679.7 billion. Also shown are the market shares of the six major
`
`
`
`
`
`
`
`
`
`
`
`
`electronics applications: computer and peripherals equipment at 32.3%. consumer
`
`
`
`
`
`
`
`electronics at21.2%, telecommunication equipment. at 16.5%. industrial electronics
`
`
`
`
`
`
`
`
`
`
`
`
`
`at 14.3%. defense and space at 11.5%, and transportation at 4.2%. By the year 2000,
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`the world electronics industry is projected to reach $1200 billion. which will surpass
`
`
`
`
`
`
`
`
`
`
`
`the automobile. chemical, and steel industries in sales volume.
`
`
`
`
`
`
`
`
`Figure 3 shows the 1993 world semiconductor industry, with total sales of $85.6
`
`
`
`
`
`
`
`
`
`
`
`
`billion. Only 14% is related to optoelectronics and discrete semiconductor devices.
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`1C sales constitute 86% of the total volume, with the largest segment being memory
`
`
`
`
`
`
`
`
`
`
`
`
`[C3, followed by microprocessor and microcontroller units, logic ICs. and analog le.
`
`
`
`
`
`
`
`
`
`
`
`
`
`in 2000, the semiconductor industry is projected to reach $200 billion, with over
`
`
`
`
`
`
`
`
`
`$170 billion in integrated circuits.
`
`
`
`
`
`
`
`
`
`Figure 4 shows the market shares of the three major 1C groups: MOS FE’I', bipo-
`
`
`
`
`
`
`
`
`lar transistor, and le made from III—V compound semiconductors.-1 At the begin-
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`ning of the 1C era, the 1C market was broadly based on bipolar transistors. However,
`
`
`
`
`
`
`
`
`
`
`
`because of the advantages in device miniaturization, low power consumption. and
`
`
`
`
`
`
`
`
`
`
`
`high yield, sales volume of MOS-based [Cs has increased steadily and in 1993
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`amounted to 75% of the total 10 market. By the year 2000, MOS le will capture the
`
`
`
`
`
`
`
`
`
`
`largest n-iarkct share (88%) of all le sold. This book, therefore, emphasizes MOS—
`
`
`
`
`
`
`
`
`l‘elated ULSl technology.
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`""Tlterc were only two years in which [he growths were negative: in 1074. due to the Middle Fast oil
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`embargo. and in 1085. due to overproduction ol' personal computers.
`
`
`
`xvii
`
`
`
`Page 8 of 71
`
`Page 8 of 71
`
`

`

`(a) Factory sales
`.
`of electronics
`
`(1)) Integrated
`circuits
`
`
`
`xviii
`
`
`
`Introduction
`
`
`
`l 0000
`
`
`
`I
`
`
`
`0.1
`
`
`
`“a”
`.9.
`
`
`
`a3
`
`
`‘3,
`
`
`
`
`
`
`
`
`
`33
`‘13
`no
`
`[00 10
`
`
`
`
`
`
`
`
`
`
`
`
`Invention
`of
`
`transistor
`i
`
`0.0L
`
`1930
`
`
`
`
`
`l940
`
`
`
`1950
`
`
`
`1960
`
`
`
`1980
`
`
`
`] 990
`
`
`
`
`
`2000
`
`
`
`1970
`
`
`Year
`
`FIGURE 1
`
`
`
`
`
`
`
`
`
`
`
`(a) Factory sales of electronics in the United States for the 64 years between
`
`
`
`
`
`
`
`
`
`
`
`
`
`1930 and 1993 and projected to 2000. (b) Integrated circuit market in the
`
`
`
`
`
`
`
`
`
`
`
`
`United States for 32 years between 1962 and 1993 and projected to 2000.
`
`
`
`
`
`
`
`
`
`(After Refs. 1' and 2.)
`
`
`
`
`DEVICE MINIATURIZATION
`
`
`
`
`
`
`
`
`
`
`
`
`
`Figure 5, curve (a), shows the rapid growth in the number of components per MOS
`
`
`
`
`
`
`
`
`
`
`
`
`memory chip.‘“5 Note that the MOS 1C complexity has advanced from small-scale
`
`
`
`
`
`
`
`
`integration (881),
`to medium-scale integration (M31), to large-scale integration
`
`
`
`
`
`
`
`
`
`
`(LSI), to very-large-scale integration (VLSI), and finally to ultraiarge-scale integra-
`
`
`
`
`
`
`
`
`
`
`
`
`tion (ULSI), which has 107 or more components per chip. We note that since 1975
`
`
`
`
`
`
`
`
`
`
`
`
`
`the growth has been maintained at a rate of about 40% annually: in other words, the
`
`
`
`
`
`
`
`
`
`
`
`
`Page 9 of 71
`
`Page 9 of 71
`
`

`

`Transporlation
`
`Introduction
`
`
`
`xix
`
`l 5%
`
`
`
`Compulem & peripherals
`
`
`equipment 32.3%
`
`
`
`Industrial electronics
`
`I 4.3%
`
`
`
`
`
`
`
` Defense, space i
`
`Telecommunication
`
`
`
`
`equipment 16.5%
`
`
`
`Consumer electronics 2 | 2%
`
`
`
`FIGURE 2
`
`
`
`
`
`
`1993 world electronics industry. (Afler Daraqnest. [994.)
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`number of components has doubled every two years. At this rate, over 100 million
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`components per chip will be available before the year 2000; in the early 2] st century
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`We will move into the gigabit range, with IC chips having more than one billion
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`componentsfi” Also shown in Fig. 5 is the growth of the number of components for
`
`
`
`
`
`
`
`
`
`
`
`
`
`bipolar, MESFET, and MODFET 103. They are about two orders of magliitudelower
`
`
`
`
`
`
`in complexity compared with MOS—based ICS.
`
`
`
`
`
`
`
`
`
`
`
`
`The most important factor in achieving the ULSI complexity is the continued
`
`
`
`
`
`
`
`
`
`
`
`
`
`reduction of the minimum device—feature length {see Fig. 6, curve (50]. Since 1960,
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`the animal rate of reduction has been 13%, which corresponds to a reduction by a
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`factor of two every six years. At this rate, the minimum feature length will shrink
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`from its present length of 0.5 pm to 0.2 pm in the year 2000. The junction depth of
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`the source and drain junctions. and the gate oxide thickness are also being reduced
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`at a similar rate as shown in curves (b) and (c) of Fig. 6, respectively.
`
`
`
`
`
`
`
`
`
`
`
`
`The reduction of the device feature length and related dimensi‘ous has resulted
`‘
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`1n reduced overall device size and unit price per function. Figure 7 shows the relative
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`Price and size reductions.B In the past fifty years, prices have gone down by 100
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`million times, and the size has been reduced by a factor of one billion. By 2000 the
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`Pficc per hit is expected to be less than 0.1 mfllieent for a 64-megabit. memory chip.
`
`
`
`
`
`
`
`
`
`
`
`
`Similar price reductions are expected for logic 105. Additional benefits from device
`
`Page 10 of 71
`
`Page 10 of 71
`
`

`

`xx
`
`
`
`Introduction
`
`
`
`
`
`
`
`Opluclcctronics
`
`
`
`
`Memory [C
`
`28 5%
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`[8.796
`
`Logic 1C
`
`MPU, CPU
`
`
`24.5%
`
`
`
`
`FIGURE 3
`
`
`
`1993 world semiconductor industry. (Afler DataquesIJ 994.)
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`World IC market (1980—2000). (After Zdebef, R43.)
`
`
`
`
`
`
`Page 11 of 71
`
`Page 11 of 71
`
`

`

`
`
`
`
`
`
`
`
`
`Introduction
`
`
`
`
`and
`
`
`
`
`
`
`
`
`
`UL51
`
`
`
`7
`
`mm
`
`
`
`
`
`l 9!
`"
`
`MSI
`
`
`
`*
`
`
`
`831
`
`to) MOSFEI' (DRAM) to1
`
`3»
`
`
`
`w
`
`
`103 '
`
`
`
`IU‘
`
`(diMODFE'l'
`
`or) MFSFIET
`
`.
`.
`(h) Bipolar Irnrtsmtm'
`
`
`
`
`
`
`
`H)“
`
`
`
`
`
`
`
`It)"
`
`3g
`
`
`
`Ou
`
`toJ:
`
`{J
`
`
`a I05
`
`
`
`E-
`
`
`
`
`l
`
`|96<l
`
`
`
`mo
`
`
`
`i980
`
`
`
`Year
`
`
`
`1990
`
`
`
`2000
`
`
`
`-
`
`2010
`
`FIGURE. 5
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`(fl!) Exponential growth of the number of components per MOS 1C chip. (After
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`ii’l'oomr Ref. 4. and Myers. Ref. 5. ) (b). (c). and (if) Components per chip versus
`
`
`
`
`
`
`
`
`
`year for bipolar. MESFET. and MODFET ICs. respectively.
`
`
`
`
`
`
`
`
`
`
`
`miniaturization include improvement of device speed (which varies inversely with
`
`
`
`
`
`
`
`
`
`
`lhe device feature length) and reduction of power consumption (which varies ap-
`
`
`
`
`
`
`
`
`
`
`
`
`
`Droximutely with the square of the feature length). Higher speeds lead to expanded
`
`
`
`
`
`
`
`
`
`
`
`
`1C functional throughput rates, so that future ICs can perform data processing, nu-
`
`
`
`
`
`
`
`
`
`
`
`merical computation. and signal conditioning at 100 and higher gigabit-per-secood
`
`
`
`
`
`
`
`
`
`
`
`
`
`rates.9 Reduced power consumption results in lowering the energy required for each
`
`
`
`
`
`
`
`
`
`SWitehing operation- Since 1960 the required energy, called the power-delay prod-
`
`
`
`
`
`
`
`
`uct. has decreased by six orders of :ttagnitude.m
`
`
`
`
`
`
`
`ORGANIZATION OF THE BOOK
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`“glut: 8 shows how the 12 chapters of this book are organized. Chapter 1 considers
`
`
`
`
`
`
`
`
`
`
`
`cleillll‘ooin technology. The continued miniaturization in ULSI devices implies more
`
`
`
`Page 12 of 71
`
`Page 12 of 71
`
`

`

`xxii
`
`
`
`
`Introduction
`
`30
`
`
`
`
`
`
`
`
`
`
`
`
`Lengthortomes:
`
`
`
`tum) 0"
`
`to
`
`
`
`
`
`0.0]
`
`
`(b) Junction
`depth
`
`(0} Gate oxide
`
`
`thickness
`
`
`
`
`
`
`
`(43% reduction per year)
`
`
`
`1000M
`
`
`“1005
`
`Icon
`
`
`
`
`
`40*
`2000
`
`
`[L004
`
`1960
`
`
`
`1970
`
`
`
`I930
`
`Your
`
`
`1990
`
`
`
`
`
`FIGURE 6
`
`
`
`
`
`
`
`
`
`
`
`Exponential decrease of (a) minimum feature length. to} junction depth. and
`
`
`
`
`
`
`to) gate oxide thickness of MOSFEI‘.
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`stringent requirements with respect to contamination control. Without an ultraclean
`
`
`
`
`
`
`
`
`processing environment. ULSI circuits simply cannot be realized."
`
`
`
`
`
`
`
`
`
`ULSI technology is synonymous with silicon ULSl technology. The unique
`
`
`
`
`
`
`
`
`
`
`combination of silicon’s adequate bandgap. stable oxide. and abundance in nature
`
`
`
`
`
`
`
`
`
`
`
`
`ensures that in the foreseeable future no other semiconductor will seriously chal-
`
`
`
`
`
`
`
`
`
`
`lenge its preeminent position in ULSI applications. Some important properties of
`
`
`
`
`
`
`silicon are listed in Appendix A.
`
`
`
`
`
`
`
`
`
`
`
`
`
`Once the silicon wafers are in the cleanroom. we enter into the wafer-processing
`
`
`
`
`
`
`
`
`
`
`
`sequence, described in Chapters 2 through 8 and depicted in the wafer-shaped cen-
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`tral circle of Fig. 8. Each of these chapters considers a specific process step. Of
`
`
`
`
`
`
`
`
`
`
`
`
`
`course. many processing steps are repeated many times in IC fabrication: for exam-
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`ple, lithography and etching steps may be repeated 10 to 20 times. In 01.8] tech-
`
`
`
`
`
`
`
`
`
`
`nology the wafer-cleaning technology is as important as the cleanmom technology.
`
`
`
`
`
`
`
`
`
`
`
`
`Without a contamination-free wafer surface, the iCs will suffer from low yield and
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`poor reliability. Because of limitations on the total length of the book. many clas-
`
`
`
`
`
`
`
`
`
`
`
`
`sic topics. such as crystal growth. oxidation, diffusion. and ion implantation. are
`
`
`
`
`
`
`
`
`
`
`
`
`
`only lat-Elly mentioned. The reader may consult textbooks on VLSI technology for
`
`details.
`
`
`
`
`
`
`
`
`
`
`
`
`
`The individual processing steps described in Chapters 2 through 8 are com-
`
`
`
`
`
`
`
`
`
`
`
`
`bined in Chapter 9 to form devices and integrated circuits. Chapter 9 considers the
`
`
`
`
`
`
`
`
`
`
`fundamental building process modules and four important [C families: CMOS (com-
`
`
`
`
`
`
`
`
`
`
`plementary MOSFET). bipolar iCs. BiCMOS (a combination of bipolar and CMOS).
`
`
`
`
`
`
`
`
`
`
`Page 13 of 71
`
`Page 13 of 71
`
`

`

`
`
`Introduction xxiii
`
`
`
`104
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`Election tube —~l
`
`
`l
`
`Standard lube
`
`
`
`
`
`
`
`or“
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`Relativevalue
`
`.1;
`
`.— o
`
`5
`
`l.
`
`
`
`
`
`
`
`
`1930
`
`
`1940
`
`
`
`1950
`
`
`
`1 960
`
`
`Year
`
`
`[970'
`
`
`1930
`
`
`
`1990
`
`
`
`2000
`
`
`
`_
`FIGURE 7
`
`
`
`
`
`
`
`
`
`
`
`Price and size reduction of active electronic compents. (After Sharia, Ref: 8.)
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`and M08 memory ICs. After the completely processed wafers are tested, the se chips
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`that pass the tests are ready to be packaged. Chapter 10 describes the assembly and
`
`
`
`
`
`
`
`
`
`
`
`packaging of ULST chips. Chapter 11 considers the manufacturing technology, that
`
`
`
`
`
`
`
`
`
`
`
`
`IS, the strategy and logistics to implement various technologies to produce ULSI
`
`
`
`
`
`
`
`
`
`
`
`
`chips that meet customers” specifications in a timely fashion and to generate ade-
`
`
`
`
`
`
`
`
`
`
`
`
`quate return on investment for the IC manufacturer. Chapter 12 describes a multi-
`
`
`
`
`
`
`
`
`
`
`
`
`
`tude of reliability issues related to ULSI processes. As device dimensions move to
`
`
`
`
`
`
`
`
`the sub—half-micron and sub-quarter—micmn regime, ULSI processing becomes more
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`automated. resulting in tighter control of all processing parameters. At every step of
`
`
`
`
`
`
`
`
`
`
`Pl‘Oduction, from wafer cleaning to device packaging, numerous requirements are
`
`
`
`being imposed to improve the device performance and reliability.
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`To keep the notation simple in this book, we sometimes found it necessary to use
`
`
`
`
`
`
`
`
`
`
`
`
`‘1 Sl’mbol more than once. with different meanings. However, within each chapter a
`
`Page 14 of 71
`
`Page 14 of 71
`
`

`

`
`
`
`
`a.5538@533.
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
` 8.BEES9.39.523EEEI83.3.5»
`
`33%.:882.—
`
`
`
`
`
`
`
`
`
`
`
`
`an.35293233
`
`
`
`anhflnnfivbaufim
`
`
`
`
`
`
`
`3.3955“,
`
`
`
`
`
`
`
`
`
`39:newEcuaurno‘u
`
`
`
`
`
`§=§3".5unusua—?3:...“an@3808.“€5.36
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`£93£5moconga—“maca55qu
`
`
`
`
`
`
`
`xxiv
`
`
`
`Page 15 of 71
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`A_“3&5”Rosina"52.3.0
`
`
`
`noEmofi—uEE
`
`
`
`wagon—Hm..—
`
`
`
`mfiflm—
`
`
`
`50:3?qu
`
`
`
`
`
`
`
`
`
`
`
`Page 15 of 71
`
`
`

`

`Introduction
`
`
`
`xxv
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`symbol has only one meaning and is defined the first time it appears. Many symbols
`
`
`
`
`
`
`
`
`
`
`
`
`do have the same or Similar meanings 9011315161111)! throughout this book; they ate
`
`
`
`
`summzu‘ized in Appendix Hf“
`
`
`
`
`
`
`
`
`
`
`
`
`ULSl technology is presently moving at a rapid pace. The number of ULSI pub-
`
`
`
`
`
`
`
`
`
`
`
`
`
`lications has doubled every year since 1990. the beginning of the ULSI era. Many
`
`
`
`
`
`
`
`
`
`
`
`topics, such as lithography, rapid thermal processing, and metallization, are still 1m-
`
`
`
`
`
`
`
`
`
`
`
`der intensive study. Their ultimate capabilities are not fully understood. The material
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`presented in this book is intended to serve as a foundation. The references listed at
`
`
`
`
`
`
`
`
`
`the end of each chapter can supply more information.
`
`
`
`
`
`
`
`
`
`
`REFERENCES
`
`l.
`
`
`
`2.
`
`
`
`
`
`.
`
`
`9.
`
`10.
`
`
`12.
`
`
`
`
`
`
`
`
`
`
`
`[994 Eileen-win: Malice! Data Book, Electronic Industries Association, Wash—
`
`
`
`ington, DC, 1994.
`
`
`
`
`
`
`
`
`I 994 Annual Report ofb'emicortdacmr Industry, Industrial Technology Research
`
`
`
`
`
`Institute, Hsinchu, Taiwan. ROC, 1994.
`
`
`
`
`
`
`
`
`
`
`1’. J. Zdebel, “Current Status ol'IIigh Performance Silicon Bipolar Technology,”
`
`
`
`
`
`
`
`
`
`
`14m Annual IE‘EE GaAs [C Sir-mp. Tech. Digest, 15 (1992).
`
`
`
`
`
`
`
`
`
`
`
`
`. G. Moore, “VLSI, What Does the Future Hold," Electron Attst..42, 14 (1980).
`LII-L‘-
`
`
`
`
`
`
`
`
`
`
`
`
`
`. W. Myers, “The Drive to the Year 11000," IEEE Micro, 11, 10 (1991).
`
`(i. P. K. Chatterjce and G. B. l..arrabec, “Gigabit Age Microelectronics and Their
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`Manufacture,” IEEE Trans. VLSI SystJ, 7‘ (I993).
`
`
`
`
`
`
`
`
`
`
`
`
`
`. K. Mori, H. Yamada, and S. Takimwa, “System on Chip Age," Proceedings of
`
`
`
`
`
`
`
`
`
`the Intentt'ttionnl Symposium on V1.5! technology. Systems, and Applications,
`
`
`1115 ( 1993).
`
`
`
`
`
`
`
`
`
`
`
`. K. Shoda, “Home Electronics in the 1990s,” Proceedings oj'the [rttet‘f'taffoflal
`
`
`
`
`
`
`
`
`Symposimn on VLSI Recitattiogy. Systems, ctnd/ipplfcations. '1(l991).
`
`
`
`
`
`
`
`
`
`
`H. Komiya, M. Yoshimoto, and H. Ishikura, “Future Technological and Eco-
`
`
`
`
`
`
`
`
`
`
`nontic Prospects for VLSI,” [EICE Trans. Electron. E76-C, 1555 (1993).
`
`
`
`
`
`
`
`
`
`
`
`
`R. W. Keyes, “Limitations of Sma11 Devices and Large Systems,” in N. 0. Bio-
`
`
`
`
`
`
`
`
`
`
`
`
`spruch, Ecl., VLSI Electronics, Academic, New York, 1981, Vol. 1, p. 186.
`
`11. T. Ohlni, “ULSI Reliability through Ultraclean Processing," Proc. IEEE, 81,
`
`
`
`
`
`
`
`
`
`
`
`716 (1993).
`
`
`
`
`
`
`
`
`
`
`
`FOI' example. 5. M. 820, lid, VLSI fictitiology, 2nd Ed, McGraw-Hilt, New
`
`
`York, I988.
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`‘-—.____.__—
`
`*Alsn included are the lnternatnnml System ot‘ Units (Appendix C) and Physical Constants [Ap-
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`pendix D),
`
`Page 16 of 71
`
`Page 16 of 71
`
`

`

`
`CHAPTER ti
`
`
`
`“ L
`
`
`ithography
`
`
`K. Nakamura
`
`
`
`6.1
`
`
`INTRODUCTION
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`Lithography is a kind of art made by impressing, in turn, several flat embossed slabs,
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`each covered with greasy ink of a particular color, onto a piece of paper. The Visions
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`colors or levels must be accurately aligned with respect to one another within some
`
`
`
`
`
`
`
`
`
`
`
`
`
`registration tolerance. Many “originals” can be made from the same slabs as long as
`
`
`
`
`
`the quality remains adequately high.
`
`
`
`
`
`
`
`
`
`
`
`
`
`Several methods can be used to make ULSI circuit patterns on wafers, as shown
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`in Fig. la. The most common process is to make the master photomask using an elec-
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`tron beam exposure system and replicating its image by optical printers, as shown in
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`Fig. 1b. The exposing radiation is transmitted through the “clear” part of a mask. The
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`opaque part of the circuit pattern blocks some of the radiation. The resist, which is
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`sensitive to the radiation and has resistance to the etching, is coated on the wafer sur-
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`face. The mask is aligned within the required tolerance on the wafer; then radiation
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`is applied through the mask, the resist image is developed, and the layer underneath
`
`
`
`
`the resist is etched.
`
`
`
`
`
`
`
`
`
`
`Therefore, lithography for integrated circuit manufacturing is analogous to the
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`lithography of the art world. The slabs correspond to masks for the various circuit
`
`
`
`
`
`
`
`
`
`
`
`
`
`levels. The press colresponds to the exposure system, which not only exposes each
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`level but also aligns it to a completed level. The ink may be compared to either the
`
`
`
`
`
`
`
`
`
`
`
`
`exposing radiation or the radiation-sensitive resist; the paper can represent the wafer
`
`
`
`
`
`
`
`
`
`
`
`
`
`into which the pattern will be etched, using the resist as a stencil.
`
`
`
`
`
`
`
`
`Lithography is the key technology in semiconductor manufacturing, because
`
`
`
`
`
`
`
`
`
`
`
`
`
`it is used repeatedly in a process sequence that depends on the device design. It
`
`
`
`
`
`
`
`
`
`
`
`determines the device dimensions, which affect not only the device’s quality but
`
`
`
`
`
`
`
`also its product amount and manufacturing cost.
`
`
`
`
`
`
`270
`
`Page 17 of 71
`
`Page 17 of 71
`
`

`

`
`
`
`
`gammanofiurufl
`
`
`
`
`
`
`
`
`
`
`
`
`
`scam?“mummaxmluv
`
`
`
`35383.0I.wE
`-IIIIIIIII-
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`8.:qu532:2.wiEuéw‘ua."r
`
`
`
`3V3
`
`
`
`“.32
`
`
`
`
`
`:mauu$5
`
`
`
`EufionomEgan—
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`.mmuooumgougingWEEDQ:.515Ho.“mmuocaomamfimofifi3.nonammflonumEnsumofi:02quuHEDGE
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`Page 18 of 71
`
`
`271
`
`Page 18 of 71
`
`
`

`

`
`
`272 ULSI Technology
`
`
`
`6.2
`
`
`
`OPTICAL LITHOGRAPI‘IY
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`Optical lithography comprises the formation of images with visible or ultravimet
`
`
`
`
`
`
`
`
`
`
`
`
`radiation in a photoresist using proximity or projection printing. Two methods are
`
`
`
`
`
`
`
`
`
`
`
`
`available to make masks for optical lithography: electron beam exposure and laser
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`beam scanning. These are described in the next section. In the 1970s, the major tech‘
`
`
`
`
`
`
`
`
`
`
`nology was the combination of a negative resist and proximity printing. At presmu
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`the most common method is the combination of a positive resist attd a stepper. Haw,
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`ever, proximity printing is still used because of its convenience and low cost.
`
`
`
`
`
`Table 1 lists examples of commercially available optical printers" designed to
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`manufacture ULSl circuits. These machines are Classified into three groups: prom
`
`
`
`
`
`
`
`
`
`
`
`imity. reflective projection, and refractive projection. The key parameters such as
`
`
`
`
`
`
`
`
`
`
`numerical aperture (NA), depth of focus (DOF). resolution (usable linewidth), ovej-_
`
`
`
`
`
`
`
`lay accuracy, and throughput are also listed.
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`The most advanced ULSl has a minimum feature size of 0.3 pm to 0.4 ptm1
`
`
`
`
`
`
`
`
`
`
`
`
`which has been reported by several organizations in 64—Mbit dynamic random access
`
`
`
`
`
`
`
`
`
`
`
`
`
`memories (DRAMs). It is believed that the linewidth limit of optical lithography ties
`
`
`
`
`
`
`
`
`
`
`
`
`
`near 0.2 pm using phase-shifting masks combined with a high numerical aperture
`
`
`
`
`
`
`
`
`
`
`
`projector and a short—wavelength light source. The performances of the machines
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`listed in Table 1 are very close to the resolution limit of optical lithography.
`
`
`
`
`
`6.2.1 Contact and Proximity Printing
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`Contact and proximity printings are relatively simple because they do not have any
`
`
`
`
`
`
`
`
`
`
`
`
`means of image formation between masks and wafers. A typical contact or proxim-
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`ity mask aligner consists of a light source, a condenser, a filter. a mirror, a shutter.
`
`
`
`
`
`
`
`
`
`
`
`
`
`the wafer stage, and the alignment microscope. In contact printing, a photomask is
`
`
`
`
`
`
`
`
`
`
`
`
`pressed against the resist-covered wafer, with pressures typically in the range of 0.05
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`atm to 0.3 atm, and is exposed by light with a wavelength near 400 nm. Very high
`
`
`
`
`
`
`
`
`
`
`
`resolution of less than 0.5 pm iinewidth is possible, but because of spatial nonuni-
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`formin of the contact, resolution may vary considerably across the wafer. To provide
`
`
`
`
`
`
`
`
`
`
`
`
`
`better contact over the whole wafer, a thin (0.2 mm) flexible mask has been used;
`
`
`
`
`
`
`
`
`
`
`
`02-pin space patterns have been formed by using 3—ttm—thick PMMA (poly—methyl
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`methacrylate) resist and 200 to 260 urn radiation.2 Quartz or A1203 mask substrates
`
`
`
`
`
`
`
`
`
`
`
`
`must be used to pass these shorter wavelengths, since the usual borosilicate glass
`
`
`
`
`
`
`
`
`
`strongly absorbs wavelengths less than 300 nm.
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`Contact printing produces defects in both the mask and the wafer while the two
`
`
`
`
`
`
`
`
`
`
`
`
`
`are in contact and as they are separated from each other, so that the mask, whether
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`thick or thin. may have to be replaced after a short period of use. Nevertheless. con“
`
`
`
`
`
`
`
`
`
`
`
`
`tact printing is still widely used. It is the mos