`
`BEFORE THE PATENT TRIAL AND APPEAL BOARD
`
`Taiwan Semiconductor Manufacturing Company, Ltd.
`
`Petitioner
`
`V.
`
`Godo Kaisha IP Bridge 1
`
`Patent Owner
`
`Patent No. 6,197,696
`
`Filing Date: March 23, 1999
`Issue Date: March 6, 2001
`
`Title: METHOD FOR FORMING INTERCONNECTION STRUCTURE
`
`Inter Partes Review No. IPR2016-01377
`
`DECLARATION OF DR. BRUCE W. SMITH, PH.D.
`IN SUPPORT OF PETITION FOR INTER PARTES REVIEW OF UNITED
`
`STATES PATENT NO. 6,197,696
`
`Page 1 of 156
`
`TSMC Exhibit 1002
`
`
`
`TABLE OF CONTENTS
`
`I.
`
`II.
`
`III.
`
`Introduction ............................................................................................... .. 1
`
`Summary of Opinions ................................................................................ .. 1
`
`Background and Qualifications .................................................................. .. 2
`
`A.
`
`B.
`
`C.
`
`Background ...................................................................................... .. 2
`
`Previous Expert Witness Experience ................................................ .. 3
`
`Compensation .................................................................................. .. 3
`
`IV.
`
`Materials Reviewed ................................................................................... .. 4
`
`Legal Standards ......................................................................................... .. 6
`
`A.
`
`B.
`
`Anticipation ..................................................................................... .. 7
`
`Obviousness ..................................................................................... .. 8
`
`VI.
`
`Technological Background ........................................................................ .. 12
`
`A.
`
`B.
`
`Integrated Circuits and Interconnections ......................................... ..12
`
`Semiconductor Etching and Photolithography ................................ .. 16
`
`VII.
`
`The ’696 Patent ......................................................................................... ..19
`
`A.
`
`Description of the Challenged Claims ............................................. ..l9
`
`1.
`
`2.
`
`3.
`
`Claim 10 ............................................................................... ..l9
`
`Claim 11 ............................................................................... ..48
`
`Claim 12 ............................................................................... ..50
`
`B.
`
`Japanese Patent Application No. 10—079371 does not disclose
`many elements of claims 10-12 ...................................................... ..53
`
`VIII.
`
`Level of Ordinary Skill in the Art ............................................................. ..62
`
`IX.
`
`Claim Construction ................................................................................... ..63
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`Page 2 of 156
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`
`
`X.
`
`Analysis .................................................................................................... ..63
`
`A.
`
`B.
`
`C.
`
`Grill (U.S. Patent No. 6,140,226) .................................................... ..63
`
`Aoyama (U.S. Patent No. 5,592,024) .............................................. ..70
`
`The combination of Grill and Aoyama ............................................ ..71
`
`D.
`
`Grill and Claim 10 .......................................................................... ..76
`
`E.
`
`F.
`
`G.
`
`H.
`
`1.
`
`Grill and Claim 11 .......................................................................... ..96
`
`The combination of Grill and Aoyama and Claim 10 ...................... ..97
`
`The combination of Grill and Aoyama and Claim 11 .................... ..115
`
`The combination of Grill and Aoyama and Claim 12 .................... ..116
`
`Other combinations for claim 11 ................................................... .. 121
`
`Page 3 of 156
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`ii
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`
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`I, Dr. Bruce W. Smith, Ph.D., declare as follows:
`
`I.
`
`Introduction
`
`1.
`
`My name is Dr. Bruce W. Smith. I have been asked to submit this
`
`declaration on behalf of Taiwan Semiconductor Manufacturing Company, Ltd.
`
`(“TSMC” or “Petitioner”) in connection with a petition for inter partes review of
`
`U.S. Patent No. 6,197,696 (“the ’696 patent”).
`
`2.
`
`I have been retained as a technical expert by TSMC to study and
`
`provide my opinions on the technology in and the validity of claims 10-12 in the
`
`’696 patent (“the Challenged Claims”).
`
`I have also been asked to provide my
`
`opinions as to whether certain related applications provide support for the
`
`Challenged Claims and whether a certain prior art reference is supported by the
`
`disclosures of its provisional application.
`
`II.
`
`Summary of Opinions
`
`3.
`
`Based on my experience, knowledge of the art at the relevant time,
`
`analysis of prior art references, and the broadest reasonable interpretation of the
`
`claims in light of the specification, it is my opinion that the Challenged Claims of
`
`the ’696 patent are obvious over the prior art references discussed below.
`
`4.
`
`Based on my experience, knowledge of the art at the relevant time,
`
`and the broadest reasonable interpretation of the claims in light of the specification,
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`Page 4 of 156
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`
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`it is further my opinion that the Challenged Claims do not have support in Japanese
`
`application JP l0—07937l, to which the ’696 patent claims the benefit of priority.
`
`5.
`
`Based on my experience, knowledge of the art at the relevant time,
`
`and the broadest reasonable interpretation of the claims in light of the specification,
`
`it is further my opinion that at least claim 28 of the Grill reference (U.S. Patent No.
`
`6,140,226) is supported by U.S. Provisional Patent Application No. 60—07l,628, to
`
`which the Grill reference claims the benefit of priority.
`
`III. Background and Qualifications
`
`A.
`
`Background
`
`6.
`
`I have over 30 years of research, academic, industry, and consulting
`
`engineering experience in IC (integrated circuit) processing, semiconductor device
`
`materials, microelectronics, and microlithography.
`
`I have expertise in
`
`semiconductor IC processes and fabrication, microlithography, and deposition and
`
`etch processes.
`
`7.
`
`I am a professor of Microelectronic Engineering and the Director of
`
`the Ph.D. program in Microsystems Engineering at the Rochester Institute of
`
`Technology (RIT).
`
`8.
`
`I am a Fellow of the Institute of Electrical and Electronics Engineers
`
`(IEEE), a Fellow of the International Society for Optical Engineering (SPIE), and a
`
`Fellow of the Optical Society of America (OSA).
`
`I have received numerous
`
`Page 5 of 156
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`
`
`awards including the IEEE Technology Innovation Award, the RIT Trustees
`
`Scholarship Award, the SPIE Research Mentoring Award, the RIT Creators
`
`Award, and the Rush Henrietta Outstanding Alumni Award, among others, and
`
`have been inducted into RIT’s Innovator Hall of Fame.
`
`9.
`
`I have published over 200 technical papers, articles, textbooks, and
`
`textbook chapters, and I hold 27 patents. My patented technologies have been
`
`licensed both nationally and internationally.
`
`10.
`
`Additional details about my employment history, fields of expertise,
`
`and publications are further included in my curriculum vitae, attached as Appendix
`
`A.
`
`B.
`
`Previous Expert Witness Experience
`
`11.
`
`I have served as an expert witness since the mid l990’s. In the last
`
`ten years or so, I have testified at the International Trade Commission twice and
`
`district court three times.
`
`In addition, I have been deposed over twenty times on
`
`patents related to semiconductor device fabrication. Several of these have been
`
`IPR cases. Additional details about my litigation consulting experience are further
`
`included in my curriculum vitae, attached as Appendix A.
`
`C.
`
`Compensation
`
`12.
`
`I am being compensated for services provided in this matter at my
`
`usual and customary rate of $525 per hour plus travel expenses. My compensation
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`Page 6 of 156
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`
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`is not conditioned on the conclusions I reach as a result of my analysis or on the
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`outcome of this matter, and in no way affects the substance of my statements in
`
`this declaration.
`
`13.
`
`I have no financial interest in Petitioner TSMC or any of its
`
`subsidiaries.
`
`I also have no financial interest in Patent Owner Godo Kaisha IP
`
`Bridge 1. I do not have any financial interest in the ’696 patent and have not had
`
`any contact with any of the named inventor of the ’696 patent, Nobuo Aoi.
`
`IV. Materials Reviewed
`
`14.
`
`In forming my opinions, I have reviewed the following references:
`
`0 The ’696 patent (which I understand is Exhibit 1001 to TSMC’s
`
`petition);
`
`0 U.S. Patent No. 3,617,824 (“S/zirzoda,” which I understand is Exhibit
`
`1003 to TSMC’s petition);
`
`0 U.S. Patent No. 3,838,442 (“Humphreys,” which I understand is
`
`Exhibit 1004 to TSMC’s petition);
`
`0 U.S. Patent No. 6,140,226 (“Grill,” which I understand is Exhibit 1005
`
`to TSMC’s petition);
`
`0 U.S. Patent No. 5,635,423 (“Huarzg,” which I understand is Exhibit
`
`1006 to TSMC’s petition);
`
`Page 7 of 156
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`
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`0 U.S. Patent No. 5,741,626 (“Jairz,” which I understand is Exhibit 1007
`
`to TSMC’s petition);
`
`0 C. Akrout et al., “A 480—MHz Microprocessor in a 0.12pm Leff CMOS
`
`Technology with Copper Interconnects,” IEEE J. of Solid—State
`
`Circuits, Vol. 33, no. 11 (November 1998) (“Akrout,” whichI
`
`understand is Exhibit 1008 to TSMC’s petition);
`
`0
`
`J .N. Burghartz et al., “Monolithic Spiral Inductors Fabricated Using a
`
`VLSI Cu—Damascene Interconnect Technology and Low—Loss
`
`Substrates,” International Electron Devices Meeting (December 1996)
`
`(“Burghartz,” which I understand is Exhibit 1009 to TSMC’s petition);
`
`0 U.S. Patent No. 6,100,184 (“Z/zao,” which I have been told is Exhibit
`
`1010 to TSMC’s petition);
`
`0 U.S. Patent No. 6,103,616 (“Yu,” which I have been told is Exhibit
`
`1011 to TSMC’s petition);
`
`0 File History of U.S. Patent No. 6,197,696 to Aoi et al. (which I have
`
`been told is Exhibit 1012 to TSMC’s petition)
`
`0
`
`Japanese Patent Application No. 10—079371 to Aoi (“the ’371
`
`application,” which I have been told is Exhibit 1013 to TSMC’s
`
`petition);
`
`Page 8 of 156
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`
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`0 Certified Translation of Japanese Patent Application No. 10—079371 to
`
`Aoi (“the ’371 application,” which I have been told is Exhibit 1014 to
`
`TSMC’s petition);
`
`0
`
`Japanese Patent Application No. 11—075519 to Aoi (which I have been
`
`told is Exhibit 1015 to TSMC’s petition);
`
`0 Certified Translation of Japanese Patent Application No. 11-0755 19 to
`
`Aoi (“the ’519 application,” which I have been told is Exhibit 1016 to
`
`TSMC’s petition);
`
`0 U.S. Provisional Patent Application No. 60/071,628 (which I have
`
`been told is Exhibit 1017 to TSMC’s petition);
`
`0 U.S. Patent No. 5,592,024 to Aoyama et al. (“Aoyama,” which I have
`
`been told is Exhibit 1018 to TSMC’s petition); and
`
`0 U.S. Patent No. 5,920,790 to Wetzel et al. (“Wetzel,” which I have
`
`been told is Exhibit 1019 to TSMC’s petition).
`
`V.
`
`Legal Standards
`
`15.
`
`I am not an attorney and have not been asked to offer my opinion on
`
`the law. However, as an expert offering an opinion on whether the claims in the
`
`’696 patent are patentable, I have been told that I am obliged to follow existing
`
`law.
`
`I have been told the following legal principles apply to analysis of
`
`patentability pursuant to 35 U.S.C. §§ 102 and 103.
`
`6
`
`Page 9 of 156
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`
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`16.
`
`I also understand that, in an inter partes review proceeding, patent
`
`claims may be deemed unpatentable if it is shown by preponderance of the
`
`evidence that they were anticipated and/or rendered obvious by one or more prior
`
`art patents or publications.
`
`17.
`
`Further, I have been told that, in an inter partes review proceeding,
`
`patent claims cannot claim the benefit of priority to a domestic or a foreign
`
`application, if the domestic or the foreign application does not adequately describe
`
`or enable those claims.
`
`A.
`
`Anticipation
`
`18.
`
`I have been told that for a claim to be anticipated under § 102, every
`
`limitation of the claimed invention must be found in a single prior art reference.
`
`19.
`
`I have been told that a claim is unpatentable as anticipated under
`
`§ l02(a) if the claimed invention was “known or used by others in this country, or
`
`patented or described in a printed publication in this or another country, before the
`
`invention thereof by the applicant for patent.”
`
`20.
`
`I have been told that a claim is unpatentable as anticipated under
`
`§ l02(b) if the claimed invention was “patented or described in a printed
`
`publication in this or a foreign country or in public use or on sale in this country,
`
`more than one year prior to the date of the application for patent in the United
`
`States.”
`
`Page 10 of 156
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`
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`21.
`
`I have been told that a claim is unpatentable as anticipated under
`
`§ 102(e) if “the invention was described in (1) an application for patent, published
`
`under section 122(b), by another filed in the United States before the invention by
`
`the applicant for patent or (2) a patent granted on an application for patent by
`
`another filed in the United States before the invention by the applicant for patent,
`
`except that an international application filed under the treaty defined in section
`
`351(a) shall have the effects for the purposes of this subsection of an application
`
`filed in the United States only if the international application designated the United
`
`States and was published under Article 21(2) of such treaty in the English
`
`language.”
`
`B.
`
`Obviousness
`
`22.
`
`I have been told that under 35 U.S.C. § 103(a), “[a] patent may not be
`
`obtained although the invention is not identically disclosed or described as set forth
`
`in section 102, if the differences between the subject matter sought to be patented
`
`and the prior art are such that the subject matter would have been obvious at the
`
`time the invention was made to a person having ordinary skill in the art to which
`
`said subject matter pertains.”
`
`23. When considering the issues of obviousness, I have been told that I
`
`am to do the following:
`
`a.
`
`Determine the scope and content of the prior art;
`
`Page 11 of 156
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`
`
`b.
`
`Ascertain the differences between the prior art and the claims at
`
`issue;
`
`c.
`
`d.
`
`Resolve the level of ordinary skill in the pertinent art; and
`
`Consider evidence of secondary indicia of non—obviousness (if
`
`available).
`
`24.
`
`I have been told that the relevant time for considering whether a claim
`
`would have been obvious to a person of ordinary skill in the art is the time of
`
`alleged invention, which I have assumed is shortly before the ’696 patent was filed.
`
`25.
`
`I have been told that obviousness is a determination of law based on
`
`underlying determinations of fact.
`
`I have been told that these factual
`
`determinations include the scope and content of the prior art, the level of ordinary
`
`skill in the art, the differences between the claimed invention and the prior art, and
`
`secondary considerations of non—obviousness.
`
`26.
`
`I have been told that any assertion of secondary indicia must be
`
`accompanied by a nexus between the merits of the invention and the evidence
`
`offered.
`
`27.
`
`I have been told that a reference may be combined with other
`
`references to disclose each element of the invention under § 103.
`
`I have been told
`
`that a reference may also be combined with the knowledge of a person of ordinary
`
`skill in the art and that this knowledge may be used to combine multiple
`
`Page 12 of 156
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`
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`references.
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`I have also been told that a person of ordinary skill in the art is
`
`presumed to know the relevant prior art.
`
`I have been told that the obviousness
`
`analysis may take into account the inferences and creative steps that a person of
`
`ordinary skill in the art would employ.
`
`28.
`
`In determining whether a prior art reference could have been
`
`combined with another prior art reference or other information known to a person
`
`having ordinary skill in the art, I have been told that the following principles may
`
`be considered:
`
`a. A combination of familiar elements according to known methods is
`
`likely to be obvious if it yields predictable results;
`
`b. The substitution of one known element for another is likely to be
`
`obvious if it yields predictable results;
`
`c. The use of a known technique to improve similar items or methods in
`
`the same way is likely to be obvious if it yields predictable results;
`
`d. The application of a known technique to a prior art reference that is
`
`ready for improvement, to yield predictable results;
`
`e. Any need or problem known in the field and addressed by the
`
`reference can provide a reason for combining the elements in the
`
`manner claimed;
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`Page 13 of 156
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`10
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`
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`f. A person of ordinary skill often will be able to fit the teachings of
`
`multiple references together like a puzzle; and
`
`g. The proper analysis of obviousness requires a determination of
`
`whether a person of ordinary skill in the art would have a “reasonable
`
`expectation of success”—not “absolute predictability” of success—in
`
`achieving the claimed invention by combining prior art references.
`
`29.
`
`I have been told that whether a prior art reference renders a patent
`
`claim unpatentable as obvious is determined from the perspective of a person of
`
`ordinary skill in the art.
`
`I have been told that there is no requirement that the prior
`
`art contain an express suggestion to combine known elements to achieve the
`
`claimed invention, but a suggestion to combine known elements to achieve the
`
`claimed invention may come from the prior art, as filtered through the knowledge
`
`of one skilled in the art. In addition, I have been told that the inferences and
`
`creative steps a person of ordinary skill in the art would employ are also relevant to
`
`the determination of obviousness.
`
`30.
`
`I have been told that, when a work is available in one field, design
`
`alternatives and other market forces can prompt variations of it, either in the same
`
`field or in another.
`
`I have been told that if a person of ordinary skill in the art can
`
`implement a predictable variation and would see the benefit of doing so, that
`
`variation is likely to be obvious.
`
`I have been told that, in many fields, there may
`
`Page 14 of 156
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`11
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`
`
`be little discussion of obvious combinations, and in these fields market demand—
`
`not scientific literature—may drive design trends.
`
`I have been told that, when
`
`there is a design need or market pressure and there are a finite number of
`
`predictable solutions, a person of ordinary skill in the art has good reason to pursue
`
`those known options.
`
`31.
`
`I have been told that there is no rigid rule that a reference or
`
`combination of references must contain a “teaching, suggestion, or motivation” to
`
`combine references. But I also understand that the “teaching, suggestion, or
`
`motivation” test can be a useful guide in establishing a rationale for combining
`
`elements of the prior art.
`
`I have been told that this test poses the question as to
`
`whether there is an express or implied teaching, suggestion, or motivation to
`
`combine prior art elements in a way that realizes the claimed invention, and that it
`
`seeks to counter impermissible hindsight analysis.
`
`VI.
`
`Technological Background
`
`A.
`
`Integrated Circuits and Interconnections
`
`32.
`
`Integrated circuits contain millions of discrete semiconductor devices.
`
`These discrete devices are electrically connected to one another by
`
`“interconnections,” or “interconnects,” to form circuits. U.S. Patent No.
`
`3,617,824, from 1965, provides an early example of interconnects.
`
`(Shirzoda at
`
`Page 15 of 156
`
`12
`
`
`
`4:30-73, Figs. 6, 7.) For example, Figures 6 and 7 of Shirzoda (below) shows
`
`interconnects (in blue and green) in an integrated circuit.
`
`64)
`
`(9)
`
`(C)
`
`F I G.6
`
`
`
`
`
`
`
`
`V};-’$>\;‘7.
`
`
`
`
`33.
`
`Interconnects having a “via” and “trench” portions were very common
`
`years before the application for the ’696 patent was filed. “Vias” provide an
`
`electrical connection path between device levels by extending between the planes
`
`of one or more adjacent layers. When filled with a conductive material, these vias
`
`Page 16 of 156
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`13
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`
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`provide the electrical contact between conductive layers and are often also referred
`
`to as contact holes. When filled with a conductive material, the “trenches” are the
`
`wires that link the filled vias (or contacts) to form circuits. Figures 6 and 6A of
`
`U.S. Patent No. 3,838,442 show this structure. (Hump/zreys at Abstract, 1254-226,
`
`8:19-54, Figs. 6, 6A, 7, 7A.)
`
`
`
`a\
`
`Is
`
`
`
`F|G.6A
`
`34. Multiple levels of interconnects are typically used to form various
`
`circuits within a microchip. The vias are vertical metal patterns that link each
`
`interconnect level together. The trenches are coplanar with the semiconductor
`
`substrate and connect the circuit elements. These trenches define each
`
`metallization level in an integrated circuit. This type of multi—level wiring scheme
`
`was common in semiconductor processing years before the time the application for
`
`the ’696 patent was filed. Examples appear below.
`
`(Akrout at Fig. 2; Burghartz at
`
`Fig. 2.) The via—trench structures are readily apparent.
`
`Page 17 of 156
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`14
`
`
`
` A
`
` '
`
`35.
`
`One way to make this type of interconnect structure is a damascene
`
`process.
`
`In a damascene process, the via and trench patterns are etched into an
`
`insulating material, and those patterns are filled with metal. Excess metal is
`
`removed by a chemical—mechanical polish (CMP) treatment. In a single
`
`damascene process, the via and trench levels are formed independently through
`
`two separate damascene processes. In a dual damascene process, the vias and
`
`trenches are formed in the same process. Like other metallization processes, the
`
`resulting structure formed in a dual damascene process is characterized by via
`
`portions for contacting each discrete device and trenches for linking the vias.
`
`(Grill at 1:45-48, 3:33-36; Huang at Abstract, 2:6l—3:2, 3:54-57; Jain at 2:15-
`
`20.) Examples of the dual—damascene structure appear below with annotations.
`
`(Grill at Fig. lL; Huang at Figs. 6(c), 9; Jain at Fig. 5.)
`
`Page 18 of 156
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`15
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`
`
`Fig. 1L
`
`Trench
`/Trench
`\- I x\\\
`
`Via
`
`Grill
`
`Huang
`
`FIG. 9
`
`HG5
`
`Trench
`
`/'‘10
`
`
`
`T If
`
`T
`
`Via
`
`Jain
`
`Huang
`
`B.
`
`Semiconductor Etching and Photolithography
`
`36.
`
`One semiconductor processing technology that can create patterns in a
`
`semiconductor wafer is called photolithography.
`
`37.
`
`In photolithography, a chemical called a “photoresist” uniformly coats
`
`the surface of the processed semiconductor wafer. Photoresist is sensitive to light
`
`and will change its molecular structure when illuminated under the right
`
`conditions.
`
`Page 19 of 156
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`16
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`38.
`
`A photomask, which is transparent in some regions and opaque in
`
`others, contains a pattern that is meant to be transferred to the processed wafer
`
`through the photoresist. After the photomask is aligned, the photoresist is
`
`illuminated through the photomask. The exposed photoresist is altered by the
`
`light.
`
`39.
`
`Any photoresist that is not part of the pattern can be removed with a
`
`chemical called a “developer.” The processed wafer retains the patterned
`
`photoresist layer, which can be used to help pattern material beneath the
`
`photoresist.
`
`40.
`
`A schematic representation of two photolithography processes appear
`
`below.
`
`In a “negative” photoresist process, the exposed portions of the photoresist
`
`remain on the processed wafer.
`
`In a “positive” photoresist process, the illuminated
`
`portions of the photoresist are removed from the processed wafer.
`
`
`
`P--JEag:,=4ti'-.-‘E! resist: sxpcused
`areas will remain
`
`Page 20 of 156
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`17
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`41.
`
`Another semiconductor processing technology that can create patterns
`
`in a semiconductor wafer is called etching. Etching usually complements
`
`photolithography.
`
`42.
`
`A patterned photoresist layer can serve as a “mask” during an etch
`
`process.
`
`In an etch process, surfaces of the processed wafer (semiconductor
`
`substrate and/or overlying layers) are exposed to corrosive chemicals to remove
`
`certain portions of the processed wafer.
`
`43.
`
`After etching, the photoresist may be “stripped” (i.e., removed) from
`
`the wafer by another chemical treatment.
`
`In some processes, the photoresist may
`
`also be removed during etching. The following diagram shows photolithography
`
`and etching.
`
`
`
`Pnqmre W‘afe:r
`
`Coat with Photons}!
`
`Prfiake
`
`A].i,g;n and Expose
`
`Devebp
`
`Etch, Implant, etc.
`
`SI:r'pRe-sist
`
`44.
`
`An etch that attacks all exposed materials is called a non—selective
`
`etch. An etch that attacks certain material compositions more than others is called
`
`Page 21 of 156
`
`18
`
`
`
`a selective etch. The ratio of etch rates between two materials is known as
`
`“selectivity.” (Wang at 621-11.)
`
`45.
`
`An etch that attacks a material in all directions is called isotropic. An
`
`etch that attacks a material in a preferred direction (most commonly perpendicular
`
`to the surface of the wafer) is called anisotropic.
`
`46.
`
`An etch that uses a liquid etching agent is called a “wet” etch. An
`
`etch that does not use a liquid (typically an ionized gas, called a “plasma,” instead)
`
`is called a “dry” etch.
`
`47.
`
`In dual damascene processes, selective anisotropic dry etching is
`
`typically used. (Huang at 2:61-63; Zhao at 2:45-48; Yu at 429-12.) This
`
`preserves the critical dimensions (i.e., the sizing) of the vias and trenches and
`
`ensures that the correct layers are etched during each step of the process.
`
`VII. The ’696 Patent
`
`A.
`
`Description of the Challenged Claims
`
`1.
`
`Claim 10
`
`48.
`
`A person of ordinary skill in the art would have understood that claim
`
`10 reads on the fifth and sixth embodiments, including the modified fifth and sixth
`
`embodiments, of the ’696 patent. (’696 patent at 22:47-29:60, Figs. 21(a)-37(b).)
`
`Below I describe the steps of claim 10 of the ’696 patent with reference to the fifth
`
`and sixth embodiments of the ’696 patent (including their modified counterparts).
`
`Page 22 of 156
`
`19
`
`
`
`49.
`
`The preamble of claim 10 recites “[a] method for forming an
`
`interconnection structure.” The ’696 patent, titled “Method of Forming
`
`Interconnection Structure,” states that “[t]he present invention relates to a method
`
`for forming an interconnection structure in a semiconductor integrated circuit.”
`
`(’696 patent at Title, Abstract, 126-8.)
`
`50.
`
`Step a) of claim 10 recites “forming a first insulating film [503, 553,
`
`602, 652] over lower—level metal interconnects [501, 551, 601, 651].”
`
`51.
`
`In my opinion, a person of ordinary skill in the art would have
`
`understood that in the fifth embodiment the claimed first insulating film is “first
`
`organic film 503,” which is located over lower—level interconnects 501 and is an
`
`“insulating film.” (’696 patent at 22:52-60.)
`
`52.
`
`In my opinion, a person of ordinary skill in the art would have
`
`understood that in the modified fifth embodiment the claimed first insulating film
`
`is “first organic film 553,” which is located over lower—level interconnects 551 and
`
`is an “insulating film.” (’696 patent at 24:60—25:1.)
`
`53.
`
`In my opinion, a person of ordinary skill in the art would have
`
`understood that in the sixth embodiment the claimed first insulating film is “silicon
`
`nitride film 602,” which is located over lower—level interconnects 601.
`
`(’696
`
`patent at 2821-6.) A person of ordinary skill in the art would have understood that
`
`silicon nitride is an insulating film.
`
`20
`
`Page 23 of 156
`
`
`
`54.
`
`In my opinion, a person of ordinary skill in the art would have
`
`understood that in the modified sixth embodiment the claimed first insulating film
`
`is “silicon nitride film 652,” which is located over lower—level interconnects 651.
`
`(’696 patent at 30:1-6.) A person of ordinary skill in the art would have
`
`understood that silicon nitride is an insulating film.
`
`55.
`
`Figures 21(a), 24(a), 30(a), and 33(a) from the ’696 patent showing
`
`step a) appear below.
`
`(’696 patent at 22:52-23:24, 24:60-25:11, 28:1-36, 30:1-
`
`16, Figs. 21(a), 24(a), 30(a), 33(a).)
`
`
`
`_
`Flg. 30 (a)
`
`507
`506
`505
`504
`233
`501
`500
`
`606
`605
`604
`603
`gig;
`600
`
`Fifth Embodiment
`
`Sixth Embodiment
`
`Fig. 21 (a)
`
`Fig. 24(a)
`
`
`
`557
`556
`555
`
`554
`553
`552
`551
`550
`
`_
`Flg. 33 (a)
`
`Modified Fifth Embodiment
`
`Modified Sixth Embodiment
`
`56.
`
`Step b) of claim 10 recites “forming a second insulating film [504,
`
`554, 603, 653], having a different composition than that of the first insulating film,
`
`over the first insulating film [503, 553, 602, 652].”
`
`21
`
`Page 24 of 156
`
`
`
`57.
`
`In my opinion, a person of ordinary skill in the art would have
`
`understood that in the fifth embodiment the claimed second insulating film is “first
`
`silicon dioxide film 504,” which has a composition that differs from the
`
`composition of the claimed first insulating film (first organic film 503).
`
`(’696
`
`patent at 22:57-62.) A person of ordinary skill in the art would have understood
`
`that silicon dioxide is an insulating film and that it is not organic. A person of
`
`ordinary skill in the art also would have understood that first silicon dioxide film
`
`504 is located over first organic film 503.
`
`58.
`
`In my opinion, a person of ordinary skill in the art would have
`
`understood that in the modified fifth embodiment the claimed second insulating
`
`film is “first silicon dioxide film 554,” which has a composition that differs from
`
`the composition of the claimed first insulating film (first organic film 553).
`
`(’696
`
`patent at 24265-2523.) A person of ordinary skill in the art would have understood
`
`that silicon dioxide is an insulating film and that it is not organic. A person of
`
`ordinary skill in the art also would have understood that first silicon dioxide film
`
`554 is located over first organic film 553.
`
`59.
`
`In my opinion, a person of ordinary skill in the art would have
`
`understood that in the sixth embodiment the claimed second insulating film is “first
`
`organic film 603,” which is an “insulating film” and has a composition that differs
`
`from the composition of the claimed first insulating film (silicon nitride film 602).
`
`Page 25 of 156
`
`22
`
`
`
`(’696 patent at 28:1-9.) A person of ordinary skill in the art would have
`
`understood that silicon nitride is not organic. A person of ordinary skill in the art
`
`also would have understood that first organic film 603 is located over silicon
`
`nitride film 602.
`
`60.
`
`In my opinion, a person of ordinary skill in the art would have
`
`understood that in the modified sixth embodiment the claimed second insulating
`
`film is “first organic film 653,” which is an “insulating film” and has a
`
`composition that differs from the composition of the claimed first insulating film
`
`(silicon nitride film 652).
`
`(’696 patent at 30: 1-9.) A person of ordinary skill in the
`
`art would have understood that silicon nitride is not organic. A person of ordinary
`
`skill in the art also would have understood that first organic film 653 is located
`
`over silicon nitride film 652.
`
`61.
`
`Figures 2l(a), 24(a), 30(a), and 33(a) from the ’696 patent showing
`
`step b) appear below.
`
`(’696 patent at 22:52-23:24, 24:60-25:11, 28:1-36, 30:1-
`
`16, Figs. 2l(a), 24(a), 30(a), 33(a).)
`
`Fig. 21 (a)
`
`507
`506
`505
`504
`283
`501
`
`500
`
`Fig. 30 (a)
`
`Fifth Embodiment
`
`Sixth Embodiment
`
`Page 26 of 156
`
`23
`
`
`
`Fig. 24 (a)
`
`_
`F1g. 33 (a)
`
`557
`556
`555
`
`554
`553
`552
`551
`550
`
`Modified Fifth Embodiment
`
`Modified Sixth Embodiment
`
`62.
`
`Step c) of claim 10 recites “forming a third insulating film [505, 555,
`
`604, 654], having a different composition than that of the second insulating film,
`
`over the second insulating film [504, 554, 603, 653].”
`
`63.
`
`In my opinion, a person of ordinary skill in the art would have
`
`understood that in the fifth embodiment the claimed third insulating film is
`
`“second organic film 505,” which is an “insulating film” and has a composition
`
`that differs from the composition of the claimed second insulating film (first
`
`silicon dioxide film 504).
`
`(’696 patent at 22:60-64.) A person of ordinary skill in
`
`the art would have understood that silicon dioxide is not organic. A person of
`
`ordinary skill in the art also would have understood that second organic film 505 is
`
`located over first silicon dioxide film 504.
`
`64.
`
`In my opinion, a person of ordinary skill in the art would have
`
`understood that in the modified fifth embodiment the claimed third insulating film
`
`is “second organic film 555,” which is an “insulating film” and has a composition
`
`that differs from the composition of the claimed second insulating film (first
`
`silicon dioxide film 554).
`
`(’696 patent at 25: 1-6.) A person of ordinary skill in
`
`24
`
`Page 27 of 156
`
`
`
`the art would have understood that silicon dioxide is not organic. A person of
`
`ordinary skill in the art also would have understood that second organic film 555 is
`
`located over first silicon dioxide film 554.
`
`65.
`
`In my opinion, a person of ordinary skill in the art would have
`
`understood that in the sixth embodiment the claimed third insulating film is
`
`“silicon dioxide film 604,” which has a composition that differs from the
`