I—uu—AP“
`
`
`
`...I..
`
`GRUNECKER, KINKELDEY, STOCKMAIR & SCHWANHAUSSER
`ANWALTSSOZIETAT
`
`PATENTANWALTE
`EUROPEAN PATENT A'I'ICI RN EYS
`MUNCHEN
`DR. HERMANN KINKELDEY
`DR KMUS SCHUMANN
`PETER 'rl. JAKDB
`WOLFHARD MEISTER
`HANS HILGER5
`on. HENNING MEYERePLfim-l
`ANNELIE EHNOLD
`THOMAS SCHUSTER
`Di KURA GOLDBACH
`MARTIN AUFENANGER
`GD‘ITFRIED KuTZSCH
`DR. HEIKE VOGELSANG-WENKE
`REINHARD KNAUER
`DIETMAR KUHL
`DR. FRANZJOSEF ZIMMER
`BEI'IINA K REICHELT
`DR. ANTON K. PFAU
`DR. UDO WEIGELT
`RAINER BERTRAM
`JENS KOO-L M 5, ruor PA} M s (ENSPM)
`KOLN
`DR MARTIN DROPMANN
`
`DATUM r‘ DATE
`
`10.06.99
`
`ANWALTSSOZIEI'AT MAXIMILIANSTRASSE 53 080533 MUNCHEN GERMANY
`
`REC HTSANWALTE
`
`MUNCHEN
`DR HELMUT EICHMANM
`GERHARD BARTH
`DR ULRICH BLUMENRODERJL M.
`CHRIFTA NIKLAS-FALTER
`DR MAXIMILIAN KINICELDEVr LL M.
`
`EUROPEAN PATENT OFFICE
`ERHARDTSTR. 2?
`
`80298 MUENCHEN
`
`EP0 — Munich
`3
`
`10. Juni 1999
`
`OF COUNSEL
`PATENTANWALTE
`AUGUST GRUNECKER
`DR EUNTER BEDLD
`DR WALTER LANGI-IOFF
`
`DR WILFRIED STOCKMAIR £4996]
`
`IHR ZEICHEN [YOUR REF
`
`UNSER ZEICHEN [OUR REF.
`
`EP 1671 ngw
`
`European Patent Application No.: 99 105 946.0
`Applicant: MATSUSHITA ELECTRIC INDUSTRIAL 00., LTD.
`
`The following document is submitted herewith:
`
`- Translation of the Priority Document
`
`Encls.
`
`Dr. A. Pfau )
`
`MAXIMILIANSTRASSE 58 0780538 MUNCHEN
`TEL 089/21 23 50 FAX {GL3} 039 1' 22 02 87", (GL4) 089 f 21 36 92 5’3
`L»..Jr....... .1.‘ marina. A; , Lunar Numbers! F... .mv In,» An
`
`3 DSDbI’Z KDLN
`KAISERwWILHELM-RINGI
`TEL 0221194 97 22 O FAX (SLR) 0221I94 97 222
`a,m,:l- Any“. “ma r... .nnrlrnr Ag.
`
`DEUTSCHE BANK MUNCHEN NO 17 51734
`BLZ 700 70010 SWIFT: DEUT DE MM
`
`IP Bridge Exhibit 2012
`
`TSMC v. IP Bridge
`IPR2016-01377
`
`Page 0001
`
`IP Bridge Exhibit 2012
`TSMC v. IP Bridge
`IPR2016-01377
`Page 0001
`
`
`
`
`
`...I..
`
`GRUNECKER, KINKELDEY, STOCKMAIR & SCHWANHAUSSER
`ANWALTSSOZIETAT
`
`PATENTANWALTE
`EUROPEAN PATENT A'I'ICI RN EYS
`MUNCHEN
`DR. HERMANN KINKELDEY
`DR KMUS SCHUMANN
`PETER 'rl. JAKDB
`WOLFHARD MEISTER
`HANS HILGER5
`on. HENNING MEYERePLfim-l
`ANNELIE EHNOLD
`THOMAS SCHUSTER
`Di KURA GOLDBACH
`MARTIN AUFENANGER
`GD‘ITFRIED KuTZSCH
`DR. HEIKE VOGELSANG-WENKE
`REINHARD KNAUER
`DIETMAR KUHL
`DR. FRANZJOSEF ZIMMER
`BEI'IINA K REICHELT
`DR. ANTON K. PFAU
`DR. UDO WEIGELT
`RAINER BERTRAM
`JENS KOO-L M 5, ruor PA} M s (ENSPM)
`KOLN
`DR MARTIN DROPMANN
`
`DATUM r‘ DATE
`
`10.06.99
`
`ANWALTSSOZIEI'AT MAXIMILIANSTRASSE 53 080533 MUNCHEN GERMANY
`
`REC HTSANWALTE
`
`MUNCHEN
`DR HELMUT EICHMANM
`GERHARD BARTH
`DR ULRICH BLUMENRODERJL M.
`CHRIFTA NIKLAS-FALTER
`DR MAXIMILIAN KINICELDEVr LL M.
`
`EUROPEAN PATENT OFFICE
`ERHARDTSTR. 2?
`
`80298 MUENCHEN
`
`EP0 — Munich
`3
`
`10. Juni 1999
`
`OF COUNSEL
`PATENTANWALTE
`AUGUST GRUNECKER
`DR EUNTER BEDLD
`DR WALTER LANGI-IOFF
`
`DR WILFRIED STOCKMAIR £4996]
`
`IHR ZEICHEN [YOUR REF
`
`UNSER ZEICHEN [OUR REF.
`
`EP 1671 ngw
`
`European Patent Application No.: 99 105 946.0
`Applicant: MATSUSHITA ELECTRIC INDUSTRIAL 00., LTD.
`
`The following document is submitted herewith:
`
`- Translation of the Priority Document
`
`Encls.
`
`Dr. A. Pfau )
`
`MAXIMILIANSTRASSE 58 0780538 MUNCHEN
`TEL 089/21 23 50 FAX {GL3} 039 1' 22 02 87", (GL4) 089 f 21 36 92 5’3
`L»..Jr....... .1.‘ marina. A; , Lunar Numbers! F... .mv In,» An
`
`3 DSDbI’Z KDLN
`KAISERwWILHELM-RINGI
`TEL 0221194 97 22 O FAX (SLR) 0221I94 97 222
`a,m,:l- Any“. “ma r... .nnrlrnr Ag.
`
`DEUTSCHE BANK MUNCHEN NO 17 51734
`BLZ 700 70010 SWIFT: DEUT DE MM
`
`IP Bridge Exhibit 2012
`
`TSMC v. IP Bridge
`IPR2016-01377
`
`Page 0001
`
`IP Bridge Exhibit 2012
`TSMC v. IP Bridge
`IPR2016-01377
`Page 0001
`
`
`
`IN THE MATTER OF
`
`Patent Application
`
`C
`
`I F
`
`T
`
`I, Yoshiharu IWASAKA, residing at 2—12, Nakazaki 2-chome,
`
`Kita—ku, Osaka, Japan, hereby declare that the document attached
`
`heretoiseatranslationmadebynmnxftheJapanesePatentApplication
`
`number
`
`10—079371
`
`and certify that it is a true translation to
`
`the best of my knowledge and belief.
`
`Dated this 3lst day of
`
`May
`
`,
`
`1999
`
`.
`
`Signature
`
`-
`
`JZWV“*“
`
`Yoshiharu IWASAKA
`
`IPR2016-01377 Page 0002
`
`IPR2016-01377 Page 0002
`
`
`
`TRANSLATION
`
`[Name of Document]
`
`Application for Patent
`
`[Reference Number]
`
`7411290311
`
`[Filing Date]
`
`March 26, 1998
`
`[Destination]
`
`Commissioner
`
`[International Patent Classification]
`
`H01L 21/316
`
`[Title of Invention]
`
`METHOD FOR FORMING INTERCONNECTION
`
`STRUCTURE
`
`[Number of Claims]
`
`9
`
`[Inventor]
`
`[Address]
`
`C/o Matsushita.Electric Industrial_Co., Ltd.,
`
`1006, Oaza Kadoma, Kadoma—shi, Osaka, Japan
`
`[Name]
`
`Nobuo AOI
`
`[Applicant for Patent]
`
`[Identification Number]
`
`000005821
`
`[Name]
`
`Matsushita Electric Industrial Co., Ltd.
`
`[Agent]
`
`[Identification Number]
`
`1000??931
`
`[Attorney]
`
`[Name]
`
`Hiroshi MAEDA
`
`[Appointed Agent]
`
`[Identification Number]
`
`100094134
`
`[Attorney]
`
`[Name]
`
`Hiroki KOYAMA
`
`[Appointed Agent]
`
`[Identification Number]
`
`100101445
`
`[Attorney]
`
`IPR2016-01377 Page 0003
`
`IPR2016-01377 Page 0003
`
`
`
`[Name]
`
`Ichiro ONEDA
`
`[Indication of Fee]
`
`[Reference Number of Previous Payment]
`
`014409
`
`[Amount of Payment]
`
`¥21,000.—
`
`[List of Accompanying Documents]
`
`[Name thereof]
`
`Specification 1
`
`[Name thereof]
`
`[Name thereof]
`
`Drawings
`
`Abstract
`
`1
`
`1
`
`[Number of General Power of Attorney]
`
`9601026
`
`[Proof Necessary?]
`
`Yes
`
`IPR2016-01377 Page 0004
`
`IPR2016-01377 Page 0004
`
`
`
`
`
`[Name of the Document]
`
`SPECIFICATION
`
`[Title of the Invention]
`
`METHOD FOR FORMING INTERCONNECTION
`
`STRUCTURE
`
`[Claims]
`
`5
`
`[Claim 1] A.method for forming an interconnection structure,
`
`characterised by comprising:
`
`a first step of forming a first insulating film over lower-level
`
`metal interconnects;
`
`a second step of forming a second insulating film, having a
`
`10
`
`different composition than that of the first insulating film, over
`
`the first insulating film;
`
`a third step of forming a third insulating film, having a
`
`different composition than that of thsesecond insulating'filnn over
`
`the second insulating film;
`
`15
`
`a fourth step of forming a conductive film over the third
`
`insulating film;
`
`a fifth step of forming a first resist pattern on the conductive ‘
`
`film, the first resist pattern having openings for forming wiring
`
`grooves;
`
`20
`
`a sixth step of etching the conductive film using the first
`
`resist pattern as a mask, thereby forming a mask pattern out of the
`
`conductive film to have the openings for forming wiring grooves;
`
`a seventh step of forming a second resist pattern on the third
`
`insulating film,
`
`the second resist pattern having openings for
`
`25
`
`forming contact holes;
`
`an eighth step of dry-etching the third insulating filnlunder
`
`such conditions that the third insulating film and the first and
`
`1
`
`-
`
`IPR2016-01377 Page 0005
`
`IPR2016-01377 Page 0005
`
`
`
`
`
`second resist patterns are etched at a relatively high rate and that
`
`the second insulating film is etched at a relatively lowr rate,r thereby
`
`patterning the third insulating film to have the openings for forming
`
`contact holes and removing the first and second resist patterns
`
`5
`
`either entirely or partially with respective lower parts thereof
`
`left;
`
`a ninth step of dry—etching the second insulating film using
`
`the patterned third insulating film as a mask under such conditions
`
`that the second insulating film is etched at a relatively high rate
`
`10
`
`and that the first and third insulating films are etched at a
`
`relatively low rate, thereby patterning the second insulating film
`
`to have the openings for forming contact holes;
`
`a tenth step of dry—etching the third and first insulating films
`
`using the mask pattern and the patterned second insulating film as
`
`15
`
`respective masks under such conditions that the first and third
`
`insulating films are etched at a relatively high rate and that the
`
`mask pattern and the second insulating film are etched at a relatively
`
`low rate, thereby forming wiring grooves and contact holes in the
`
`third and first insulating films, respectively; and
`
`20
`
`an eleventh step of filling in the wiring grooves and the contact
`
`holes with a metal
`
`film,
`
`thereby forming upper—level metal
`
`interconnects and contacts connecting the lower— and upper—level
`
`metal interconnects together.
`
`[Claim 2] The method for forming an interconnection structure
`
`25
`
`of Claim 1, characterised by further comprising the step of forming
`
`a metal adhesion layer over part of the third insulating film exposed
`
`2
`
`IPR2016-01377 Page 0006
`
`IPR2016-01377 Page 0006
`
`
`
`
`
`inside the wiring grooves and part of the first insulating film exposed
`
`inside the contact holes between the tenth and eleventh steps .
`
`[Claim 3] The method for forming an interconnection structure
`
`of Claim 1 , characterised in that the third insulating film is mainly
`
`5
`
`composed of an organic component.
`
`[Claim 4] The method for forming an interconnection structure
`
`of Claim 3 , characterised in that the third step includes forming the
`
`third insulating film by a CVD process using a reactive gas containing
`
`perfluorodecalin .
`
`10
`
`[Claim 5] The method for forming an interconnection structure
`
`of Claim 3 , characterised in that the first insulating film is mainly
`
`composed of an organic component.
`
`[Claim 6] The method for forming an interconnection structure
`
`of Claim 5, characterised by further comprising the step of forming
`
`15
`
`an adhesion layer over part of the third insulating film exposed inside
`
`the wiring grooves and part of the first insulating film exposed inside
`
`the contact holes by a plasma process using a reactive gas containing
`
`nitrogen between the tenth and eleventh steps.
`
`[Claim T] The method for forming an interconnection structure
`
`20
`
`of Claim 3 , characterised in that the first step includes forming the
`
`first insulating film by a CVD process using a reactive gas containing
`
`perfluorodec alin .
`
`[Claim 8] A method for forming an interconnection structure,
`
`characterised by comprising:
`
`25
`
`a first step of forming a first insulating film over lower—level
`
`metal interconnects ;
`
`3
`
`IPR2016-01377 Page 0007
`
`IPR2016-01377 Page 0007
`
`
`
`
`
`a second step of forming a second insulating film, having a
`
`different composition than that of the first insulating film, over
`
`the first insulating film;
`
`a third step of forming a third insulating film, having a
`
`5
`
`different composition than that of the second insulating film, over
`
`the second insulating film;
`
`a fourth step of forming a conductive film over the third
`
`insulating film;
`
`a fifth step of forming a first resist pattern on the conductive
`
`10
`
`film, the first resist pattern having openings for forming wiring
`
`grooves;
`
`a sixth step of etching the conductive film using the first
`
`resist pattern as a mask, thereby forming a mask pattern out of the
`
`conductive film to have the openings for forming wiring grooves;
`
`15
`
`a seventh step of forming a second resist pattern on the third
`
`insulating film,
`
`the second resist pattern having openings for
`
`forming contact holes;
`
`an eighth step of dry—etching the third insulating film using
`
`the first and second resist patterns as a mask under such conditions
`
`20
`
`that the third insulating film is etched at a relatively high rate
`
`and that the second insulating film and the first and second resist
`
`patterns are etched at a relatively low rate, thereby patterning
`
`the third insulating film to have the openings for forming contact
`
`holes;
`
`25
`
`a ninth step of dry-etching the second insulating film using
`
`the first and second resist patterns as a mask under such conditions
`
`that the second insulating film is etched at a relatively high rate
`
`4
`
`IPR2016-01377 Page 0008
`
`IPR2016-01377 Page 0008
`
`
`
`and that the first and third insulating films and the first and second
`
`resist patterns are etched at a relatively low rate,
`
`thereby
`
`patterning the second insulating film to have the openings for
`
`forming contact holes;
`
`a tenth step of removing the first and second resist patterns;
`
`an eleventh step of dry—etching the third and first insulating
`
`10
`
`15
`
`films using the mask pattern and the patterned second insulating
`
`film as respective masks under such conditions that the first and
`
`third insulating films are etched at a relatively high rate and that
`
`the mask pattern and the second insulating film are etched at a
`
`relatively low rate , thereby forming wiring grooves and contact holes
`
`in the third and first insulating filmsir respectively; and
`
`a twelfth step of filling in the wiring grooves and the contact
`
`holes with a metal
`
`film,
`
`thereby forming upper—level metal
`
`interconnects and contacts connecting the lower— and upper—level
`metal interconnects together.
`
`[Claim 9] The method for forming an interconnection structure
`
`of Claim 8, characterised in that the third insulating film is a
`
`low-dielectric-constant SOG film with a siloxane skeleton.
`
`20
`
`[Detailed Description of the Invention]
`
`[Technical Field to which the Invention Belongs]
`
`The present invention relates to a method for forming an
`
`interconnection Structure in a semiconductor integrated circuit.
`
`[Prior Art]
`
`25
`
`As
`
`the number of devices
`
`integrated within a single
`
`semiconductor integrated circu it has been tremendously increasing ,
`
`line—to—line capacitance as parasitic capacitance between metal
`
`5
`
`IPR2016-01377 Page 0009
`
`IPR2016-01377 Page 0009
`
`
`
`
`
`interconnects has become larger. This increases wiring delay,
`
`thereby interfering with the
`
`performance
`
`improvement of
`
`a
`
`semiconductor integrated circuit. The wiring delay is so-called “RC
`
`delay",whichispuoportionaltotheprodwctoftheresistanceofmetal
`
`5
`
`interconnection and the line—to-line capacitance.
`
`Therefore,toreducethewiringdelay,eithertheresistance
`
`of metal interconnection or the line—to—line capacitance should
`
`be reduced.
`
`Inordertoreducetheinterconnectionresistance,IBMCorp.,
`
`10 Motorola,
`
`Inc., etc. have reported semiconductor
`
`integrated
`
`circuits using copper, not aluminium alloy, as a material for metal
`
`interconnects. A copper material has a specific resistance about
`
`two—thirds as high as
`
`that of an aluminium alloy neterial.
`
`Accordingly,
`
`in accordance with simple calculation, the wiring
`
`15
`
`delay involved with the use of a copper material
`
`for metal
`
`interconnects can be reduced to about two—thirds of that involved
`
`with the use of an_aluminium_alloy material therefor. That is to
`
`say,
`
`the operating speed can be increased by about 1.5 times.
`
`However, if the number of devices integrated within a single
`
`20
`
`semiconductor integrated circuit further increases,
`
`the wiring
`
`delay is considerably increased. Therefore, it is concerned that
`
`even if c0pper
`
`is used as an alternate metal
`
`interconnection
`
`material, the improvement in the operating Speed.will reach its
`
`limit. Also,
`
`the specific resistance of copper as a metal
`
`25
`
`interconnection.material is just a little higher than, but almost
`
`equal to, that of gold or silver. Accordingly, even if gold or
`
`silver is used instead of copper as a metal
`
`interconnection
`
`5
`
`IPR2016-01377 Page 0010
`
`IPR2016-01377 Page 0010
`
`
`
`
`
`material, the wiring delay can be reduced only slightly.
`
`Under
`
`these
`
`circumstances,
`
`not
`
`only
`
`reducing
`
`interconnection resistance but also suppressing line—to-line
`
`capacitance play a key role in further increasing the number of devices
`
`5
`
`that can be integrated within a single semiconductor integrated
`
`circuit. And,
`
`the relative dielectric constant of an interlevel
`
`insulating film should be reduced to suppress the line—to—line
`
`capacitance.
`
`1A silicon dioxide film has heretofore been used as an
`
`interlevel insulating filnn The relative dielectric constant of a
`
`10
`
`silicon dioxide film is , however, about 4 to about 4 . 5 . Therefore,
`
`it would be difficult to apply a 5 il icon dioxide film to a semiconductor
`
`integrated circuit incorporating an even larger number of devices.
`
`In order to solve such a problem, fluorine-doped silicon
`
`dioxide film, low-dielectric-constant spin—on—glass (806) film,
`
`15
`
`organic polymer film and so on have been proposed as alternate
`
`interlevel insulating films with respective relative dielectric
`
`constants smaller than that of a silicon dioxide film.
`
`[Problems that the Invention is to solve]
`
`Therelativedielectricconstantcflfafluorine—dopedsilicon
`
`20
`
`dioxide film is about 3.3 to about 3.7, which is about 20 percent
`
`lower
`
`than that of
`
`a
`
`conventional
`
`silicon dioxide
`
`film.
`
`Nevertheless, a fluorine—doped silicon dioxide film is highly
`
`hygroscopic, and easily absorbs water in the air, resulting in
`
`various
`
`problems
`
`in practice.
`
`For
`
`example, when
`
`the
`
`25
`
`fluorineud0ped silicon dioxide film absorbs water, SiOH groups,
`
`having a high relative dielectric constant, are introduced into
`
`the film. As a result, the relative dielectric constant of the
`
`7
`
`IPR2016-01377 Page 0011
`
`IPR2016-01377 Page 0011
`
`
`
`fluorine-doped silicon dioxide film adversely increases, or the
`
`SiOH groups react with the water during a heat treatment to release
`
`H20 gas.
`
`In addition, fluorine free radicals, contained in the
`
`fluorine-doped silicon dioxide film, segregate near the surface
`
`thereof during a heat treatment and react with Ti, contained in
`
`a TiN layer formed thereon as an adhesion layer, to form a TiF
`
`film, which easily peels off.
`
`An exemplary low-dielectric—constant 30G film is an HSQ
`
`(hydrogen silseSquioxane) film, composed of Si atoms, 0 atoms and
`
`10
`
`H atoms the number of which is about two—thirds of that of the
`
`O atoms. However, the H89 film releases a larger amount of water
`
`than a conventional silicon dioxide film. Accordingly, since it
`
`is difficult to form a buried interconnection line in the HSQ film,
`
`a patterned metal film should be formed as metal interconnects
`
`15
`
`on the HSQ film.
`
`Also, since the HSQ film cannot adhere so strongly to metal
`
`interconnects , a CVD oxide film should be formed between the metal
`
`interconnects
`
`and the HSQ film to improve
`
`the adhesion
`
`therebetween. However, in such a case, if the CVD oxide film is
`
`20
`
`formed on the metal interconnects, the substantial line—to—line
`
`capacitance is equal to the serial capacitance formed by the H59 and
`
`CVD films because the CVD oxide film with a high dielectric constant
`
`exists between the metal interconnects. Accordingly, the resulting
`
`line—to—line capacitance is larger as compared with using the HSQ film
`
`25
`
`alone.
`
`An organic polymer film, as well as the low—dielectrics
`
`constant SOG film, cannot adhere strongly to metal interconnects,
`
`8
`
`IPR2016-01377 Page 0012
`
`IPR2016-01377 Page 0012
`
`
`
`either. Accordingly, a CVD oxide film should be formed as an
`
`adhesion layer between the metal interconnects and the organic
`
`polymer film,
`
`too.
`
`Moreover, an etch rate, at which an organic polymer film is
`
`etched, is approximately equal to an ash rate, at which a resist
`
`pattern is ashed with oxygen plasma. Accordingly, a usual resist
`
`application process is not applicable in such a situation, because
`
`the organic polymer film is likely to be damaged during ashing
`
`and removing the resist pattern. Therefore, a proposed alternate
`
`10
`
`process includes: forming a CVD oxide film on an organic polymer
`
`film; forming a resist film on the CVD oxide film; and then etching
`
`the resist film using the CVD oxide film as an etch stopper (i.e. ,
`
`a protective film).
`
`However, during the step of forming the CVD oxide film on
`
`15
`
`the organic polymer film, the surface of the organic polymer film
`
`is exposed to a reactive gas containing oxygen. Accordingly, the
`
`organic polymer film reacts with oxygen to take in polar groups such
`
`as carbonyl groups and ketone groups. As a result,
`
`the relative
`
`dielectric constant of the organic polymer film disadvantageously
`
`20
`
`increases.
`
`Also, in forming inlaid copper interconnects in the organic
`
`polymer film, an adhesion layer, formed of for example 'I'iN, should
`
`be formed around wiring grooves formed in the organic polymer film,
`
`because the organic polymer film cannot adhere strongly to the
`
`25
`
`metal
`
`interconnects. However,
`
`since the TiN film has a high
`
`resistance,
`
`the effective cross—sectional area of the metal
`
`interconnects decreases.
`
`Consequently,
`
`the intended effect
`
`9
`
`IPR2016-01377 Page 0013
`
`IPR2016-01377 Page 0013
`
`
`
`
`
`attainable by the use of the copper lines, i.e., reduction in
`
`resistance, would be lost.
`
`In view of the above problems, an object of the present
`
`invention is to enable the forming of an interlevel insulating film
`
`5 with a
`
`low dielectric constant
`
`through an ordinary resist
`
`application process.
`
`[Means for Solving the Problems]
`
`A first method for forming an interconnection structure
`
`according to the present invention includes: a first step of forming
`
`10
`
`a first insulating film over lower—level metal interconnects; a
`
`second step of forming a second insulating film, having a different
`
`composition than that of the first insulating film, over the first
`
`insulating film; a third step of forming a third insulating film,
`
`having a different composition than that of the second insulating
`
`15
`
`film, over the second insulating film; a fourth step of forming
`
`a conductive film over the third insulating film; a fifth step
`
`of forming a first resist pattern, having a plurality of openings
`
`for forming wiring grooves, on the conductive film; a sixth step
`
`of etching the conductive film using the first resist pattern as
`
`20
`
`a mask, thereby forming a mask pattern out of the conductive film
`
`to have the Openings for forming wiring grooves; a seventh step
`
`of forming a second resist pattern, having a plurality of openings
`
`for forming contact holes, on the third insulating film; an eighth
`
`step of dry— etching the third insulating film under such conditions
`
`25
`
`that the third insulating film and the first and second resist
`
`patterns are etched at a relatively high rate and that the second
`
`insulating film is etched at a relatively low rate,
`
`thereby
`
`10
`
`IPR2016-01377 Page 0014
`
`IPR2016-01377 Page 0014
`
`
`
`
`
`patterning the third insulating fihm to have the openings for
`
`forming contact holes and removing the first and second resist
`
`patterns either entirely or partially with reSpective lower parts
`
`thereof left; a ninth step of dry-etching the second insulating
`
`5
`
`film using the patterned third insulating film as a mask under such
`
`conditions that the second insulating film is etched at a relatively
`
`high rate and that the first and third insulating films are etched
`
`a1:a.re1atively.low;rate, thereby patterning the second.insulating
`
`filflltO have the openings for forming contact holes; a tenth step
`
`10
`
`of dry-etching the third and first insulating films using the mask
`
`pattern and the patterned second insulating film as respective masks
`
`under such conditions that the first and third insulating films
`
`are etched at a relatively high rate and that the mask pattern
`
`and the second insulating film are etched at a relatively low rate,
`
`15
`
`thereby forming wiring grooves and contact holes in the third and
`
`first insulating films , respectively; and an eleventh step of filling
`
`in the wiring grooves and the contact holes with a metal film, thereby
`
`forming upper-level metal interconnects and.contacts connecting the
`
`lower— and upper-level metal interconnects together.
`
`20
`
`In the first method for forming an interconnection structure,
`
`the third insulating film is dry—etched under such conditions that
`
`the third insulating film and the first and second resist patterns
`
`are etched at a relatively high rate and that the second insulating
`
`film is etched at a relatively low rate, thereby patterning the
`
`25
`
`third insulating film and removing the first and second resist
`
`patterns in the eighth step. Accordingly, it is not necessary
`
`to perform the step of ashing and removing the first and second
`
`11
`
`IPR2016-01377 Page 0015
`
`IPR2016-01377 Page 0015
`
`
`
`
`
`resist patterns with oxygen plasma.
`
`Furthermore, the composition of the second insulating film is
`
`different from that of the third insulating film. Thus, the second
`
`insulating film can be used as an etch stopper while the wiring grooves
`
`5
`
`are formed by dry—etching the third insulating film using the mask
`
`pattern as a mask in the tenth step.
`
`The first method for forming an interconnection structure
`
`preferably further includes the step of forming a metal adhesion layer
`
`over part of the third insulating film exposed inside the wiring
`
`10
`
`grooves and part of the first insulating film exposed inside the
`
`contact holes between the tenth and eleventh steps.
`
`In the first method for forming an interconnection structure,
`
`the third insulating film is preferably mainly composed of an organic
`
`component.
`
`15
`
`In this case, the third step preferably includes forming the
`
`third insulating film by a CVD process using a reactive gas containing
`
`perfluorodecal in .
`
`Further, the first insulating film is also preferably mainly
`
`composed of an organic component.
`
`20
`
`In the case where the first and second insulating films are both
`
`mainly composed of organic components, the first method preferably
`
`further includes the step of forming an adhesion layer over part of
`
`the third insulating film exposed inside the wiring grooves and part
`
`of the first insulating film exposed inside the contact holes by a
`
`25
`
`plasma process using a reactive gas containing nitrogen between the
`
`tenth and eleventh steps.
`
`In the case where the first insulating film is mainly composed
`
`12
`
`IPR2016-01377 Page 0016
`
`IPR2016-01377 Page 0016
`
`
`
`
`
`of an organic component, the first step preferably includes forming
`
`the first insulating film by a CVD process using a reactive gas
`
`containing perfluorodecalin.
`
`A second method for forming an interconnection structure
`
`5
`
`according to the present invention includes: a first step of forming
`
`a first insulating film over lower-level metal interconnects; a
`
`second step of forming a second insulating film, having a different
`
`composition than that of the first insulating film, over the first
`
`insulating film; a third step Of forming a third insulating film,
`
`10
`
`having a different composition than that of the second insulating
`
`film, over the second insulating film; a fourth step of forming
`
`a conductive film over the third insulating film; a fifth step
`
`of forming a first resist pattern, having a plurality of Openings
`
`for forming wiring grooves, on the conductive film; a sixth step
`
`15
`
`Of etching the conductive film using the first resist pattern as
`
`a mask, thereby forming a mask pattern out of the conductive film
`
`to have the openings for forming wiring grooves; a seventh step
`
`of forming a second resist pattern, having a plurality of Openings
`
`for forming contact holes, on the third insulating film; an eighth
`
`20
`
`step of dry—etching the third insulating film using the first and
`
`second resist patterns as a mask under such conditions that the
`
`third insulating film is etched at a relatively high rate and that
`
`the second insulating film and the first and second resist patterns
`
`are etched at a relatively low rate, thereby patterning the third
`
`25
`
`insulating film to have the Openings for forming OOntact holes;
`
`a ninth step of dry—etching the second insulating film using the
`
`first and second resist patterns as a mask under such conditions
`
`13
`
`IPR2016-01377 Page 0017
`
`IPR2016-01377 Page 0017
`
`
`
`that the second insulating film is etched at a relatively high rate
`
`and that the first and third insulating films and the first and
`
`second resist patterns are etched at a relatively low rate, thereby
`
`patterning the second insulating film to have the openings for
`
`forming contact holes; a tenth step of removing the first and
`
`second resist patterns; an eleventh step of dry—etching the third
`
`and first insulating films using the mask pattern and the patterned
`
`second insulating film as respective masks under such conditions
`
`that the first and third insulating films are etched at a relatively
`
`10
`
`high rate and that the mask pattern and the second insulating film
`
`are etched at a relatively low rate, thereby forming wiring grooves
`
`and contact holes
`
`in the third and first
`
`insulating films,
`
`respectively; and a twelfth step of filling in the wiring grooves and
`
`the contact holes with a metal film, thereby forming upper—level metal
`
`15
`
`interconnects and contacts connecting the lower- and upper-level
`
`metal interconnects together.
`
`In the second method for forming an interconnection structure,
`
`20
`
`25
`
`even if a damaged layer is formed in reSpective parts of the first
`
`and third insulating films that are exposed inside the Openings for
`
`forming contact holes in the second insulating film during the tenth
`
`step of removing the first and second resist patterns, the third and
`
`first insulating films are dry-etched using the mask pattern and
`
`the patterned second insulating film as respective masks in the
`
`eleventh step under such conditions that the first and third
`
`insulating films are etched at a relatively high rate and that the
`
`mask pattern and the second insulating film are etched at a
`
`relatively low rate,
`
`thereby forming wiring grooves and contact
`
`14
`
`IPR2016-01377 Page 0018
`
`IPR2016-01377 Page 0018
`
`
`
`
`
`holes
`
`in the third and first
`
`insulating films,
`
`respectively.
`
`Accordingly,
`
`the damaged layer can be removed without fail.
`
`In the second method for forming an interconnection structure,
`
`the third insulating film is preferably a low—dielectric—constant SOG
`
`5
`
`film with a siloxane skeleton.
`
`[Embodiments of the Invention]
`
`(First Embodiment)
`
`Hereinafter,
`
`an
`
`exemplary method
`
`for
`
`forming
`
`an
`
`interconnection structure according to the first embodiment of the
`
`10
`
`present invention will be described with reference to Figures 1(a)
`
`through 1(c), Figures 2(a) through 2(c) and Figures 3(a) through
`
`3(c).
`
`First, as shown in Figure 1(a), a silicon nitride film 102
`
`is
`
`formed over
`
`first metal
`
`interconnects
`
`101
`
`formed on a
`
`15
`
`semiconductor substrate 100 . The silicon nitride film 102 is formed
`
`to be, for example, 50 nm thick, and used to protect the first metal
`
`interconnects
`
`101 during a
`
`subsequent etching process step.
`
`Thereafter, a first organic film 103 , mainly composed of an organic
`
`component, is formed to be, for example,
`
`1 pm thick on the silicon
`
`20
`
`nitride film 102. Next, an organic-containing silicon dioxide film
`
`104, containing an organic component in silicon dioxide, is formed
`
`to be, for example, 50 nm thick on the first organic film 103 . Then,
`
`a second organic film 105, mainly composed of an organic component,
`
`is formed to be, for example, 400 nm thick on the organic—containing
`
`25
`
`silicon dioxide film 104 . And, a titanium nitride film 106 is formed
`
`to be, for example, 50 nm thick on the second organic film 105.
`
`The first and second organic films 103 and 105 may be deposited
`
`15
`
`IPR2016-01377 Page 0019
`
`IPR2016-01377 Page 0019
`
`
`
`
`
`by any arbitrary technique. For example,
`
`these films 103 and 105
`
`may be deposited by a plasma CVD process using a reactive gas mainly
`
`composed of perfluorodecalin.
`
`Also,
`
`hydrocarbon films or
`
`fluorine—containing hydrocarbon films,
`
`formed by plasma CVD,
`
`5
`
`coating or thermal CVD, may be used as the first and second organic
`
`films 103 and 105.
`
`Moreover, the first organic film 103 may be deposited by a
`
`plasma CVD process using a
`
`reactive gas mainly composed of
`
`perfluorodecalin and organic silane such as hexamethyl disiloxane,
`
`10
`
`arylalkoxy silane or alkylalkoxy silane.
`
`In such a case, an
`
`organic/ inorganic hybrid film can be obtained.
`
`Similarly, the organic—containing silicon dioxide film 104
`
`may also be deposited by any arbitrary technique. For instance, the
`
`film 104 may be deposited by a CVD process using a reactive gas mainly
`
`15
`
`composed of phenyltrjmethoxy silane.
`
`In such a case,
`
`an
`
`organic—containing silicon dioxide film 104, having a structure in
`
`which a phenyl group bonded to a silicon atom is introduced into
`
`silicon dioxide, can be obtained.
`
`Next, as shown in Figure 1(b), a first resist pattern 107,
`
`20
`
`having openings for forming wiring grooves , is formed by lithography
`
`on the titanium nitride film 106. Thereafter, the titanium nitride
`
`film 106 is dry—etched using the first resist pattern 107 as a mask,
`
`thereby forming a mask pattern 108 out of the titanium nitride film
`
`106 as shown in Figure 1(c).
`
`25
`
`Subsequently, a second resist pattern 109 , having Openings for
`
`forming contact holes , is formed by lithography on the second organic
`
`film 105 without removing the first resist pattern 107.
`
`IThen, the
`
`15
`
`IPR2016-01377 Page 0020
`
`IPR2016-01377 Page 0020
`
`
`
`second organic film 105 is dry—etched, thereby forming a patterned
`
`second organic film 105A having the openings for forming contact holes
`
`as shown in Figure 2(a).
`
`In this case, since the second organic film
`
`105 and the first and second resist patterns 107 and 109 are all mainly
`
`composed of organic components, the second organic film 105 is etched
`
`at a substantially equal rate to that of the first and second resist
`
`patterns 10? and 109. Thus, when the second organic film 105 is
`
`dry—etched, the first and second resist patterns 10? and 109 are also
`
`removed simultaneously.
`
`10
`
`It should be noted that part of the second resist pattern 109
`
`may be left in the process step of dry—etching the second organic
`
`film 105. This is because the residual second resist pattern 109
`
`can be removed during a subsequent process step of forming wiring
`
`grooves 111 in the patterned second organic film 105A (see Figure
`
`15
`
`2(c)).
`
`Then,
`
`the organic—containing silicon dioxide film 104 is
`
`dry—etched using the patterned second organic film 105A as a mask,
`
`thereby forming a patterned organic—containing silicon dioxide film
`
`104A having the openings for forming contact holes as shown in Figure
`
`2(b) .
`
`In this process step, by selecting such etching conditions
`
`that the organic-containing silicon dioxide film 104 is etched at
`
`a rate higher than that of the patterned second organic fihn 105A,
`
`it is possible to prevent the patterned second organic film 105A
`
`from being erroneously etched.
`
`Next, the patterned second organic film 105A is dry—etched
`
`using the mask pattern 108 as a mask,
`
`thereby forming the wiring
`
`grooves l l 1 in the patterned second organic film 1 USA as shown in Figure
`
`20
`
`25
`
`‘7
`
`IPR2016-01377 Page 0021
`
`IPR2016-01377 Page 0021
`
`
`
`2{c) . At the same time, the first organic film 103 is also dry-etched
`
`using the patterned organic-containing silicon dioxide film 104A as
`
`a mask, thereby forming a patterned first organic film 103A having
`
`the contact holes as shown in Figure 2(c) .
`
`Subsequently, the silicon nitride film 102 is dry-etched using
`
`the patterned organic-containing silicon dioxide fihn 1
Accessing this document will incur an additional charge of $.
After purchase, you can access this document again without charge.
Accept $ Charge
Still Working On It
This document is taking longer than usual to download. This can happen if we need to contact the court directly to obtain the document and their servers are running slowly.
Give it another minute or two to complete, and then try the refresh button.
A few More Minutes ... Still Working
It can take up to 5 minutes for us to download a document if the court servers are running slowly.
Thank you for your continued patience.
This document could not be displayed.
We could not find this document within its docket. Please go back to the docket page and check the link. If that does not work, go back to the docket and refresh it to pull the newest information.
Your account does not support viewing this document.
You need a Paid Account to view this document. Click here to change your account type.
Your account does not support viewing this document.
Set your membership
status to view this document.
With a Docket Alarm membership, you'll
get a whole lot more, including:
- Up-to-date information for this case.
- Email alerts whenever there is an update.
- Full text search for other cases.
- Get email alerts whenever a new case matches your search.
One Moment Please
The filing “” is large (MB) and is being downloaded.
Please refresh this page in a few minutes to see if the filing has been downloaded. The filing will also be emailed to you when the download completes.
Your document is on its way!
If you do not receive the document in five minutes, contact support at support@docketalarm.com.
Sealed Document
We are unable to display this document, it may be under a court ordered seal.
If you have proper credentials to access the file, you may proceed directly to the court's system using your government issued username and password.
Access Government Site
