`
`
`United States Patent
`
`
`Brooks et a1.
`
`
`[19]
`
`[54] SELECTIVE PLASMA ETCHING 0F
`
`
`
`
`SILICON NITRIDE IN PRESENCE OF
`
`
`
`SILICON OR SILICON OXIDES USING
`
`
`
`
`MIXTURE OF CH3F OR CH2F2 AND CF4
`
`
`
`
`AND 02
`
`
`
`[75]
`
`
`
`
`
`
`Inventors: Cynthia B. Brooks. Sunnyvale; Walter
`
`
`
`
`
`Merry. Cupertino; Ajey M. Joshi. San
`Jose; Gladys D. Quinones. Santa Clara;
`
`
`
`
`
`
`
`
`
`
`
`Jitske Trevor. Sunnyvale. all of Calif.
`
`[73] Assignee: Applied Materials, Inc.. Santa Clara.
`
`
`
`
`
`
`Calif.
`
`
`
`
`
`
`Appl. No.: 829,683
`Mar. 31, 1997
`
`
`
`Filed:
`
`
`
`
`
`Int. CL6 ............................. B44C 1/22;H01L 21/302
`
`
`
`
`
`
`
`US. Cl. .......................... 438/724; 438/719; 438/723;
`
`
`
`
`
`438/740
`
`Field of Search ..................................... 438N241», 719.
`
`
`
`
`
`438/723. 740
`
`
`
`[21]
`
`[22]
`
`
`[5 1]
`1521
`
`[5 8}
`
`
`
`
`
`
`[56]
`
`
`References Cited
`
`
`U.S. PATENT DOCUMENTS
`
`
`
`7/1985 Kawamoto et a1.
`
`
`
`
`
`4,529,476
`
`
`
`USOOS786276A
`
`
`
`
`[11] Patent Number:
`
`
`
`[45] Date of Patent:
`
`5,786,276
`
`
`Jul. 28, 1998
`
`
`
`
`4,654,114
`5,201,994
`5,318,668
`
`
`
`
`
`
`
`3/1987 Kadomura ............................... 156/643
`
`
`
`4/1993 Nonaka et a1.
`156/643
`
`
`
`
`
`6/1994 Tamaki et a1.
`.......................... 156/662
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`FOREIGN PATENT DOCUMENTS
`
`
`
`
`
`60-115231
`
`
`
`6/1985
`
`
`
`Japan.
`
`
`Primary Examiner—R. Bruce Breneman
`
`
`
`
`
`
`Assistant Examiner—George Goudreau
`Attorney; Agent, or Firm—Fliesler. Dubb. Meyer & Lovejoy
`
`
`
`
`
`
`
`
`
`
`[57]
`
`
`
`ABSTRACT
`
`
`
`A chemical downstream etching (CDE) that is selective to
`
`
`
`
`
`
`
`silicon nitrides (SiN) over silicon oxides (SiO) uses at least
`
`
`
`
`
`
`
`
`
`one of a CH3F/CF4/O2 recipe and a Cile-z/CFJO2 recipe.
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`Inflow rates are mapped for the respective components of
`
`
`
`
`
`
`
`
`
`
`the input recipe to find settings that provide both high nitride
`etch rates and high selectivity towards the SiN material. A
`
`
`
`
`
`
`
`
`
`pins-up scheme is used for simultaneously stripping away
`
`
`
`
`
`
`
`backside nitride with topside nitride.
`
`
`
`
`
`
`156/643
`
`
`
`18 Claims, 6 Drawing Sheets
`
`
`
`
`
`
`CF4 (mole
`fraction)
`
`
`
`__.,
`\\\\\\\\-
`\\Wfi%_\x\_
`_
`
`lie?
`1
`A1‘ 0.8
`
`0.1
`
`
`
`0
`
`
`07
`
`
`06
`
`
`
`05
`
`
`
`
`
`04
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`.1
`
`
`
`
`
`02(moIe
`fraction)
`
`
`
`<1000(f)
`
`
`
`2000-3000
`
`
`
`
`
`4000-5000
`
`
`
`1000-2000
`
`
`
`3000-4000
`
`
`
`5000-6000 (a)
`
`
`
`
`
`
`
`
`
`SiN Etch
`
`
`Rate
`(Armin)
`
`
`
`Page 1 0f 14
`
`TSMC Exhibit 1041
`
`TSMC v. IP Bridge
`IPR2016-01376
`
`Page 1 of 14
`
`TSMC Exhibit 1041
`TSMC v. IP Bridge
`IPR2016-01376
`
`

`

`
`US. Patent
`
`
`
`
`
`
`Jul. 28, 1998
`
`
`
`Sheet 1 of 6
`
`5,786,276
`
`
`
`
`
`
`
`
`
`
`
`
`
`87\;o_wxod<ox093xmmESx09305
`
`....
`
`
`
`
`
`0mm?9mm?§39\\.Bfiomfi\.BE95.
`
`mm?
`
`
`
`
`
`
`
`KN?mm?
`
`
`
`
`
`am§m§\\\\\\\\\\\\\\\\\\\\\\\239%:\\\\\\\\\\\\\\\\\\\§§
`
`
`
`
`
`
`
`
`
`mmanmmmzwh3.86%024.5:20
`
`
`fl.GE
`
`
`
`
`
`
`
` 8?+d".55;\N:87%«Eq223182.6528do:
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`...§:fiom.w:§322322332:-02-
`
`
`
`
`
`
`
`oedmmxmwufimmm
`
`
`
`
`
`
`mmw<0P3mZ.«fight—200JOKPZOOmmmOOmmSEm:02m3ma
`momDOmmomDOm
`
`
`
`
`
`
`
`
`
`
`Page 2 0f 14
`
`Page 2 of 14
`
`
`
`

`

`
`
`US. Patent
`
`
`
`
`Jul. 28, 1998
`
`
`Sheet 2 0f 6
`
`5,786,276
`
`
`
`
`
`CF4 (mole
`fraction)
`
`
`
`
`
`c
`
`d
`
`,‘TEMEL 07
`W '
`“$3; .-
`0.1
`0'8
`b M4,".
`
`
`
`a
`
`0.7
`
`
`
`
`0.6
`
`
`0.5
`
`0.4
`
`
`
`0.3
`
`
`
`0.2
`
`
`
`0.1
`
`
`
`
`
`02 (mole
`
`fraction)
`
`
`
`
`<1000 (f)
`
`k\\\\\\\\‘
`
`
`1000—2000
`
`
`
`SiN Etch
`Sate
`
`
`
`
`(min)
`
`I
`
`2000-3000 W 30004000
`
`4000—5000
`
`
`
`
`5000-6000 (a)
`
`
`FIG. 2
`
`Page 3 0f 14
`
`Page 3 of 14
`
`

`

`
`US. Patent
`
`
`
`
`
`Jul. 23, 1998
`
`
`
`
`Sheet 3 of 6
`
`5,786,276
`
`
`
`CH3 F(m0le
`fraction)
`
`CF4 (mote
`fraction)
`
`
`
`
`
`
`
`A“
`*'-:-:‘:~;-:
`2
`’ __0.a
`
`............‘-
`
`
`
`
`
`0-1
`
`
`
`
`
`
`
`
`
`06
`
`
`
`
`0.5
`
`
`
`
`0.4
`
`
`
`
`0.3
`
`
`
`
`0.2
`
`
`
`
`
`0.1
`
`
`
`
`
`
`
`
`02 (mole
`
`fraction)
`
` <10 (a) m 1020
`
`
`,
`
`
`20-30 W 30-40
`
`
`
`
`
`
`>50 (f)
`
`
`
`
`40—50
`
`
`FIG. 3
`
`
`
`
`Si02 Etch
`Rate
`
`(Almin)
`
`
`
`Page 4 0f 14
`
`Page 4 of 14
`
`

`

`
`
`US. Patent
`
`
`
`
`Jul. 28, 1998
`
`
`Sheet 4 of 6
`
`5,786,276
`
`
`
`0-6
`
`0.3
`
`CH3F(mole
`0‘4
`fraction) A
`
`CF4 (mole
`fractlon)
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`02 (mole
`
`fraction)
`
` Selectivity
`
`
`
`
`
`<100 (e) M 100-200 (Cl)
`
`
`
`
`200-300 (c) W 300400 (b)
`
`
`
`
`
`> 400 (a)
`
`
`FIG. 4
`
`Page 5 0f 14
`
`Page 5 of 14
`
`

`

`US. Patent
`
`
`
`
`Jul. 28, 1998
`
`
`
`
`
`Sheet 5 of 6
`
`
`5,786,276
`
`
`
`
`
`Mole Fractions:
`
`
`
`Page 6 0f 14
`
`Page 6 of 14
`
`

`

`
`US. Patent
`
`
`
`
`
`
`Jul. 28, 1998
`
`
`Sheet 6 of 6
`
`5,786,276
`
`
`
`
`
`Mole Fractions:
`
`
`
`1.0
`
`0.9
`
`0.8
`
`0.7
`
`0.6
`
`0.5
`
`0.4
`
`0.3
`
`0.2
`
`0.1
`
`Page 7 0f 14
`
`Page 7 of 14
`
`

`

`1
`
`SELECTIVE PLASMA ETCHING OF
`
`
`
`SILICON NITRIDE IN PRESENCE OF
`
`
`
`SILICON OR SILICON OXIDES USING
`
`
`
`
`MIXTURE OF CH3F OR CHZFZ AND CF4
`
`
`
`
`
`AND 02
`
`
`BACKGROUND
`
`
`10
`
`15
`
`20
`
`
`25
`
`
`30
`
`
`
`35
`
`
`
`1. Field of the Invention
`
`
`
`
`
`
`
`
`
`
`The invention is generally directed to plasma etching of
`silicon nitrides. The invention is more specifically directed
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`to dry chemical downstream etching (CDE) selectively of
`silicon nitride (SiN) in the presence of silicon or silicon
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`oxide using a plasma containing fluorine (F). hydrogen (H).
`carbon (C) and oxygen (0).
`
`
`
`
`
`2. Cross Reference to Related Applications
`
`
`
`
`
`
`
`
`
`
`
`
`The following copending US. patent application is
`
`
`
`
`
`
`
`
`assigned to the assignee of the present application. and its]
`
`
`
`
`disclosures is incorporated herein by reference:
`(A) Ser. No. 08/499984 filed Jul. 10. 1995 by H. Herchen
`
`
`
`
`
`
`
`
`
`et a1 and entitled. “MICROWAVE PLASMA BASED
`
`
`
`
`
`
`
`APPLICATOR”.
`
`3. Cross Reference to Other Patents
`
`
`
`
`
`The following US. or foreign patents are cited by way of
`
`
`
`
`
`
`
`
`reference:
`
`(A) US. Pat. No. 4.529.476 issued Jul. 16. 1985 to
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`Kawamoto et al and entitled “Gas for selectively etch-
`
`
`
`
`
`
`
`
`ing silicon nitride and process for selectively etching
`silicon nitride with the gas”;
`
`
`
`
`
`(B) US. Pat. No. 4.654.114 issued Mar. 31. 1987 to
`
`
`
`
`
`
`
`
`
`Kadomura et al and entitled “Dry etching method for
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`selectively etching silicon nitride existing on silicon
`dioxide”;
`
`(C) US. Pat. No. 4.857.140 issued Aug. 15. 1989 to
`
`
`
`
`
`
`
`
`
`Lowenstein and entitled “Method for etching silicon
`
`
`
`
`
`
`nitride”;
`
`(D) U.S. Pat. No. 4.820.378 issued Apr. 11. 1989 to
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`Lowenstein and entitled “Process for etching silicon
`nitride selectively to silicon dioxide”;
`
`
`
`
`(E) US. Pat. No. 5.201.994 issued Apr. 13. 1993 to
`
`
`
`
`
`
`
`
`
`Nonaka et al and entitled “Dry etching method”;
`
`
`
`
`
`
`(F) US. Pat. No. 4.793.897 issued Dec. 27. 1988 to
`
`
`
`
`
`
`
`
`
`Dunfreld et al and entitled “Selective thin film etch
`
`
`
`
`
`
`
`
`process”; and
`
`
`(G) U.S. Pat. No. 5.180.466 issued Jan. 19. 1993 to Shin
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`and entitled “Dry etching silicon nitride using sulphur
`
`
`hexafluoride gas”.
`4. Cross Reference to Other Publications
`
`
`
`
`
`
`
`
`
`
`
`
`
`The following other publications are cited by way of
`reference:
`
`(A) L. M. Lowenstein. “Selective etching of silicon
`
`
`
`
`
`
`
`
`nitride using remote plasmas of CF4 and SFG”. J. Vac.
`
`
`
`
`
`
`
`Sci. Technol. A. Vol 7. No. 3. May/June 1989. pgs
`
`
`
`
`
`
`
`
`686—690; and
`
`
`(B) EPO publication 0_658_928_Al June 1995.
`
`
`
`
`
`
`
`
`
`
`
`
`“Method of plasma etching silicon dioxide selectively
`to silicon nitride and polysilicon”. by M. S. Barnes
`
`
`
`
`
`
`
`(IBM).
`
`5. Description of the Related Art
`
`
`
`
`
`During the manufacture of miniaturized devices such as
`
`
`
`
`
`
`integrated circuits (IC‘s) and the like. intermediate and/or
`
`
`
`
`
`
`
`
`final structures are often formed with combinations of
`
`
`
`
`
`
`
`
`patterned materials defined thm'eon where the combinations
`
`
`
`
`
`
`are composed of oxides and nitrides of silicon disposed
`
`
`
`
`
`
`
`
`adjacent to one another. The oxides and nitrides may be
`
`
`
`
`
`
`
`
`
`45
`
`50
`
`
`
`
`55
`
`
`
`
`
`65
`
`
`
`Page 8 of 14
`
`5,786,276
`
`
`
`2
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`further disposed adjacent to monocrystalline. polycrystalline
`or other forms of silicon.
`
`
`
`
`It is often times desirable to strip away or otherwise etch
`
`
`
`
`
`
`
`the silicon nitride material while not significantly etching
`
`
`
`
`
`
`
`into adjacent silicon or silicon oxide.
`
`
`
`
`
`
`
`
`
`
`
`
`In commercial settings.
`the following parameters are
`
`
`
`
`
`usually considered important for mass-production stripping
`or etching of silicon nitride:
`
`
`
`
`
`
`
`
`
`
`
`
`(1) etch rate of the silicon nitride (typically measured in
`Angstroms per minute or ‘A/min‘);
`
`
`
`
`(2) selectivity for removal of silicon nitride over removal
`
`
`
`
`
`
`
`
`of silicon oxide or silicon (typically measured as the
`
`
`
`
`
`
`
`ratio of the respective etch rates for these materials):
`
`
`
`
`
`
`
`
`
`(3) cross-wafer uniformity of etch depth in the silicon
`
`
`
`
`
`
`
`
`nitride layer (typically measured as a percentage of
`
`
`
`
`
`
`deviation);
`
`(4) cross-wafer uniformity of etch depth. if any. in the
`
`
`
`
`
`
`
`silicon oxide layer; and
`
`
`
`
`(5) removability of solid or other residues.
`
`
`
`
`
`In the past. silicon nitride was selectively removed by way
`
`
`
`
`
`
`
`
`
`of wet etching with hot phosphoric acid (e.g.. 160° C.). Wet
`
`
`
`
`
`
`
`
`
`
`
`etching suffers from drawbacks such as: difficulty of filtering
`
`
`
`
`
`
`
`out unwanted particles from the viscous etch liquid; high
`
`
`
`
`
`
`
`
`
`cost of disposing of wet waste material; process control
`
`
`
`
`
`
`
`
`
`problems relating to variations in concentration of H3PO4 in
`
`
`
`
`
`the wet etch solutions over time; contamination problems;
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`and problems associated with the high cost and low reli-
`ability of transferring wafers from wet etch baths to subse-
`
`
`
`
`
`
`
`
`
`quent dry process stations.
`
`
`
`
`As a result of such drawbacks. a number of workers in the
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`field have begun to use dry plasma etching of silicon nitride
`instead of wet etching. Dry plasma etching often uses
`
`
`
`
`
`
`
`
`
`disassociated radicals of fluorine or of other halogens for
`
`
`
`
`
`
`
`
`etching quickly through the otherwise diflicult—to—cut silicon
`
`
`
`
`
`
`
`nitride material.
`
`
`Unfortunately. fluorine and other like halogen radicals are
`
`
`
`
`
`
`
`not highly selective and tend to etch even more quickly
`
`
`
`
`
`
`
`
`through adjacent silicon (Si) and silicon oxide (SiO) rather
`
`
`
`
`
`
`
`
`than through the silicon nitride (SiN).
`
`
`
`
`
`
`A variety of methods have been tried with limited success
`
`
`
`
`
`
`
`
`
`for achieving selective etching of silicon nitride and for
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`simultaneously realizing commercially acceptable balances
`between desirable results such as: (1) high silicon nitride
`
`
`
`
`
`
`
`
`
`etch rate. (2) high selectivity for silicon nitride over silicon
`
`
`
`
`
`
`
`
`
`
`oxide and/or over silicon. (3) good cross—wafer uniformity
`
`
`
`
`
`
`
`
`of etch depth in the silicon nitride layer. (4) low wafer
`
`
`
`
`
`
`
`
`
`
`temperature. (5) good process repeatability. (6) low process
`
`
`
`
`
`
`
`
`costs. and so forth.
`
`
`
`The present application discloses an improved method
`
`
`
`
`
`
`
`and system for selective plasma etching of silicon nitrides in
`
`
`
`
`
`
`
`the presence of silicon or sflicon oxides using a remote
`
`
`
`
`
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`plasma containing fluorine (F). hydrogen (H). carbon (C)
`and oxygen (0).
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`SUMMARY OF THE INVENTION
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`In accordance with a first aspect of the invention. one or
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`both of the gaseous compounds. CH3F (methyl fluoride) and
`CHZF2 (ethyl difluoride) are used in combination with CF4
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`(carbon tetrafluoride) and 02 (oxygen) to create a remote
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`plasma. A downstream output (afterglow) of the plasma is
`applied to a wafer or other like workpiece that has exposed
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`silicon nitride adjacent to exposed silicon oxide and/or
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`exposed silicon.
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`In accordance with a second aspect of the invention.
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`selective plasma afterglow etching with CHSF. CH2F2. CE.
`and 02 (one of first and second items optional) is followed
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`Page 8 of 14
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`3
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`by rinse with deionized H20 to remove an NH4F solid
`residue from the etched wafer (or other like workpiece).
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`More specifically. in one chemical downstream etching
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`(CDE) system in accordance with the invention. the recipe
`ranges of Table 1A have been found to be particularly
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`advantageous:
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`TABLE 1A
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`Range (center point plus
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` Parameter or minus deviation)
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`Power (Watts)
`750 i 50
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`Pressure (milliTorr)
`500 i 50
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`CF‘ inflow (sccrn)
`117 i 15
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`O2 inflow (seem)
`257 :t 15
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`C113]? inflow (seem)
`77 :t 10
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`Chuck temperature (°C.) 30 :i: 5
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`Other parameters for the above Table 1A are:
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`RF frequency: 2.45 GHz and
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`Wafer backside Helium cooling pressure: 8 Torr. The
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`central recipe point of Table 1A has been found to exhibit
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`SiN etch rates of about 2500 Almin or higher and selectivity
`for nitride over oxide of about 60 to l or greater.
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`In a second chemical downstream etching (CDE) system
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`in accordance with the invention. the following recipes of
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`Tables 1B and 1C have been found to be useful:
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`TABLE 1B
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`Range (center point plus
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` Parameter or minus deviation)
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`Power (Watts)
`750 i: 50
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`Pressure (milliTorr)
`480 :t 50
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`CF4 inflow (seem)
`110 :i: 15
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`O2 inflow (seem)
`190 i 10
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`CH2F2 inflow (seem)
`150 i 10
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`Chuck temperature (°C.) 30 i: 5
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`TABLE 1C
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`Range (center point plus
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` Parameter or minus deviation)
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`Power (Watts)
`750 i 50
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`Pressure (milliTorr)
`480 i 50
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`CF, inflow (seem)
`280 i 10
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`02 inflow (seem)
`80 i It)
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`CHQFZ inflow (seem)
`100 :t 10
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`Chuck temperature (°C.) 30 i 5
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`45
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`Other aspects of the invention will become apparent from
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`the below detailed description.
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`BRIEF DESCRIPTION OF THE DRAWINGS
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`The invention will be described with reference to the
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`following drawing(s) in which:
`FIG. 1 is a cross—sectional schematic of a chemical
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`downstream etching (CDE) system for carrying out a dry
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`etch process in accordance with the invention;
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`FIG. 2 is a plot showing experimental results of SiN etch
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`rate over a range of plasma feed parameters for three input
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`gases;
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`FIG. 3 is a plot showing experimental results of SiO etch
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`rate over a range of plasma feed parameters for the three
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`input gases of FIG. 2;
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`FIG. 4 is a plot showing experimental results of SiN/SiO
`etch rate ratio over a range of plasma feed parameters for the
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`three input gases of FIG. 2;
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`Page 9 of 14
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`4
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`FIG. 5 is a plot indicating preferred operating ranges for
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`achieving improved SiN etch rate and improved selecn'vity
`over SiO within the illustrated range of plasma feed param-
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`eters for the CH3F/CF4/O2 recipe: and
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`FIG. 6 is a plot indicating preferred operating ranges for
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`achieving improved SiN etch rate and improved selectivity
`over SiO within the illustrated range of plasma feed param-
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`eters for the CH2F2/CF4/O2 recipe.
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`DETAILED DESCRIPTION
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`FIG. 1 schematically shows in cross-section a chemical
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`downstream etching (CDE) system 100 in accordance with
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`the invention. (A more detailed mechanical description of
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`the basic etching apparatus may be found for example in the
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`above-cited application Ser. No. 08/499984)
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`CDE system 100 includes a low-pressure chamber 105
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`within which there are provided. a plasma-forming means
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`(e.g.. applicator 161) and a wafer-supporting chuck 110.
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`The wafer-supporting chuck 110 may be used for tempo—
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`rarily holding a wafer 120 (or another like workpiece) in a
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`predefined location within the low-pressure chamber 105. In
`one embodiment. a robotic blade (not shown) transports the
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`wafer 120 to a position above a wafer-holding surface 110a
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`of the chuck 110. Reciprocating pins 112 then rise to lift the
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`wafer 120 off the blade. The blade retracts and the pins 112
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`are thereafter lowered to bring the wafer 120 down onto the
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`wafer-holding surface 110a of the chuck. Electrostatic or
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`other clamping means are then energized to clamp the
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`backside (e.g.. 121) of the wafer to the wafer-supporting
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`chuck 110.
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`A temperature control means (not separately shown) may
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`be provided within or in addition to the chuck 110 for
`maintaining a wafer backside temperature in the range of
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`approximately 20° C. to 100° C. The backside temperature
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`of wafer 120 is more preferably maintained at approximately
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`30° C. or less.
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`The wafer-temperature control means (not separately
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`shown) can include for example a fluid-cooled heat
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`exchange system such as a backside helium-flow cooling
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`system integrated into the wafer-holding chuck 110.
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`Although not shown. additional
`temperature control
`means may be provided about the walls of the chamber 105
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`for controlling the temperatures of the inner surfaces of
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`these chamber walls near the wafer 120. The additional
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`temperature control means (not shown) may be in the form
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`of electric heaters and/or heat exchange water jackets buried
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`in the chamber walls between their inner and outer surfaces.
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`Temperature sensors (not shown) may also be generally
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`included in the chuck and/or in the chamber walls for
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`determining the current temperatures of the wafer and of the
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`inner surfaces of the chamber walls and for generating
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`integral
`feedback signals for use in PD) (proportional
`differential) feedback control of temperatures. The various
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`temperature control means may be controlled in open or
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`closed loop fashion by a process control computer 180.
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`The plasma-forming applicator 161 within the low—
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`pressure chamber 105 is preferably positioned. gas flow-
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`wise. 8 to 24 inches away from the wafer-holding surface
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`110a of chuck 110. Applicator 161 is used for producing
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`thereat a remote plasma 160 (to be described shortly). The
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`applicator 161 is spaced away from the wafer 120 such that
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`the plasma 160 forms upstream of the wafer 120 without
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`directly impinging on the wafer. One advantage of such
`remote formation of a plasma is that ballistic ions within the
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`plasma 160 do not strike and thereby potentially damage the
`exposed surfaces of the downstream wafer 120. Another
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`Page 9 of 14
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`5
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`advantage of remote plasma formation is that high tempera-
`tures which typically develop within the interior of the
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`plasma 160 are not contact—wise. or convection-wise.
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`coupled directly to the downstream wafer 120 as may occur
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`with directly impinging plasmas.
`The on-chuck workpiece (e.g.. wafer) 120 includes to-be-
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`etched silicon nitride 125 positioned in the neighborth of
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`exposed silicon oxide surfaces such as 123a, 123b, 123a
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`andlor positioned in the neighborhood of exposed silicon
`such as polycrystalline silicon region 124.
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`The to—be-etched silicon nitride may be in the form of a
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`pre-patterned layer 125 of Si3N4 that has been deposited by
`way of. for example. chemical vapor deposition (CVD) or
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`by other suitable means onto an underlying layer 123 of
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`SiOz. The to-be—etched silicon nitride may additionally or
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`alternatively be in the form of a non-patterned layer 121 of
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`SiaN4 that has been formed either on a neighboring layer of
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`silicon 122 (as shown) or on a neighboring layer of silicon
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`oxide (which latter configuration is not shown in FIG. 1).
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`FIG. 1 is atypical in that it seeks to depict a number of
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`difierent application scenarios in a single illustration. Each
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`scenario is one in which it might be desirable to selectively
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`etch silicon nitride in the presence of exposed silicon oxide
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`or exposed silicon. It is to be understood that typically only
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`one or a few. rather than all of these application scenarios are
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`present in a given instance. FIG. 1 attempts to compress the
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`difierent scenarios into a single illustration for brevity’s
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`sake.
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`In the examples set forth by FIG. 1. the on-chuck work-
`piece 120 includes a bulk substrate 122/123 to which one or
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`more silicon nitride layers such as 121 and 125 are attached
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`either directly or indirectly. The bulk substrate 122/123 may
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`be composed of one or more semiconductive or insulative
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`materials such as monocrystalline silicon (mono-Si) 122 or
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`polycrystalline silicon (poly-Si) 124 or amorphous silicon
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`(a-Si, not shown) or sapphire or other forms of silicon oxide
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`(Si02) 123. Other bulk substrate materials are of course
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`possible.
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`Afirst application scenario is represented by portions 127.
`123b, 123d, 125C, and 1220 of FIG. 1.
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`In this first application scenario. silicon nitride (SiN) as
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`represented generally by 125 has been formed on a thin
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`portion (pad__OX) of thermally pro-grown SiOz. The silicon
`oxide is represented generally by the designation. 125.
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`During or after formation.
`the silicon nitride has been
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`patterned into an SigN4 island 125c. At an edge (e.g., left
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`side) of SiN island 1250 there was exposed a surface portion
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`123d (shown by dashed line) of the underlying pad_0X.
`The wafer 120 was thereafter exposed to an oxidizing
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`environment which produced a thicker field-oxide (FOX)
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`portion 123b/127 extending below and above the earlier-
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`exposed surface portion 123d. Silicon nitride island 125c
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`served as an oxidation stop during the field-oxide growth
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`step and as such protected its underlying silicon region 122C
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`from being oxidized.
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`Portions 127. 123b, 123d, 125C, and 122C of FIG. 1
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`represent the next state wherein it is desirable to selectively
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`remove the silicon nitride island 125c- while preserving FOX
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`portion 123b/127 and the pad_0X over silicon region 122C.
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`A second. so-called ‘PBL’ application scenario is repre—
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`sented by portions 124, 125b, 122b, 1231: and 127 of FIG.
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`1. A polycrystalline silicon layer 124 has been formed on a
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`thin portion (pad_OX) of pre-formed SiO2 123. Silicon
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`nitride has been formed on top of the poly-Si layer 124. The
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`formed poly-Si and Si3N4 were patterned to create an island
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`124/125b having an edge (e.g.. right side of 124/125b) at
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`5 .786276
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`6
`which portion 123d of the underlying pad_OX was
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`exposed. The wafer 120 was thereafter exposed to an
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`oxidizing environment and this produced the thicker field-
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`oxide (FOX) portion l23b/127 at the side of the poly-Si]
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`nitride island 124/125b. Silicon nitride portion 125a has
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`served as an oxidation stop and as such has protected both
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`the covered poly-Si portion 124 and underlying silicon
`region 122b from being oxidized. FIG. 1 shows the next
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`state wherein it is desirable to selectively remove nitride
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`portion 125b (and optionally also poly-Si portion 124) while
`preserving FOX portion 123b/127 and the pad_OX over
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`silicon region 122b.
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`A third possible application scenario is represented by
`portions 128. 123c, 125c, and 122C of FIG. 1. A trench has
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`been formed at 128 extending into mono—Si substrate 122.
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`The trench has been filled with a CVD oxide that was
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`produced using TEOS (tetraethylorthosilicate) as a CVD
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`feed gas. The wafer 120 was thereafter exposed to an
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`oxidizing environment which produced a capping-oxide
`(CAP__OX) 123C over the TEOS oxide trench 128. Silicon
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`nitride islands 125C and 125d served as oxidation stops
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`during the CAP__OX growth step and as such protected their
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`respective underlying silicon regions from being oxidized.
`FIG. 1 shows the next state wherein it is desirable to
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`selectively remove silicon nitride islands 125C and 125d
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`while preserving CAP_0X portion 123a.
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`A fourth possible application scenario is represented by
`portions 126. 123a, 125a and/or 125b/124. and 1220/1221:
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`of FIG. 1. Pad_OX layer 123 has been grown on mono—Si
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`layer 122. Silicon nitride has been formed on the thin
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`pad__OX. Poly-Si
`layer 124 was optionally deposited
`beforehand or not. The silicon nitride has been patterned into
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`the form of Si3N4 islands 125a and/or 125b, between which
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`there was an exposed surface portion 1230 of the pad_OX.
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`The wafer 120 was thereafter exposed to ion implantation.
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`The dopants of the ion implantation penetrated into region
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`126 of the underlying mono-Si 122. Islands 125a and/or
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`125b/124 served as implant masks that blocked the ion
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`implantation from penetrating into respective regions 1220
`and 122b of the underlying mono-Si. FIG. 1 shows the next
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`state wherein it is desirable to selectively remove silicon
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`nitride islands 125a and/or 125b while preserving pad__OX
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`portion 123a.
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`A fifth possible application scenario is represented by
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`portion 121 and any one or more of portions 125a, 1251).
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`125c, 125d. At
`the same time that silicon nitride was
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`deposited onto a topside portion of wafer 120 for forming
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`any one or more of portions 1254, 125b, 125e, 125d; silicon
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`nitride was also deposited onto the backside portion of wafer
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`120 to thereby form the backside SiN layer 121. FIG. 1
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`shows a state wherein it may be desirable to selectively
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`remove the backside SiN layer 121 in the same chamber 105
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`used for selectively removing any one or more of SiN
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`portions 125a, 125b, 125c, and 125d.
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`In accordance with one embodiment of the invention. a
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`remote plasma 160 is struck and fed with input gases
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`consisting of: CH3F or CH2F2. and CF4 and 02. The plasma
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`afterglow 165 is flowed by the exposed SiN and SiO or Si
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`surfaces of the wafer 120 to provide selective removal of the
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`SiN material.
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`During the SiN etching process. chamber 105 is appro—
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`priately sealed to maintain pressures therein at least as low
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`as 3 Torr to 300 mTorr. and more preferably 100 mTorr base
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`pressure in the vicinity of workpiece 120. A vacuum means
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`107 such as a mechanical pump is provided to exhaust gases
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`from chamber 105 and to thereby create the desired pressure
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`Page 10 of 14
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`within the chamber (e.g.. 300 mTorr or less). Vector 106
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`generally represents outflowing gases of the chamber which
`are removed by vacuum means 107.
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`A source of high frequency electromagnetic radiation
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`(EM source) 150 is provided and operativer coupled to the
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`applicator 161 of the low-pressure chamber 105 for striking
`and maintaining the remote plasma 160. In one embodiment.
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`EM source 150 is capable of outputting a 2.45 GHz EM field
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`at a power level of approximately 750 Watts or greater. This
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`high frequency EM energy is coupled to the applicator 161
`of the chamber by an electrically matched waveguide 162.
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`Other frequencies. power levels and methods of energy
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`coupling may of course be used as appropriate. The plasma
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`energizing EM radiation may be of multiple frequencies
`instead of just a single frequency.
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`A gas supply means 170 is further provided and opera—
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`tiver coupled to the low-pressure chamber 105 for supply—
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`ing a selected one or a selected combination 178 of gases at
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`respective flow rates into chamber 105.
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`The selectable gases (only four shown as G1—G4. but
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`there can be more) in accordance with the invention include
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`CH3F and/or CH2F2. and CF... and 02. The selectable gases
`may further include inert carriers such as argon (Ar) or
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`helium (Hez). and even nitrogen (N2).
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`Gas supply means 170 may include one or more flowrate
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`control means (e.g.. manually or electrically controlled
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`valves—not shown) for regulating the respective inflow
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`rates of a respective one or more of the selectable gases
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`Gl—G4.
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`The combined input gas stream 178 may. but preferably
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`does not. contain carrier gases such as argon. helium or
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`nitrogen. It has been found that there is little advantage to
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`including carrier gases and that their inclusion merely adds
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`to the work load of exhaust pump 107. it merely adds to the
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`cost of materials consumed. and that more reliability and
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`maintenance problems are encountered by the accompany-
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`ing valves and gas sources Gn without any significant
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`benefit. However. one may use one or more such carrier
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`gases in the inflow stream 178 if desired.
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`The EM source 150. the gas supply means 170. and the
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`pump 107 are preferably con