Trials@uspto.gov
`571-272-7822
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`Paper 26
`Entered: January 17, 2018
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`UNITED STATES PATENT AND TRADEMARK OFFICE
`____________
`
`BEFORE THE PATENT TRIAL AND APPEAL BOARD
`____________
`
`APPLE, INC.,
`Petitioners,
`
`v.
`
`REALTIME DATA LLC,
`Patent Owner.
`____________
`
`Case IPR2016-01365
`Patent 7,181,608 B2
`____________
`
`
`
`Before DEBRA K. STEPHENS, GEORGIANNA W. BRADEN, and
`JASON J. CHUNG, Administrative Patent Judges.
`
`
`STEPHENS, Administrative Patent Judge.
`
`
`
`FINAL WRITTEN DECISION
`35 U.S.C. § 318 and 37 C.F.R. § 42.73
`
`

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`Case IPR2016-01365
`Patent 7,181,608 B2
`
`
`INTRODUCTION
`We have jurisdiction to hear this inter partes review under 35 U.S.C.
`§ 6, and this Final Written Decision is issued pursuant to 35 U.S.C. § 318(a)
`and 37 C.F.R. § 42.73. For the reasons that follow, we determine that
`Petitioner has shown by a preponderance of the evidence that claims 1–24 of
`U.S. Patent No. 7,181,608 B2 (Ex. 1001, “the ’608 patent”) are
`unpatentable.
`
`I. BACKGROUND
`
`A. Procedural History
`Apple Inc. (Petitioner) filed a Petition (Paper 2, “Pet.”) to institute an
`inter partes review of claims 1–31 of the ’608 patent. Realtime Data, LLC
`(“Patent Owner”) filed a Preliminary Response (Paper 9, “Prelim. Resp.”).
`Petitioner challenged claims 1–24 of the ’608 patent on the following
`grounds:
`Claims
`
`References1
`Basis
`§ 103 (a) Sukegawa and Dye
`§ 103 (a) Sukegawa, Dye, and Settsu
`§ 103 (a) Sukegawa, Dye, and Burrows
`§ 103 (a) Sukegawa, Dye, Settsu, and Burrows
`
`1–31
`1–31
`1–31
`1–31
`
`
`
`1
`
`Reference
`Sukegawa
`Dye
`
`Patent Number
`US 5,860,083 (issued Jan. 12, 1999)
`US 6,145,069 (filed Apr. 26, 1999)
`
`Exhibit
`1005
`1008
`
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`Petitioner also relied on the Declaration of Dr. Charles J. Neuhauser
`(Ex. 1003) to support its challenges.
`Pursuant to 35 U.S.C. § 314(a), we instituted an inter partes review
`
`of:
`
`Claims
`
`1–31
`1–6 and 9–17
`1–6 and 9–17
`1–6 and 9–17
`
`References
`Basis
`§ 103 (a) Sukegawa and Dye
`§ 103 (a) Sukegawa, Dye, and Settsu
`§ 103 (a) Sukegawa, Dye, and Burrows
`§ 103 (a) Sukegawa, Dye, Settsu, and Burrows
`
`(Paper 11 “Dec. to Inst.”).
`After institution of trial, Patent Owner filed a Patent Owner Response
`(Paper 14, “PO Resp.”), to which Petitioner filed a Reply (Paper 16,
`“Reply”). An oral argument was held on September 20, 2017. A transcript
`of the oral argument is included in the record (Paper 25 (“Tr.”)).
`
`B. Related Matters
`The parties identify the following cases as related to the challenged
`patent: Realtime Data, LLC d/b/a IXO v. Microsoft Corporation, Case No.
`4:14-cv-00827 (E.D. Tex.) and Realtime Data, LLC d/b/a IXO v. Apple, Inc.,
`Case No. 3:16-cv02595 (N.D. Cal.) (transferred from Realtime Data, LLC v.
`Apple, Inc., Case No. 6:15-cv-00885 (E.D. Tex.)) (Pet. 1; Paper 8, 2).
`
`
`Settsu
`US 6,374,353 B1(filed Mar. 3, 1999) 1006
`
`
`Michael Burrows et al., On-line Data Compression in a Log-structured File
`System (1992) (hereinafter “Burrows”) (Exhibit 1007).
`
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`Concurrently with this petition, Petitioner has filed for a petition for inter
`partes review of U.S. Patent No. 8,090,936 (IPR2016-01366) (Paper 8, 2).
`
`C. The ’608 Patent (Ex. 1001)
`The ’608 patent, entitled “Systems and Methods for Accelerated
`Loading of Operating Systems and Application Programs,” relates to
`“providing accelerated loading of operating system and application
`programs upon system boot or application launch,” and to the use of data
`compression and decompression techniques for such purpose (Ex. 1001,
`Title, 1:16–21). The Specification discusses the limits of prior art storage
`devices, particularly the significant bandwidth limitations of “mass storage
`devices,” such as hard disk drives and their “inherent unreliability” (id. at
`1:39–52, 2:6–15, 38–45).
`The Specification of the ’608 patent is directed to “data storage
`controllers that provide increased data storage/retrieval rates that are not
`otherwise achievable using conventional disk controller systems and
`protocols to store/retrieve data to/from mass storage devices” (id. at 5:34–
`38). According to the Specification, “accelerated data storage/retrieval
`mitigates the traditional bottleneck associated with, e.g., local and network
`disk accesses” (id. at 5:67–6:2). The Specification describes that
`“accelerated” data storage comprises receiving a digital data
`stream at a data transmission rate which is greater tha[n] the
`data storage rate of a target storage device, compressing the
`input stream at a compression rate that increases the effective
`data storage rate of the target storage device and storing the
`compressed data in the target storage device.
`(Ex. 1001, 5:48–54) and further describes that
`accelerated data retrieval comprises retrieving a compressed
`digital data stream from a target storage device at the rate equal
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`to, e.g., the data access rate of the target storage device and then
`decompressing the compressed data at a rate that increases the
`effective data access rate of the target storage device
`(id. at 5:61–67).
`Figure 1, “a block diagram of a data storage controller according to
`one embodiment of the present invention” (id. at 4:40–41), is reproduced
`below.
`
`
`Figure 1 illustrates an embodiment of data storage controller 10 (id. at
`Fig. 1, 6:3–5). Data storage controller 10 includes data compression engine
`(DCE) 12 which compresses/decompresses data stored/retrieved from a
`mass storage unit such as hard disk 11, to provide accelerated data
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`storage/retrieval (id. at 6:5–10).2 Data storage controller 10 also includes
`cache 13, disk interface (or disk controller) 14, and bus interface 15 (id. at
`6:23–25). As shown in Figure 1, data storage controller 10 is “operatively
`connected” to main or expansion bus 16 and hard disk 11 (id. at 6:25–28).
`According to the ’608 patent, “[w]hen data is read from disk by the
`host computer, data flows from the disk 11 through the data storage
`controller 10 to the host computer” (Ex. 1001, 6:64–67). When disk data is
`read, data is transferred from hard disk 11 to cache 13 without intervention
`of DCE 12 (id. at 7:7–10). Once in cache 13, DCE 12 then reads and
`decompresses data, returning the decompressed data to cache 13 (id. at 7:22–
`25). The decompressed data is next transferred to main or expansion
`computer bus 16 via bus interface 15 (id. at 7:30–31).
`Similarly, according to the ’608 patent, when data is written to hard
`disk 11 from the host computer, data flows from the host computer via main
`computer bus 16, to data storage controller 10, where the data is compressed,
`and onto hard disk 11 (id. at 7:44–46).
`The ’608 further describes
`upon host computer power-up or external user reset, the data
`storage controller 10 initializes the onboard interfaces 14, [1]5
`prior to release of the external host bus 16 from reset. The
`processor of the host computer then requests initial data from
`the disk 11 to facilitate the computer’s boot-up sequence
`
`
`2 We note the ’608 patent refers to the hard disk drive as both hard disk 11
`and hard disk 12. We determine reference to hard disk 12 is misnumbered
`as both the initial description of the elements and Figure 1 label the data
`compression engine as data compression engine 12 and the hard disk drive
`as hard disk drive 11 (see e.g. Ex. 1001, 6:3–10, Fig. 1; see contra e.g. id. at
`6:25–63). We consider this harmless error and determine the description
`would have been clear to an ordinarily skilled artisan.
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`(id. at 8:3–8). Specifically, the ’608 discloses the data storage controller
`described, “may employ a technique of data preloading to decrease the
`computer system boot time” (id. at 21:45–48). “[P]rior to host system reset,
`the data storage controller [10] can proceed to [preload] the portions of the
`computer operating system from the boot device (e.g., hard disk [11]) into
`the on-board cache memory [13]” (id. at 21:53–56).
`
`Figures 7a and 7b “comprise a flow diagram of a method for
`providing accelerated loading of an operating system and/or application
`programs upon system boot, according to one aspect of the present
`invention” (id. at 4:54–57).
`Figure 7a is reproduced below:
`
`
`Figure 7a illustrates the steps performed during the computer boot process
`(Ex. 1001, 22:26–28). As illustrated in Figure 7a, during the computer boot
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`process, data storage controller 10, receives a request for boot data (step 70)
`(id.). Data storage controller 10 retrieves the requested boot data from hard
`disk 11 from cache 13 (step 71) (id. at 22:28–31). Each requested data block
`is recorded in a list (step 72) until the boot process is complete (step 73), at
`which time, the list will be stored on the boot device (hard disk 11) (step 74)
`(id. at 22:31–39).
`
`Figure 7b is reproduced below:
`
`
`Figure 7b illustrates the steps which occur upon each subsequent power-
`on/reset (Ex. 1001, 22:40–50). As shown in Figure 7b of the ’608 patent,
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`when power-up or system reset occurs (step 75), data storage controller 10
`retrieve and reads the stored list (step 76) and “proceed[s] to preload the
`boot data specified on the list” into cache 13 (step 77) (id. at 40–50).
`“[D]epending on the resources of the given system (e.g., memory, etc.), the
`preloading process may be completed prior to commencement of the boot
`process, or continued after the boot process begins (in which case booting
`and preloading are performed simultaneously” (id. at 22:45–50).
`
`As described further, the boot process commences (step 78), the read
`request for boot data is received (step 79), and if the requested boot data is
`preloaded (step 80), the request is serviced using the preloaded boot data
`(step 81) (id. at 22:51–58).
`
`D. Exemplary Claim
`We instituted on claims 1–31 of the ’608 Patent (Dec. to Inst. 17).
`The ’608 patent has four independent claims, claims 1, 7, 22, and 27; the
`remaining claims are dependent (Ex. 1001, Claims), all of which are part of
`this proceeding. Claim 1 of the ’608 patent is exemplary of the claims at
`issue:
`
`1. A method for providing accelerated loading of an
`operating system, comprising the steps of:
`maintaining a list of boot data used for booting a computer
`system;
`initializing a central processing unit of the computer system;
`preloading the boot data into a cache memory prior to
`completion of initialization of the central processing unit of the
`computer system, wherein preloading the boot data comprises
`accessing compressed boot data from a boot device; and
`servicing requests for boot data from the computer system using
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`the preloaded boot data after completion of initialization of the
`central processing unit of the computer system, wherein
`servicing requests comprises accessing compressed boot data
`from the cache and decompressing the compressed boot data at
`a rate that increases the effective access rate of the cache.
`
`
`II. ANALYSIS
`A. Level of Ordinary Skill in the Art
`The level of skill in the art is a factual determination that provides a
`primary guarantee of objectivity in an obviousness analysis (Al-Site Corp. v.
`VSI Int’l Inc., 174 F.3d 1308, 1324 (Fed. Cir. 1999) (citing Graham v. John
`Deere Co., 383 U.S. 1, 17–18 (1966); Ryko Mfg. Co. v. Nu-Star, Inc., 950
`F.2d 714, 718 (Fed. Cir. 1991))).
`Petitioner asserts, through its declarant Dr. Neuhauser,
`one of ordinary skill would be a person with a Bachelor’s
`Degree in electrical engineering, computer engineering, or a
`related area of study. In addition, this person would have
`between three and five years of practical experience in the
`design and implementation of computer systems, such as
`personal computers. Alternatively, a person with a Master’s
`Degree in the area of electrical engineering, computer
`engineering, or a related area of study and somewhat less
`practical experience would be similarly qualified
`(Ex. 1003 ¶ 15). Patent Owner does not appear to dispute the educational
`level or experiential aspects of Petitioner’s definition, and indeed, Patent
`Owner’s declarant, Dr. Back, agrees with Dr. Neuhauser as to the level of
`ordinary skill in the art (Ex. 2003 ¶ 42).
`We agree with and adopt Petitioner’s assessment of a level of skill in
`the art. We note also that the applied prior art reflects the appropriate level
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`of skill at the time of the claimed invention (see Okajima v. Bourdeau, 261
`F.3d 1350, 1355 (Fed. Cir. 2001)).
`B. Claim Construction
`In an inter partes review, the Board interprets claim terms in an
`unexpired patent according to the broadest reasonable construction in light
`of the specification of the patent in which they appear (37 C.F.R.
`§ 42.100(b); Cuozzo Speed Techs., LLC v. Lee, 136 S. Ct. 2131, 2142
`(2016)). Under that standard, and absent any special definitions, we give
`claim terms their ordinary and customary meaning, as would be understood
`by one of ordinary skill in the art at the time of the invention (In re
`Translogic Tech., Inc., 504 F.3d 1249, 1257 (Fed. Cir. 2007)). Additionally,
`any special definitions for claim terms must be set forth with reasonable
`clarity, deliberateness, and precision (In re Paulsen, 30 F.3d 1475, 1480
`(Fed. Cir. 1994)).
`In an inter partes review, claim terms in an unexpired patent are
`interpreted according to their broadest reasonable construction in light of the
`specification of the patent in which they appear (37 C.F.R. § 42.100(b); see
`Cuozzo Speed Techs., 136 S. Ct. at 2144–46 (“We conclude that the
`regulation represents a reasonable exercise of the rulemaking authority that
`Congress delegated to the Patent Office.”)). Under that standard, and absent
`any special definitions, we give claim terms their ordinary and customary
`meaning, as would be understood by one of ordinary skill in the art at the
`time of the invention (Translogic, 504 F.3d at 1257). An inventor may
`provide a meaning for a term that is different from its ordinary meaning by
`defining the term in the specification with “reasonable clarity,
`deliberateness, and precision” (Paulsen, at 1480). Limitations, however, are
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`not to be read from the specification into the claims (In re Van Geuns, 988
`F.2d 1181, 1184 (Fed. Cir. 1993)). In addition, the Board may not “construe
`claims during [an inter partes review] so broadly that its constructions are
`unreasonable under general claim construction principles” (Microsoft Corp.
`v. Proxyconn, Inc., 789 F.3d 1292, 1298 (Fed. Cir. 2015)).
`Petitioner indicates the broadest reasonable interpretation should be
`applied (Pet. 20; Pet. Reply 1) as does Patent Owner (PO Resp. 11). For
`purposes of our analysis, we need only construe the terms “preloading” and
`“encoder.”
`
`1. “preloading”
`Initially, we note the terms “preloading” and “preload” are not defined
`explicitly in the ’608 Specification. Patent Owner urges us to interpret
`“preloading” as “transferring data from storage to memory in anticipation of
`immediate or near-in-time use” because “this construction is consistent with
`the claims and the intrinsic record, and is the broadest reasonable
`interpretation in light of the specification” (PO Resp. 12).
`Claims 1 recites “preloading the boot data into a cache memory prior
`to completion of initialization of the central processing unit of the computer
`system” (Ex. 1001, Claims). Claim 7 commensurately recites this limitation,
`as do claims 22 and 27. These claims, however, do not recite any timing
`requirement associated with use of the recited preloaded boot data. Patent
`Owner further contends “certain claims recite that boot or application data is
`preloaded, for example, to service requests for that data immediately or in
`the near future” (PO Resp. 14 (citing Ex. 1001, claims 1, 7–9, 22, and 27)).
`We do not find that any of these claims recites that preloaded boot or
`
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`application data must be utilized by the computer system immediately or in
`the near future.
`Relying on Dr. Back’s declaration, Patent Owner asserts a person of
`ordinary skill in the art “would have understood that this movement of data
`from storage into memory is performed in anticipation of immediate or near-
`in-time use” (PO Resp. 13–14 (citing Exhibit 2003 ¶¶ 48–51)). More
`specifically, Dr. Back asserts “[b]ased on the disclosures of the ’608 Patent,
`a [person of ordinary skill in the art] would have also understood that this
`movement of data from storage into memory is performed in anticipation of
`immediate or near-in-time use” (Ex. 2003 ¶ 51). Dr. Back contends this
`interpretation “reflects the common understanding of this term in the field”
`(Ex. 1017, 32:21–22).
`Patent Owner further contends the Specification supports its
`interpretation (PO Resp. 14). For example, Patent Owner identifies the
`Abstract as supporting this interpretation (id. at 14). The Abstract, however,
`only discloses “The boot data is retrieved from a boot device and stored in a
`cache memory device. The boot data is stored in a compressed format on
`the boot device and the preloaded boot data is decompressed prior to
`transmitting the preloaded boot data to the requesting system” (Ex. 1001,
`Abstract (emphases added)). Patent Owner also directs our attention to
`columns 21–23 of the Specification as supporting the interpretation of
`“preloading” (PO Resp. 14). Yet throughout these descriptions, timing
`requirements between preloading and utilizing are not described––timing
`requirements are missing from the claims and are not used in describing the
`meaning of “preloading.” Indeed, the description in these columns does not
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`discuss any timing criteria between the preloading of the data and utilizing
`the data. The ’608 patent discloses
`[f]urther, prior to host system reset, the data storage controller
`can proceed to [preload] the portions of the computer operating
`system from the boot device (e.g., hard disk) into the on-board
`cache memory. The data storage controller preloads the needed
`sectors of data in the order in which they will be needed. Since
`the same portions of the operating system must be loaded upon
`each boot process, it is advantageous for the boot device
`controller to preload such portions and not wait until it is
`commanded to load the operating system.
`(Ex. 1001, 21:53–61 (emphases added)).
`Notably, Patent Owner contends “[c]ertain embodiments . . . describe
`‘preloading’ as loading data in anticipation of using that data” (PO Resp. 14
`(emphasis added)), acknowledging other embodiments exist. An additional
`portion of the ’608 patent to which Dr. Back points, describes a technique
`for “one embodiment” (illustrated by the flow diagram of FIGS. 7a and 7b)
`that may be employed (PO Resp. 14; Ex. 2003 ¶ 52 (citing Ex. 1001, 22:20–
`39, 40–4)). Thus, Patent Owner admits only “certain embodiments” and
`“one embodiment” “load data in anticipation of using that data.”
`Patent Owner additionally contends the description of Figure 7b uses
`the term “prefetching” in step 77, and describes it as “preloading” in the
`Specification; therefore, according to Patent Owner, the term “‘preloading’
`has a meaning similar to ‘prefetching’ [which] refers to the process of
`retrieving data before it is needed” (PO Resp. 14–15 (citing Ex. 1001, 22:
`20–39, 40–45, Fig 7b; Ex. 2003 ¶¶ 53–54)).
`We do not agree with Patent Owner. At the outset, Figures 7a and 7b,
`relied upon by Patent Owner, are described in a non-limiting context using
`the nomenclature “according to one aspect of the present invention”
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`(emphasis added) (Ex. 1001, 4:55–58). In addition, we do not agree with
`Patent Owner that the ’608 patent uses “preloading” and “prefetching” as
`synonyms rather than using “prefetching” as a type of “preloading.”
`Regardless, even the extrinsic evidence of “prefetching” proffered by Patent
`Owner does not support Patent Owner’s interpretation of “preloading.”
`Specifically, “prefetching” is defined as “[i]n a pipelined process, to fetch
`the next instruction, or instruction part, before the processing unit requires it,
`resulting in a performance improvement by eliminating the lag between
`completion of one instruction and the availability of the next” (Ex. 2007, 3).
`This proffered definition, however, is directed to lines of code or instruction
`to be executed in a pipelined process, whereas the use of “prefetch” in the
`’608 patent is used to describe preloading a group of instructions (boot data)
`to cache and further, does not describe that this movement of data is in a
`pipelined process. Patent Owner provides definitions of “fetch” (see e.g.,
`Ex. 2009, 3 (“[t]o retrieve an instruction or an item of data from memory
`and store it in a register. Fetching is part of the execution cycle of a
`microprocessor. . .”); Ex. 2008, 2 ([t]o locate and load computer instructions
`or data from storage”); Ex. 2006, 2); however, these definitions indicate that
`prefetching is not for immediate use. Certain dictionaries define “fetch” as
`locating and loading computer instructions or data from storage (Ex. 2008,
`2; Ex. 2006, 2). More specifically, prefetching would be before fetching,
`i.e., before the execution cycle. Indeed, as noted by Petitioner, Patent
`Owner states “prefetching refers ‘to the process of retrieving data before it is
`needed’” but is not limited to “immediate or near-in-time” use (Pet. Reply 7
`(citing PO Resp. 15)).
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`Patent Owner also asserts during prosecution of the ’608 patent, the
`Examiner issued an initial rejection based on a prior art reference directed to
`prefetching and thus, the Examiner “concluded that preloading and
`prefetching are similar” (PO Resp. 15–16 (citing Ex. 1002, 181)). We do
`not find this to be informative as we do not find any discussion that
`prefetching and preloading are synonymous. Rather, the Examiner stated
`“data is preloaded into the RAM cache according to the prefetch table” (Ex.
`1002, 181). And indeed, US Patent 6,073,232 (Kroeker) describes loading
`data into cache (Ex. 1002, 181 (citing Ex. 3001, 2:36–41, 3:30–39, 5:17-21);
`Ex. 3001, 6:27–31, claim 20).
`Thus, we do not agree that the proffered definition of “prefetch”
`supports Patent Owner’s interpretation of “preload” or “preloading.”
`The prefix “pre” means “before,” but absent additional information,
`does not convey how long “before” is. As such, Patent Owner’s proposed
`interpretation is too narrow. For example, Dictionary of Computer and
`Internet Words defines “load” as “[t]o transfer a program from a storage
`device into a computer’s memory” (Ex. 2005, 3). The IEEE Standard
`Computer Dictionary defines “load” as “[t]o copy computer instructions or
`data from external storage to internal storage or from internal storage to
`registers” (Ex. 2006, 3–4; see Ex. 2008, 4). Indeed, none of the proffered
`definitions includes any time component for use of the loaded data.
`“Preloading,” thus, would be copying computer instructions or data from
`external storage to internal storage or from internal storage to registers
`before an unspecified event occurs.
`Patent Owner further contends the ’608 Specification “draws a clear
`distinction between the concepts of ‘storing’ and ‘loading,’ and ‘storing’ and
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`‘preloading’” (PO Resp. 18). Specifically, Patent Owner points to the
`disclosure that “[m]ass storage devices (such as a ‘hard disk’) typically store
`the operating system of a computer system, as well as applications and data”
`and “boot data is stored in a compressed format on the boot device” (id. at
`18–19 (citing Ex. 1001, 1:39–41 (emphasis added), 3:60–63 (emphasis
`added))), as support for their interpretation. According to Patent Owner,
`“storing” in the ’608 patent means “pre-installation” or “storing software or
`other data on a persistent storage medium” (id. at 19).
`We do not agree, however, that “storing” has the proffered
`interpretation. Indeed, the ’608 patent does not explicitly describe “storing”
`as meaning “pre-installation” or as requiring the software or other data is
`stored on a persistent storage medium. Rather, the ’608 patent describes
`“[t]he boot data is retrieved from a boot device and stored in a cache
`memory” (Ex. 1001, Abstract). This boot data also is described as being
`“preloaded” into a cache memory (id. at Abstract, 21:53–56). As such,
`Patent Owner’s proposed interpretation is too narrow. Thus, although we
`agree “storing” and “loading” are distinct terms, we do not agree with Patent
`Owner that “store” means “pre-installation” or “storage on a persistent
`medium,” and somehow distinguishes “preloading” from “pre-installation.”
`Patent Owner asserts the ’608 patent describes “the ‘accelerated
`loading’ of operating system and application programs’” (PO Resp. 19
`(citing Ex. 1001, Abstract, 1:15–21, 4:6–22)).
`Although “accelerated loading” is not defined explicitly, the ’608
`patent describes
`[i]n general, as described in the above-incorporated
`applications, “accelerated” data storage comprises receiving a
`digital data stream at a data transmission rate which is greater
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`than the data storage rate of a target storage device,
`compressing the input stream at a compression rate that
`increases the effective data storage rate of the target storage
`device and storing the compressed data in the target storage
`device.
`(Ex. 1001, 5:47–53 (emphasis added)). Similarly, the ’608 patent describes
`“accelerated data retrieval” as “compris[ing] retrieving a compressed digital
`data stream from a target storage device at the rate equal to, e.g., the data
`access rate of the target storage device and then decompressing the
`compressed data at a rate that increases the effective data access rate of the
`target storage device” (id. at 62–67). Neither of these descriptions discuss
`preloading data and specifically, discuss any timing criteria for the storage
`or retrieval of data into cache memory. In particular, the Specification
`describes
`[t]he present invention relates generally to systems and methods
`for providing accelerated loading of operating system and
`application programs upon system boot or application launch
`and, more particularly, to data storage controllers employing
`lossless and/or lossy data compression and decompression to
`provide accelerated loading of operating systems and
`application programs
`(Ex. 1001, 1:15–21). The ’608 patent’s statement, “accelerated loading of
`operating system and application programs upon system boot or application
`launch,” does not address movement of data from storage to memory in
`anticipation of immediate or near-in-time use (id.). Rather, the ’608 patent
`states it employs “lossless and/or lossy data compression and
`decompression” to achieve accelerated loading.
`The ’608 patent uses the term “preload” throughout, both in reference
`to preloading the operating system and application programs. The
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`description set forth in column 21 describes that “prior to host system reset,
`the data storage controller can proceed to [preload] the portions of the
`computer operating system from the boot device (e.g., hard disk) into the on-
`board cache memory” (Ex. 1001, 21:53–56). Thus, we agree with Petitioner
`that in the ’608 patent, preloading may be performed prior to the start of the
`boot process (Pet. Reply 4). Additionally, the ’608 patent describes “cache
`13 may comprise volatile or non-volatile memory, or any combination
`thereof” (Ex. 1001, 6:61–63). Therefore, the portion of the computer
`operating system preloaded from the boot device into cache is described as
`being preloaded into non-volatile memory, and as a result, the data would
`remain available for use after subsequent power off/on (see Pet. Reply 5).
`Accordingly, the ’608 patent describes preloading data for use after
`subsequent power off/on, which is not “in anticipation of immediate or near-
`in-time use.”
`Patent Owner contends because the ’608 patent discloses “preloading”
`may be performed using all types of memory––volatile or non-volatile or a
`combination thereof––this confirms “preloading” is different than “storing”
`(PO Resp. 23–24). That all types of memory may be used does not preclude
`the data from being loaded prior to reset and into non-volatile cache,
`however. Rather, the ’608 patent describes preloading into non-volatile
`memory.
`We do not read the Specification as clearly and unmistakably
`requiring that data is preloaded in anticipation of immediate or near-in-time
`use. Descriptions in the Specification include data being preloaded for
`somewhat immediate use; however, additional description does not limit
`“preloading” in this manner. And we will not import any such limitation
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`into the claims at issue. Moreover, construing the term as suggested by
`Patent Owner would limit the interpretation to preferred embodiments,
`ignoring the other disclosure in the Specification that broadens the
`interpretation. Accordingly, taking a broad, but reasonable, interpretation in
`light of the Specification, we conclude an ordinarily skilled artisan would
`not interpret “preload” or “preloading” as narrowly as proffered by Patent
`Owner.
`Therefore, we decline to interpret “preloading” as narrowly as
`proffered by Patent Owner. Rather, we interpret “preloading” as
`“transferring data from external storage to internal memory or from internal
`memory to registers prior to an event.”
`2. “encoder”
`Initially, we note the ’608 patent does not define “encoder” explicitly.
`Petitioner asserts “a component that performs encoding operations is
`commonly understood to be an encoder” (Pet. Reply 21). Patent Owner
`asserts an encoder would use a single algorithm (PO Resp. 39; Tr. 61).
`The ’608 patent discloses a single encoder may be comprised of
`multiple encoders, each performing parts of the encoding process of the
`input data (Ex. 1001, 25:30–32; see id. at 24:58–59). The ’608 patent
`further indicates that “each of the encoders E1 . . . En [(where n may =1)],
`processes a given input data block and outputs a corresponding set of
`encoded data blocks” (id. at 25:5–8). In the described embodiment, “the
`data compression system 110 accepts data blocks from an input data stream
`and stores the input data block in an input buffer or cache 115. . . . [T]he
`system processes the input data stream in data blocks that may range in size
`from individual bits through complete files or collections of multiple files”
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`(id. at 24:40–46). Thus, the ’608 patent describes each encoder may be
`processing only one bit of the file. Furthermore, the portion of the
`Specification identified by Patent Owner (PO Resp. 41 (citing Ex. 1001,
`25:5–8, Fig. 9)) “is exemplary of a preferred data compression system” (id.
`at 26:13–19; see id. at 4:62–64).
`Although Patent Owner contends the proffered definition from
`MICROSOFT COMPUTER DICTIONARY 4 (5th ed. 2002) (Exhibit 1021),
`provides examples that “undercut” Petitioner’s interpretation of “encoder”
`(Tr. 62:18–63:2), we do not agree as the definition referenced by Patent
`Owner includes examples. In particular, the definition provided is “[i]n
`general, any hardware or software that encodes information –– that is,
`converts the information to a particular form or format” (Ex. 1021, 4).
`Indeed, the extrinsic evidence of definitions proffered by Petitioner’s
`support that an ordinarily skilled artisan at the time of the invention would
`not have in