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`Proceedings of the
`IEEE 1998
`"INTERNATIONAL
`fNTERCONNECT TECHNOLOGY
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`\k\":-
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`CON FER ENCE
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`‘
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` “If!
`b”
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`Hyatt Regency Hotel
`San Francisco, CA
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`June 1 - 3, 1998
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`Its goal is to provide a forum for professionals
`The IITC is sponsored by the IEEE Electron Devices Society.
`in semiconductor processing, academia and equipment development to present and discuss exciting new
`science and technology.
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`Figure 4. Copper CMP with Ta barrier
`(0.3 pm line width / 0.3 pm oxide space)
`
`Conclusion
`
`A variety of solutions for 0.25pm copper interconnect
`technology have been developed. Complete via filling was
`achieved by combination of CVD and IMP techniques, and
`by electroplating deposition. A comprehensive comparison
`of TiN, Ta and TaN materials as barrier layers for copper
`metallization has been carried out, as these three materials
`proved to block copper difiiision. TiN was suitable for
`usual CMP process, involving removal of the entire metal
`stack during polishing. Ta and TaN barriers
`showed
`excellent CMP stop layer capabilities. Therefore, these new
`materials can lead to a novel CMP approach, in which the
`barrier layer is used to prevent from oxide erosion.
`
`Acknowledgment
`
`This work has been carried out within the GRESSI
`Consortium between CEA-LETI and France Telecom-
`CNET. The authors would like to thank B. Chin, T-Y Yao,
`
`L. Chen and M. Bakli from Applied Materials for their
`active contribution.
`
`References
`
`l. D.Edelstein et al, "Full copper wiring in a sub-0.25pm CMOS ULSI
`technology", Proc. IEEE IEDM, 1997, pp. 773-776
`2. S.Venkatesan et al, "A high perfonnance 1.8V, 0.20mm CMOS
`technology with copper metallization", Proc. IEEE IEDM, 1997, pp.
`769-772
`3. C. Marcadal et al, "OMCVD TiN difiusion barrier for copper contact
`an via and line", Proc. VMIC, 1997, pp. 405-410
`4. C. Marcadal et al, "OMCVD Copper process for dual damascene
`metallization", Proc. VMIC, 1997, pp. 93-98
`_
`_
`5. M. Fayolle and F. Romagna, "Copper CMP evaluation zplanarrzatron
`issues", Proc. Materials for Advanced Metallization Conference,
`Villard de Lans France, 1997, pp. 135-141
`
`Figure3b. Electroplated Copper Film afier CMP
`
`C. Chemical Mechanical Polishing
`
`Barrier versus copper selectivity determined on full sheet
`wafers are reported on table I. Unlike TiN, Ta and TaN
`removal rates are much lower than copper removal rate.
`The elimination of these barrier layers was investigated on
`topological wafers. The 40nm TiN layer was entirely
`removed while keeping acceptable copper dishing and
`oxide erosion effects. The high selectivity of Ta and TaN
`barrier layers was confirmed on topological wafers. To
`quantitatively determine this effect, a thick Ta barrier layer
`(l00nm) was used. After polishing using the same
`conditions than for the TiN barrier layer, the remaining Ta
`barrier thickness was measured by SEM. As shown on
`figure 4, less than 5nm of the barrier layer were removed,
`demonstrating the excellent CMP stop layer capability of
`Ta material.
`
`Page 14 of 14
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`IITC 98-297
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