||||||lllllllllllIlllllllllllllllllll||l||||l|||||l|l||||llllllllllllllllll
`U8005882399A
`
`5,882,399
`[11] Patent Number:
`[19]
`United States Patent
`
`Ngan et a1.
`[45] Date of Patent:
`Mar. 16, 1999
`
`5,472,912 12/1995 Miller ................................. .. 437/194
`5,497,025
`$1996 Wong
`257/435
`
`5,321,120
`3/1996 Nulman
`437/190
`5,225,259
`6/1996 Merchant
`437/190
`5,323,837
`6/1996 Chondhury ............................ .. 257/751
`5,526,951
`6/1996 Bailey et a1.
`216/24
`..
`5 '4
`Y
`d
`t
`l.
`537% $332 6121? :2 51.3....
`133/123
`5,627,102
`5/1997 Shinriki.
`437/192
`5,670,420
`9/1997 Choi
`.. 437/189
`
`
`
`OTHER PUBLICATIONS
`“Tin formed by evaporation as a diffusion barrier between A1
`and Si” (J. Vac. Sci Technol. 21 (1) May/Jun. 1982) Ting pp.
`14_17v
`‘
`
`[54] METHOD OF FORMING A BARRIER LAYER
`WHICH ENABLES A CONSISTENTLY
`HIGHLY ORIENTED CRYSTALLINE
`
`INTERCONNECT
`
`[751
`
`Kenny King-mi Ngan, Fremont; Barry
`Hoganisma Clara; Seshfldri
`.
`Ramaswami, San Jose, all of Calif.
`
`[73] Assignee: Applied Materials, Inc., Santa Clara,
`cahf'
`
`[21] Appl. No.: 924,487
`
`Ang' 23’ 1997
`Filed:
`[22]
`Int. Cl.6 ...................................................... ., C30B 6/00
`[51]
`[52] us. Cl.
`........................... .. 117/89; 117/939; 117/949;
`
`Primary Examiner—R. Bruce Breneman
`Assistant Examiner—Shamim Ahmed
`Attorney» Agent) 0" Firm—Shirley L- Church
`
`The aluminum <111> crystal orientation content of an
`aluminum interconnect layer or the copper <111> crystal
`orientation content of a copper interconnect can be main-
`tained at a consistently high value during the processing of
`an entire series of semiconductor substrates in a given
`process chamber. To provide the stable and consistent alu-
`minum <111> content, or the stable and consistent copper
`<111> content, it is necessary that the barrier layer structure
`underlying the aluminum or the copper have a consistent
`crystal orientation throughout the processing of the entire
`series of substrates, as well. We have determined that to
`ensure the consistent crystal orientation content of the
`.
`.
`.
`bame‘ layer Structure: 1‘ 15 necessary ‘0 form the first layer
`of the barrier layer astructure to have a minimal of
`at least about 150 A, to compensate for irregularities in the
`crystal orientation which may by present during the initial
`deposition of this layer. As an alternative to increasing the
`thickness of the first layer of the barrier layer structure, this
`first layer can be deposited a low process chamber pressure,
`-
`v
`-
`-
`~
`-
`:pjélliztatlégrmful irregularities in the crystal orientation are
`‘
`.
`30 Claims, 4 Drawing Sheets
`
`[58] Field of Search ..................................... 438/648, 652,
`438/656, 622, 373, 766; 117/89, 92, 939,
`949, 103, 105
`
`References Cited
`TE
`NT DOCUMENTS
`U'S' P
`4/1985 Nath ........................................ .. 427/39
`4,514,437
`3/1990 Retallick et a1.
`422/174
`4,911,894
`7/1990 Lu et al-
`.... -- 427/38
`4,944,951
`2/1991 Campbell 3‘ al~
`204/298-06
`42990329
`3,108,931 M193: 131an 61:“
`/
`’141’8 7
`8/19
`anoc a a a'
`........... .r
`29/2501
`5,186,718
`2/1993 Tepman et a1.
`5 236 868
`8/1993 Nulman ...................... .. 437/190
`5:262:361
`11/1993 Cho et a1.
`437,245
`5,238,665
`2/1994 Nulman
`437/194
`5,320,728
`6/1994 Tepman
`204/192.12
`5,346,600
`9/1994 Nieh et al.
`204/1923
`5,360,524 11/1994 Hendel etal,
`-~ 204/192-25
`ESUbOUChI 6‘ a1~
`. ,
`,
`ng ....................... ..
`.
`r
`£374,592 12/1994 MacNaughton et al.
`437/194
`2/1995 Gelatos ................. ..
`5,391,517
`. 437/190
`5,420,072
`5/1995 Fiordalice
`. 437/192
`5,464,666
`11/1995 Fine et a].
`............................... 427/576
`
`
`
`[56]
`
`
`
`302
`
` I
`
`0A|<l 11>Normalized l
`
`5
`
`10
`
`—l
`20
`15
`'TiN<11 l>Norm0lized
`
`25
`
`306
`
`Pagel 0f 13
`
`TSMC Exhibit 1028
`TSMC v. IP Bridge
`IPR2016—01249 & IPR2016-01264
`
`Page 1 of 13
`
`

`

`US. Patent
`
`Adan 16,1999
`
`Sheet1_0f4
`
`5,882,399
`
`100
`
`IMP
`CHAMBER
`H/UN
`
`01 W8 DURA
`Co—fi
`CHAMBER
`(151)
`
`PRECLEAN H
`CHAMBER
`
`COOLDOWN
`CHAMBER
`
`CHAMBER
`
`PVD DEGAS
`HTHU
`CHAMBER
`
`BUFFER
`
`WB 6-12 101
`UN
`
`SMW Mhfi ENCLOSURE
`
`(PRIOR ART)
`FIG.
`1
`
`Page 2 0f 13
`
`Page 2 of 13
`
`

`

`US. Patent
`
`Mar. 16, 1999
`
`Sheet 2 0f 4
`
`5,882,399
`
`218
`
`217
`
`V\\ \
`>
`\
`\\\\\\)\\\\\\\ \\\\\\
`6“ ‘
`(Iflflfl/(lmnIII” /:{I/III/II[lg/«E
`\\\\\\\\\“\\\i\}35:
`o \\\\\\\\\\\\ \
`E ‘\\\\\\\\\\\\\\\\\\ \\\\‘\\\
`
`
`
`
`
`
`21 1
`
`
`g;
`
`
`224
`
`
`
`21 0
`
`FIG. 2 (PRIOR ART)
`
`222
`
`
`
`10
`5
`0 AI<1 I 1>Normalized
`
`20
`15
`°TiN<1H>Normolized
`
`302
`
`'
`
`o
`
`FIG. 3
`
`Page 3 0f 13
`
`
`
`Page 3 of 13
`
`

`

`US. Patent
`
`Mar. 16, 1999
`
`Sheet 3 0f 4
`
`5,882,399
`
`
`
`N
`
`1.00
`
`0.90
`
`0.80T'
`
`0.70-
`
`0.60—
`
`0.50—
`
`040*
`
`0.301
`
`0.20-
`
`
`
`0.101-
`
`0.00
`
`5
`
`10
`
`15
`
`20
`
`0TiN<111>Norma|ized
`
`ATi<002>NormaIized
`
`FIG. 4
`
`
`
`506
`
`
`
`
`
`|
`
`l
`
`l 1
`
`
`
`
`
`0.1OT
`i.
`.. ‘
`——{
`_r_
`F
`_i
`‘
`(
`
`
`0.00 .
`
`25
`
`Ell
`
`0A|<111>Norma|ized
`
`0TiN<111>Normalizedi
`
`508
`
`FIG. 5
`
`Page 4 0f 13
`
`Page 4 of 13
`
`

`

`
`
`1119chST]
`
`
`
`6661‘91119W
`
`17J0I7199118
`
`66s‘zss‘s
`
`25000
`
`IMP Ti Fflnw Crystal Ofienfufion
`
`
`
`
`
`
`
`10000
`
`_,_____
`
`10
`
`20
`Pressure (an)
`
`\
`606
`
`30
`
`40
`
`FWCE. 6
`
`InfensHy
`(002)
`
`Page 5 of 13
`
`

`

`5,882,399
`
`1
`
`METHOD OF FORMING A BARRIER LAYER
`WHICH ENABLES A CONSISTENTLY
`HIGHLY ORIENTED CRYSTALLINE
`STRUCTURE IN A METALLIC
`INTERCONNECT
`
`BACKGROUND OF THE INVENTION
`
`1. Field of the Invention
`
`The present invention pertains to a method of forming a
`titanium-comprising or a tantalum-comprising barrier/
`wetting layer structure. This structure is useful when a series
`of semiconductor substrates is to be fabricated in a process
`chamber, as it enables a consistently high degree of <111>
`crystal orientation in an aluminum interconnect layer or a
`copper interconnect layer deposited over such a barrier/
`wetting layer structure,
`throughout the processing of the
`series of substrates.
`
`2. Brief Description of the Background Art
`Titanium nitride layers have been used in semiconductor
`device structures as barrier layers for preventing the inter-
`ditfusion of adjacent layers of materials such as aluminum
`and silicon, for example. However, the crystal orientation of
`aluminum deposited over the surface of the titanium nitride
`barrier layer is typically polycrystalline, and polycrystalline
`aluminum has poor electromigration resistance.
`In the formation of integrated circuit
`interconnect
`structures, such as a Ti/TiN/TiNx/Al stack, electromigration
`of aluminum atoms within the aluminum layer becomes a
`problem if the aluminum layer is not formed with a high
`degree of <111> crystal orientation. Electromigration of the
`aluminum atoms can result
`in open circuits within the
`integrated circuit structure, and therefore, such electromi-
`gration must be inhibited or eliminated. Electromigration of
`aluminum atoms can occur within filled vias as well, impair-
`ing the conductivity of the contacts.
`US. Pat. No. 4,944,961 to Lu et al., issued Jul. 31, 1990,
`describes a process for partially ionized beam deposition of
`metals or metal alloys on substrates, such as semiconductor
`wafers. Metal vaporized from a crucible is partially ionized
`at the crucible exit, and the ionized vapor is drawn to the
`substrate by an imposed bias. Control of substrate tempera-
`ture is said to allow non-conformal coverage of stepped
`surfaces such as trenches or vias. When higher temperatures
`are used, stepped surfaces are planarized. The examples
`given are for aluminum deposition, where the non-
`conformal deposition is carried out with substrate tempera-
`tures ranging between about 150° C. and about 200° C., and
`the planarized deposition is carried out with substrate tem—
`peratures ranging between about 250° C. and about 350° C.
`S. M. Rossnagel and J. Hopwood describe a technique of
`combining conventional magnetron sputtering with a high
`density,
`inductively coupled RF plasma in the region
`between the sputtering cathode and the substrate in their
`1993 article titled “Metal ion deposition from ionized mag-
`netron sputtering discharge”, published in the J. Vac. Sci.
`Technol. B. Vol. 12, No. 1, Jan/Feb 1994. One of the
`examples given is for titanium nitride film deposition using
`reactive sputtering, where a titanium cathode is used in
`combination with a plasma formed from a combination of
`argon and nitrogen gases.
`US. Pat. No. 5,262,361 to Cho et al., issued Nov. 16,
`1993 describes a method for forming single crystal alumi-
`num films on the surface of a substrate such as silicon (111).
`The object is to increase the amount of the aluminum (111)
`crystal orientation,
`to improve the electromigration resis-
`
`u:
`
`10
`
`20
`
`30
`
`40
`
`50
`
`60
`
`65
`
`2
`tance of the aluminum. Electrically neutral aluminum is
`deposited by a vacuum evaporation technique upon a silicon
`wafer surface at a temperature ranging between about 300°
`C. and about 400° C.
`US. Pat. No. 5,543,357 to Yamada et al., issned Aug. 6,
`1996, describes a process for manufacturing a semiconduc—
`tor device wherein a titanium film is used as an under film
`for an aluminum alloy film to prevent the device character-
`istics of the aluminum alloy film from deteriorating. The
`thickness of the titanium film is set to 10% or less of the
`thickness of the aluminum alloy film and at most 25 nm. In
`the case of the aluminum alloy film containing no silicon,
`the titanium film is set to 5% of less of the thickness of the
`aluminum alloy film. The aluminum film is formed at a
`substrate temperature of 200° C. or less by a sputtering
`process, and when the aluminum film or an aluminum alloy
`film is to fill a via hole, the substrate is heated to fluidize the
`aluminum. The pressure during the aluminum film forma-
`tion and during the fluidization is lower than 10'7 Torr. A
`titanium nitride barrier layer may be applied on an interlay-
`ered insulating film (or over a titanium layer which has been
`applied to the insulating film), followed by formation of a
`titanium film over the titanium nitride film, and finally by
`formation of the aluminum film over the titanium film. After
`formation of the titanium nitride barrier layer, the barrier
`layer is heated to a temperature of about 600° C. to 700° C.
`in a nitrogen atmosphere using a halogen lamp so that any
`titanium which is not nitrided will become nitrided. The
`titanium nitride barrier layer is said to be a poor barrier layer
`if un-nitrided titanium is present within the layer.
`US. Pat. No. 5,571,752 to Chen et al., issued Nov. 5,
`1996, discloses a method for patterning a submicron semi—
`conductor layer of an integrated circuit. In one embodiment,
`titanium or titanium nitride having‘a thickness of between
`approximately 300 and 2000 A is formed by sputter depo-
`sition to reach the bottom of a contact opening. The barrier
`layer may be annealed to form a silicide in the bottom of the
`opening. A conformal conductive layer of a refractory metal
`or refractory metal silicide is formed over the titanium or
`titanium nitride using chemical vapor deposition
`Finally, a second conductive layers typically aluminum is
`applied over the surface of the conformal conductive layer.
`The aluminum is sputtered on, preferably at a temperature
`ranging between approximately 100° C. and 400° C. This
`method is said to make possible the filling of contact
`openings having smaller device geometry design require-
`ments by avoiding the formation of fairly large grain sizes
`in the aluminum film.
`
`US. patent application, Ser. No. 08/753,251 of Ngan et
`al., filed Nov. 21, 1996, describes a method for producing a
`titanium nitride-comprising barrier layer on the surface of a
`contact via. For certain contact geometries, when the reactor
`pressure is reduced during formation of the titanium nitride-
`comprising barrier layer, the thickness of the barrier layer on
`the sidewalls of the via increases. This enables an aluminum
`fill
`to travel along the sidewalls of the via more easily,
`resulting in a better fill of the via. In particular, the titanium
`nitride comprising barrier layer needs to be of a minimum
`thickness and to have a minimum titanium content so that
`the barrier layer can react slightly with the Aluminum, to
`draw the aluminum along the sidewalls of the via.
`US. patent application, Ser. No. 08/511,825 of Xu et al.,
`filed Aug. 7, 1995, assigned to the Assignee of the present
`invention, and hereby incorporated by reference in its
`entirety, describes a method of forming a titanium nitride-
`comprising barrier layer which acts as a carrier layer. The
`carrier layer enables the filling of apertures such as vias,
`
`Page 6 of 13
`
`Page 6 of 13
`
`

`

`
`
`5,882,399
`
`3
`holes or trenches of high aspect ratio and the planarization
`of a conductive film deposited over the carrier layer at
`reduced temperatures compared to prior art methods.
`A “traditionally sputtered” titanium nitride-comprising
`film or layer is deposited on a substrate by contacting a
`titanium target with a plasma created from an inert gas such
`as argon in combination with nitrogen gas. A portion of the
`titanium sputtered from the target reacts with nitrogen gas
`which has been activated by the plasma to produce titanium
`nitride, and the gas phase mixture contacts the substrate to
`form a layer on the substrate. Although such a traditionally
`sputtered titanium nitridecomprising layer can act as a
`wetting layer for hot aluminum fill of contact vias, good fill
`of the via generally is not achieved at substrate surface
`temperature of less than about 500° C. To provide for
`aluminum fill at a lower temperature, Xu et al. (as described
`in US. patent application, Ser. No. 08/511,825), developed
`a technique for creating a titanium nitride-comprising barrier
`layer which can act as a smooth carrier layer, enabling
`aluminum to flow over the barrier layer surface at lower
`temperatures (at temperatures as low as about 350° C., for
`example). A typical barrier layer described by Xu et al., is a
`combination of three layers including a first layer of titanium
`(Ti) deposited over the surface of the via; a second layer of
`titanium nitride (TiN) is deposited over the surface of the
`first titanium layer; finally a layer of TiN, is deposited over
`the TiN second layer. The three layers are deposited using
`Ion Metal Plasma (IMP) techniques which are described
`subsequently herein. Typically the first layer of titanium is
`approximatelngOO A to 200 A thick; the second layer ofTiN
`is about 800
`thick, and the third layer of TiN, is about 60
`A thick. Although a good fill of contact vias having 0.25/4
`diameter through holes having an aspect ratio of about 5 was
`achieved, the crystal orientation of the aluminum was low in
`{111} crystal orientation content, resulting in poor elec-
`tromigration (EM) performance for the aluminum intercon-
`nect. It was desired to increase the aluminum { 111} crystal
`orientation content for purposes of improving the EM per-
`formance.
`
`U.S. patent application, Ser. No. 08/825,216 of Ngan et
`al., filed Mar. 27, 1997, discloses various process techniques
`which can be used to control the crystal orientation of a
`titanium nitride barrier layer as it is deposited.
`U.S. patent application, Ser. No. 08/824,911 of Ngan et
`al., filed Mar. 27, 1997 discloses improved Ti/TiN/TiNx
`barrier/wetting layer structures which enable the aluminum
`filling of high aspect vias while providing an aluminum fill
`exhibiting a high degree of aluminum {111} crystal orien-
`tation. In particular, an improved Ti/I‘iN/TiNx barrier layer
`deposited using IMP techniques can be obtained by increas-
`ing the thickness of the first layer of Ti to range from greater
`than about 100 A to about 500 A (the feature geometry
`controls the upper thickness limit); by decreasing the thick-
`ness of the TiN second layer to range from greater than about
`100 A to less than about 800 A (preferably less than about
`600 A); and, by controlling the application of the TiNx third
`layer to provide a Ti content ranging from about 50 atomic
`percent titanium (stoichiometric) to about 100 atomic per—
`cent titanium. Preferably the TiNx third layer is formed at the
`end of the deposition of the TiN second layer and exhibits a
`Ti content gradient Which begins at a stoichiometric, 50
`atomic percent, Ti content and ends at a Ti content of about
`100 atomic percent. The thickness of the TiNx third layer
`preferably ranges from about 15 A to about 500 A. The
`improved Ti/TiN/TiNx barrier layer enables the deposit of an
`aluminum interconnect an aluminum via fill where the
`aluminum exhibits a high {111} crystallographic content.
`
`VI
`
`10
`
`20
`
`30
`
`4o
`
`50
`
`60
`
`4
`U.S. patent application, Ser. No. 08/824,911 is hereby incor—
`porated herein by reference, in its entirety.
`Subsequent to the filing of U.S. patent application Ser.
`No. 08/824,911, we discovered that
`in a production
`simulation, with a cassette containing a large quantity of
`semiconductor wafers processed in series in a given process
`chamber, there were unknown factors present at the begin-
`ning of processing which affected the <111> crystal orien-
`tation of the aluminum layer. Although the method provided
`in U.S. patent application Ser. No. 08/824,911 enables the
`deposit of a high <111> crystallographic aluminum content,
`to ensure a consistently high aluminum <111> content
`throughont the processing of a large number of semicon-
`ductor substrates,
`it is necessary to either eliminate the
`unknown factors afiecting the crystalline structure or to find
`a way to compensate for them.
`
`SUMMARY OF THE INVENTION
`
`The crystal orientation content of a metallic interconnect
`layer, such as the <111> crystal orientation content of an
`aluminum or copper interconnect layer, can be maintained at
`a consistently high value during the processing of an entire
`series of semiconductor substrates in a given process cham-
`ber. To provide the stable and consistent crystal orientation
`content for the metallic interconnect layer, it is necessary
`that the barrier layer structure underlying the metallic inter-
`connect layer have a consistent crystal orientation. This
`means the barrier layer structure crystal orientation content
`must remain consistent throughout the processing of the
`entire series of substrates in a given process chamber. We
`have determined that to ensure the consistent crystal orien-
`tation content of the barrier layer structure, it is necessary to
`form the first layer of the barrier layer structure to have a
`minimal thickness of at least about 150 A, to compensate for
`irregularities in the crystal orientation which may by present
`during the initial deposition of this layer.
`As an alternative to increasing the thickness of the first
`layer of the barrier layer structure, this first layer can be
`deposited at lower process chamber pressures, so that harm-
`ful irregularities in the crystal orientation are eliminated.
`By forming the first layer of the barrier layer using one of
`the alternative means described above, we were able to
`obtain the desired <111> crystal orientation content of an
`aluminum interconnect layer throughout the processing of
`an entire cassette of at least 25 wafers in a given process
`chamber.
`The above described method has been demonstrated for a
`Ti/TiN/I'iNx barrier layer and is expected to produce equiva-
`lent results for a TiN/TiNx barrier layer as well. Further, we
`would expect the method to apply to a tantalum-comprising
`barrier layer used in combination with an overlying copper
`interconnect
`layer.
`In this latter case,
`the barrier layer
`structure, whether it be a Ta layer, a TaN layer, a TaNx layer,
`or a combination thereof, should be deposited in the manner
`described, to ensure a high <111> crystal orientation content
`in each of these barrier layers. This will provide for a high
`<111> crystal orientation content in the copper layer depos-
`ited over the barrier layer.
`
`BRIEF DESCRIPTION OF THE DRAWINGS
`
`FIG. 1 shows a schematic of an ENDURA® semicon-
`ductor processing system of the kind available from Applied
`Materials, Inc. of Santa Clara, Calif.
`FIG. 2 illustrates a schematic of a conductive contact
`formed within a high aspect ratio via, and shows,
`in
`
`Page 7 0f 13
`
`Page 7 of 13
`
`

`

`»-v
`
`5,882,399
`
`5
`particular, a Ti/TiN/TiNx barrier layer of the kind described
`with reference to U.S. patent application, Ser. No. 08/824,
`911.
`
`FIG. 3 shows the normalized X-ray diffraction (XRD)
`curve for an aluminum film and for the IMP-deposited TiN
`barrier layer over which the aluminum film was deposited,
`as a function of the number of wafers processed in succes-
`sion in the barrier layer deposition chamber. These curves
`relate to a barrier layer which was processed outside the
`method of the present invention.
`FIG. 4 shows the normalized XRD curve for an IMP-
`deposited TiN barrier layer and for the IMP-deposited Ti
`layer over which the TiN layer was deposited, as a function
`of the number of wafers processed in succession in the
`barrier layer deposition chamber. These curves relate to a
`barrier layer which was formed using the method of the
`present invention.
`FIG. 5 shows the normalized XRD curve for an aluminum
`film and for the IMP-deposited TiN layer on which the
`aluminum film was deposited, as a function of the number
`Of wafers processed in succession in the barrier layer depo-
`sition chamber. These curves relate to a barrier layer which
`was formed using the method of the present invention.
`FIG. 6 shows the XRD intensity curve for an IMP-
`deposited Ti layer as a function of the deposition chamber
`pressure, when the power input to the Ti target is in the range
`of 3 kW to 5 kW. This curve is for a Ti layer which is 1,000
`A thick.
`
`DETAILED DESCRIPTION OF THE
`PREFERRED EMBODIMENTS
`
`This disclosure pertains to a method of ensuring that the
`desired crystal orientation content of a metallic interconnect
`layer remains consistently high during the processing of an
`entire series of semiconductor substrates in a given process
`chamber. To provide the consistent crystal orientation con-
`tent of the metallic interconnect layer, it is necessary to form
`the first layer of an underlying barrier layer structure to a
`minimal thickness of at least 150 A,
`to compensate for
`irregularities in the crystal orientation which may by present
`during the initial deposition of this layer. In the alternative,
`this first
`layer can be less than the minimal
`thickness
`specified above if it is deposited at a sufficiently low process
`chamber pressure.
`
`I. DEFINITIONS
`
`As a preface to the detailed description, it should be noted
`that, as used in this specification and the appended claims,
`the singular forms “a”, “an”, and “the” include plural
`referents, unless the context clearly dictates otherwise. Thus,
`for example, the term “a semiconductor” includes a variety
`of different materials which are known to have the behav-
`ioral characteristics of a semiconductor, reference to a
`“plasma” includes a gas or gas reactants activated by an RF
`glow discharge, reference to “the contact material” includes
`aluminum, aluminum alloys, and other conductive materials
`which have a melting point enabling them to be sputtered
`over the temperature range described herein.
`Specific terminology of particular importance to the
`description of the present invention is defined below.
`The term “aluminum” includes alloys of aluminum of the
`kind typically used in the semiconductor industry. Such
`alloys include aluminum-copper alloys, and aluminum-
`copper-silicon alloys, for example. The preferred embodi-
`ments described herein were for aluminum comprising about
`05% copper.
`
`D
`
`10
`
`20
`
`30
`
`40
`
`50
`
`60
`
`6
`The term “aspect ratio” refers to the ratio of the height
`dimension to the width dimension of particular openings
`into which an electrical contact is to be placed. For example,
`a via opening which typically extends in a tubular form
`through multiple layers has a height and a diameter, and the
`aspect ratio would be the height of the tubular divided by the
`diameter. The aspect ratio of a trench would be the height of
`the trench divided by the minimal travel width of the trench
`at its base.
`
`The term “feature” refers to contacts, vias, trenches, and
`other structures which make up the topography of the
`substrate surface.
`
`The term “ion-deposition sputtered” and the term “ion
`metal plasma (IMP) refer to sputter deposition, preferably
`magnetron sputter deposition (where a magnet array is
`placed behind the target). A high density,
`inductively
`coupled RF source is positioned between the sputtering
`cathode and the substrate support electrode, whereby at least
`a portion of the sputtered emission is in the form of ions at
`the time it reaches the substrate surface.
`
`The term “normalized” refers to a method by which one
`or more sets of figures are scaled appropriately in order to
`describe or explain any relationships between the figures. A
`common approach, as is used here, is to normalize to “1”.
`This is achieved by selecting the highest value in a data set
`and then dividing all numbers in the data set by this value.
`By applying this approach to two or more data sets, a graph
`can be produced which shows the relative change in values
`between the data sets.
`
`The term “reactive ion deposition” or “reactive ion metal
`plasma (IMP)” refers to ion-deposition sputtering wherein a
`reactive gas is supplied during the sputtering to react with
`the ionized material being sputtered, producing an ion-
`deposition sputtered compound containing the reactive gas
`element.
`
`The term “traditional sputtering” refers to a method of
`forming a film layer on a substrate wherein a target is
`sputtered and the material sputtered from the target passes
`between the target and the substrate to form a film layer on
`the substrate, and no means is provided to ionize a substan-
`tial portion of the target material sputtered from the target
`before it reaches the substrate. One apparatus configured to
`provide traditional sputtering is disclosed in U.S. Pat. No.
`5,320,728, the disclosure of which is incorporated herein by
`reference. In such a traditional sputtering configuration, the
`percentage of target material which is ionized is less than
`10%, more typically less than 1%, of that sputtered from the
`target.
`The term “traditionally sputtered aluminum” refers to
`aluminum applied using traditional sputtering techniques,
`where the substrate temperature during application of the
`aluminum ranges between about 200° C. to about 550° C.,
`unless specified otherwise.
`The term “XRD” (X—ray Dilfraction) refers to a technique
`commonly used to measure crystalline orientation, wherein
`radiation over particular wavelengths is passed through the
`material
`to be characterized, and the diffraction of the
`radiation, caused by the material through which it passes, is
`measured. A map is created which shows the diffraction
`pattern, and the crystal orientation is calculated based on this
`map.
`
`II. AN APPARATUS FOR PRACTICING THE
`'
`INVENTION
`
`A process system in which the method of the present
`invention may be carried out is the ENDURA® Integrated
`
`Page 8 0f 13
`
`Page 8 of 13
`
`

`

`
`
`5,882,399
`
`7
`Processing System available from Applied Materials, Inc. of
`Santa Clara, Calif. This process system 100 is shown in the
`FIG. 1. Of particular interest are individual processing
`chambers which would be used in the practice of the present
`invention. Process chamber 102 is used for the IMP depo-
`sition of a barrier layer such as a Ti/TiN/TiNx layer. Process
`chamber 104 is similar to process chamber 102. Process
`chamber 106 is used for traditional sputtering of an alumi-
`num layer, and transfer chamber 108 is a process chamber
`which enables movement of a substrate from one of the
`surrounding process chambers to another.
`For example, after deposition of a Ti/TiN/TiNx barrier
`layer in process chamber 102, a substrate is moved through
`transfer chamber 108 to process chamber 106 for sputtering
`of an overlying aluminum film.
`Process chamber 102 is typically is a magnetron chamber
`which employs a standard sputter magnet (to confine the
`sputtering plasma, enabling an increased sputtering rate); an
`inductively coupled RF source positioned between the sput-
`tering cathode and the substrate support electrode, whereby
`at least a portion of the sputtered emission is in the form of
`ions at
`the time it reaches the substrate surface; and a
`sputtering target cathode to which DC power is applied.
`EXAMPLE ONE
`
`To form the Ti/TiN/TiNx barrier layer structure of the
`present invention, a titanium target cathode of about 14
`inches (35.5 cm) in diameter was used, and a DC power was
`applied to this cathode over a range from about 4 kW to
`about 8 kW. The substrate, comprising an 8 inch (20.3 cm)
`diameter silicon wafer, was placed a distance of about 5.5
`inches (14 cm) from the target cathode. A high density,
`inductively coupled RF plasma was generated in the region
`between the target cathode and the substrate. The induc-
`tively coupled plasma was generated by applying RF power
`to a coil having at least one turn and preferably from about
`1 to 3 turns. The power was applied over a range from about
`100 kHz to about 60 MHZ (and preferably about 2 MHZ) at
`a wattage ranging from about 0.5 kW to about 6 kW (and
`preferably ranging from about 1.5 kW to about 4 kW).
`Typically the coil is fabricated from metal tubing which
`permits water cooling, and has a diameter of about 0.125
`inch (0.32 cm). However, the coil can be fabricated from a
`sheet or ribbon, or other form which provides the desired
`function.
`
`UI
`
`10
`
`20
`
`30
`
`40
`
`A substrate bias voltage ranging from 0 to about —300 V
`DC may be applied to the substrate or to the platen on which
`the substrate sets. When a bias voltage is applied a DC.
`substrate self bias is created which attracts ions from the
`plasma to the substrate.
`
`50
`
`III. THE STRUCTURE OF THE Ti/I‘iN/TiNx
`BARRIER LAYER
`
`The typical barrier layer structure comprises a stack of
`three layers. In the more preferred embodiment, the first
`layer (applied directly over an underlying substrate such as
`silicon or silicon oxide) is ion-deposited titanium (Ti). The
`second layer, applied over the first layer, is ion-deposited
`titanium nitride (TiN). The third layer, applied over the
`second layer, is an ion-deposited layer, TiNx, where the
`composition of the layer varies from about 50 atomic %
`titanium to about 100 atomic % titanium. Preferably the
`titanium concentration is a gradient beginning with essen-
`tially stoichiometric TiN and progressing toward pure Ti.
`An electrical contact or conductive layer is applied over
`the barrier layer structure. Although the contact or conduc—
`
`60
`
`8
`tive layer described herein is aluminum containing about
`0.5% by weight copper, other conductive materials benefit
`from use of the smooth barrier layer structure described
`herein. The <111> crystallographic content of a subse-
`quently applied conductive material can be adjusted using
`the concepts described herein. The aluminum deposited in
`the examples which follow was traditionally sputtered
`aluminum, applied over a temperature range of from about
`350° C. to about 450° C. Preferably the aluminum is applied
`at reduced pressures ranging from greater than about 0.5 mT
`up to about 50 mT, preferably between about 1 mT and 30
`mT, and more preferably between about 1 mT and 4 mT,
`depending on the feature to be fabricated.
`FIG. 2 shows a schematic of a trench or Via 213 contain-
`ing a barrier layer structure 200 of the kind which would
`utilize the method of the present invention. The structure
`200 was formed on a semiconductor substrate comprising a
`silicon base 210 having an overlying silicon dioxide layer
`211. The via or trench 213 was created by dry etching
`through the silicon dioxide layer 211 to silicon base 210.
`Structure 200 comprised three layers: Ti/I‘iN/I‘iNx. The first
`layer of titanium was IMP deposition sputtered upon the
`surface of both silicon dioxide layer 211 and silicon base
`210; a second layer of reactive ion-deposition sputtered
`titanium nitride layer 214 was deposited overlying first
`titanium layer 212; and a third ion-deposition sputtered
`titanium nitride-comprising layer 216 was deposited over-
`lying titanium nitride layer 214. (Upon ion-sputtering of
`titanium layer 212, a thin layer of titanium silicide 224 is
`typically formed at the bottom of via 213 upon high tem-
`perature annealing). Structure 200 was then filled with a
`conductive layer 219. The aspect ratio of via or trench 213
`was as illustrated by the ratio of dimension 222 to dimension
`220, and was approximately 20: 1, with the dimension of 220
`being approximately 0.25/1.
`Aluminum was traditionally sputtered upon a structure
`200 at a substrate temperature of about 400° C.
`IV. THE METHOD OF APPLICATION OF
`BARRIER LAYERS AND ALUMINUM
`
`The apparatus in which the preferred embodiments
`described herein were fabricated was the Endura® Inte-
`grated Processing System previously described and illus-
`trated in FIG. 1.
`
`EXAMPLE TWO
`
`The description which follows pertains to the fabrication
`of the Ti/TiN/TiNx barrier layer described above.
`To obtain an ion-deposition sputtering rat