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`ts;
`United States Patent
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`5,648,284
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`[11] Patent Number:
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`Kusunokiet al.
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`{45] Date of Patent:
`Jul. 15, 1997
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`US005648284A
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`[54] FIELD EFFECT TRANSISTOR INCLUDING
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`SILICON OXIDE FILM AND NITRIDED
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`OXIDE FILM AS GATE INSULATOR FILM
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`AND MANUFACTURING METHOD
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`THEREOF
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`[75}
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`Inventors: Shigeru Kusunoki; Masahide Inuishi,
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`both of Hyogo-ken, Japan
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`[73] Assignee: Mitsubishi Denki Kabushiki Kaisha,
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`Tokyo, Japan
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`[21] Appl. No.: 653,090
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`[22] Filed:
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`May24, 1996
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`Related U.S. Application Data
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`[60] Continuation of Ser. No. 341,952, Nov. 16, 1994, aban-
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`doned, which is a division of Ser. No. 930,932, Aug. 18,
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`1992, Pat. No. 5,369,297.
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`Foreign Application Priority Data
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`[30]
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`Sep. 5,1991
`[TP]
`Japan .....cssssssscsscsscsssosessseseees 3-225686
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`Dec. 6,1991
`[JP]
`Japan ............
`. 3-323239
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`Ful. 3, 2992
`FTP]
`Japan occsscscssonsceasencessene 4-176873
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`[51]
`Urnt. CLS acccccccscccscsscsssseccsnssasscescsssecesessas HO1L 21/265
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`[52] U.S. C1. cccceeccssecceseesssseetseveens 437/40 GS; 437/41 GS;
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`437/42; 437/241
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`[58] Field of Search ...............cccce 437/40 GS, 41 GS,
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`437/42, 241
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`[56]
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`4,774,197
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`..cessesssssscossesees 43724
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`References Cited
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`U.S. PATENT DOCUMENTS
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`9/1988 Haddad et ab.
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`OTHER PUBLICATIONS
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`Kusunoki, “Hot—Carrier-resistant Structure By Re—Oxi-
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`dized Nitrided Oxide Sidewall For Hoghly Reliable and
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`High Performance LDD MOSFETS”, IEDM, IEEE,pp.
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`649-652. 1991.
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`Primary Examiner—Charles L. Bowers, Ir.
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`Assistant Examiner—Lynne A. Gurley
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`Attorney, Agent, or Firm—Lowe,Price, LeBlanc & Becker
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`ABSTRACT
`[57]
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`An N type field effect transistor having a higher resistivity
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`to hot carriers and exhibiting a higher current handling
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`capability even when used at a low gate voltage, and a
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`method of manufacturing such a transistor are provided. A
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`nitrided oxide film is formed on a drain avalanche hotcarrier
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`injection region. Thenitrided oxide film is highly resistive to
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`drain avalanchehot carriers as comparedto a silicon oxide
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`film. The silicon oxide film is formed on a channel hot
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`electron injection region. The silicon oxide film is highly
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`resistive to channel hot electrons as compared to thenitrided.
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`oxide film. A major portion of a gate insulator film is a
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`silicon oxide film. The silicon oxide film exhibits a higher
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`current handling capability at a low gate voltage as com-
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`pared to the nitrided oxide film.
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`7 Claims, 39 Drawing Sheets
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`TSMCExhibit 1041
`TSMCv. IP Bridge
`IPR2016-01246
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`Page 1 of 51
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`TSMC Exhibit 1041
`TSMC v. IP Bridge
`IPR2016-01246
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`

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`US. Patent
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`Jul. 15, 1997
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`5,648,284
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`FIG. 1
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`FIG.2
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`[v]/(AV‘G-AVS)
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`SEE No GaTE TA
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`TOTALVGSHIFT
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`STRESS TIME
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`( sec)
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`Sheet 2 of 39
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`FIG. 3
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`PRIOR ART
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`<——— Ni, GAS
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`VACUUM PUMP
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`33
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`5|
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`Sheet 3 of 39
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`FIG. 4
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`awh
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`FIG. 5
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`Sheet 4 of 39
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`FIG. 6
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`Sheet 5 of 39
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`7a
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`9
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`7a
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`9 fo
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`FIG. 8
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`Sheet 6 of 39
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`FIG. 10
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`60
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`7a
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`FIG. 11
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` |ibekchhubabetebbedadadedhubabidghrbedhedLaiak
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`Sheet 7 of 39
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`FIG. 12
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`FIG. 13
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`Sheet 8 of 39
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`FIG. 14
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`al
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`FIG. 15
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` \Lehalabvduddbihkebbihicctirritognnn) emeahanlhcakerbatntrtwhmhkadhuitaswindward’
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`Sheet 9 of 39
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`FIG. 16
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`Sheet 10 of 39
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`FIG. 18
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`NoCONCENTRATION
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`Sheet 11 of 39
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`FIG. 19
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`2]
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`f
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`FIG. 20
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`Sheet 12 of 39
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`FIG. 21
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`fi ] ¢. ) 3
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`PRIOR ART
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`a re
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`3b
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`9
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`4 3b
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`FIG. 25
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`ve i~
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`ih
`beDhakahahahokakak cannnneremnnnmmmmammmmmmammmmmmmrmmmmnnandts dhrthasheahetheaaheshaketl
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`"8 4
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`15b
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`FIG. 26
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`FIG. 27
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` Caereeeeeeneeeddedehhctnalochehehaherhetyaatashashesbettee
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`15b
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`FIG. 28
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`130
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`i,
`|Lahnukehehehabeataskankas’
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`5a
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`Sheet 16 of 39
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`5,648,284
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`FIG. 30
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`~N
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`TSy
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`FIG. 3]
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`FIG. 32
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`28
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`FIG, 33
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`Sheet 18 of 39
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`FIG. 34
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`Cochtaemntbheathakuidatsf
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`FIG, 35
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`ISSSAASASAS NN.Ny
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`FIG. 36
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`PRREREEERRERERY
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`190
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`FIG. 37
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`KSSSSSSSSSSSSSSY2ap[
`aNSSSTSST
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`150
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`FIG. 38
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`LLLEL La
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`‘SREBL.NNyyoV4QK
`Nisossss
`N
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`FIG. 39
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`5
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`7 S
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`Sokhehd
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`FIG. 4]
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`FIG. 42
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`7
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`FIG. 43
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`7
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`FIG. 44
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`FIG. 45
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`(omens?4
`a
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`y
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`FIG. 46
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`FIG. 48
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`> 10°
`
`E
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`_
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`
`.
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`
`
`N=ch MOSFET (SINGLE DRAIN)
`
`L/W=1.0/10.0( um/um)
`
`
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`10%|----------+----------t----------
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`res ces oeee oe eeeee
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`1
`10
`
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`9| VO=6.0V Vo(Isub,max) AFTER 1000sec
`
`
`
`
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`10
`
`
`
`800
`900
`1000
`1100
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`
`NITRIDATION TEMPERATURE
`[°c]
`
`
`
`
`— u&
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`103 N=-ch MOSFET(SINGLE DRAIN)
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`L/W=1.0/10.0( um/um)
`
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`Vo=Vo=6.0V AFTER
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`NITRIDATION TEMPERATURE [°c ]
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`FIG.49
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`THRESHOLDVOLTAGESHIFT[mv]
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`5,648,284
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`F1G.50
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`3
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`10"
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`[20s/A/zWd]jyary
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`Eetf [MV/cm]
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`F1G.51
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`90096REs
`
`N-
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`ch MOSFET
`109/700( pum/um )
`
`L/W
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`0.9MV/cm)
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`RNO GATE
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`900
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`1100
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`M( Eetf
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`200
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`NITRIDATION TEMPERATURE [°C]
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`Jul. 15, 1997
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`Sheet 26 of 39
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`FIG. 52
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`,
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`an
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`NS.=~
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`Sheet 27 of 39
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`5,648,284
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`FIG. 54
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`Sheet 28 of 39
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`FIG. 56
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`Jul. 15, 1997
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`Sheet 29 of 39
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`FIG. 58
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`Sheet 30 of 39
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`FIG. 60
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`29
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`Pa baaditrhadealanthatbathachataharhadordeshaheatarhchebabrdichchahmmseearerenrtusmnnmmmnAdetedtehtrTeHO
`benhntheatrbarhathadathathathathahababatishahnbadedeahalehdchedanamanmenserananasasaenkdolteyiTaTaIG
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`Sheet 31 of 39
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`15a
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`Sheet 32 of 39
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`FIG, 63
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`Sheet 33 of 39
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`5,648,284
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`FIG. 65
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`ai
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`FIG. 66
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`21
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`tC 7
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`PCooeee
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`15a
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`9
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`5b
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`Sheet 34 of 39
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`5,648,284
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`1Sa
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`4
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`15b
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`Sheet 35 of 39
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`5,648,284
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`Sheet 36 of 39
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`FIG. 7]
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`5,648,284
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`PRIOR ART
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`Page 37 of 51
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`Sheet 37 of 39
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`5,648,284
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`19b
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`CHE
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`P
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`LA DAHC
`
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`LOW
`CONCENTRATION
`
`
`
`MEDIUM
`CONCENTRATION
`
`
`
`DAHC
`
`HIGH
`
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`CONCENTRATION
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`DAHC
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`1
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`P
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`P
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`CHE
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`CHE
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`Sheet 38 of 39
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`5,648,284
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`FIG.75
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`DRAIN AVALANCHE
`
`
`
`CHANNEL HOT
`
`ELECTRON
`
`
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`
`[mv]
`
`
`
`
`40
`
`2
`
`_
`te
`w)
`
`—W
`
`&=
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`
`
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`
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`00
`
`
`0
`
`
`
`HOT CARRIER
`VthSHIFT
`
`
`NITRIDED
`(OXIDE FILM
`
`
`10
`
`20
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`30
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`40
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`50
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`60
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`GATE VOLTAGE
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`(Vj
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`FIG.76
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`[mv]
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`00
`
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`+40
`
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`-20
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`30 40 50 -60
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`GATE VOLTAGE
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`[Vv]
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`Sheet 39 of 39
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`FIG.77
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`PRIOR ART
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`10 Foum/1.0um
`
`Tox=6nm
`
`
`
`“NOQZ
`_--£9"
`
`
`Agyevtn
`
`
`an
`
`ae SV+VtH
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`“
`
`.
`<
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`5
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`8
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`4
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`2
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`9
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`
`
`0
`
` nMOSFET
`Io(mA)
`
`—TTT AWNNTH
`
`
`————
`
`oe as
`
`/
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`Uy
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`10 Vo(V)
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`FIG.78
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`prior ART
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`1
`FIELD EFFECT TRANSISTOR INCLUDING
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`SILICON OXIDE FILM AND NITRIDED
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`OXIDE FILM AS GATE INSULATOR FILM
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`AND MANUFACTURING METHOD
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`THEREOF
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`This application is a continuation of application Ser. No.
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`08/341,952 filed Nov. 16, 1994 now abandoned, which
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`application is a division of application Ser. No. 07/930,932
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`filed Aug. 18, 1992 U.S. Pat. No. 5,369,297.
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`BACKGROUND OF THE INVENTION
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`1. Field of the Invention
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`The present invention relates generally to field effect
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`transistors and, more particularly, to a field effect transistor
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`including a silicon oxide film and a nitrided oxide film as a
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`gate insulator film, and a method of manufacturing such a
`field effect transistor.
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`2. Description of the Background Art
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`A nitrided oxide film formed by a rapid lamp annealingis
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`a highlyreliable insulator film to dielectric breakdown. This
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`is disclosed in, for example, “Extended Abstract of the 21st
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`Conference on Solid State Devices and Materials”, Tokyo,
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`p.197.
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`Thenitrided oxide film is such a film that a large amount
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`of nitrogen is included in an interface between the nitrided
`oxide film and a material beneath the nitrided oxide film.
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`With a reduction in scale of devices, it is considered that
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`such a nitrided oxide film is employed as a gate insulator
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`film of a MOS (Metal Oxide Semiconductor) field effect
`transistor.
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`FIG. 71 is a schematic cross-sectional view of a MOS
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`field effect transistor with a conventional single drain struc-
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`ture. Such a MOSfield effect transistor is disclosed in, for
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`example, Digest “International Electron Device Meeting
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`1989”, p. 267. A source region 3a and a drain region 3b are
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`formedwith a spacing in a silicon substrate 1 having a main
`surface 2. A nitrided oxide film 5 is formed on main surface
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`2 between source region 3a and drain region 3b. A gate
`electrode 7 is formed on nitrided oxide film 5.
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`A description will now be made on a method of manu-
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`facturing such a MOSfield effect transistor. First, silicon
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`substrate 1 with a boron concentration of approximately
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`1x10'7/cm? is prepared. A silicon oxide film of 70 A is
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`formed on main surface 2 of silicon substrate 1. This silicon
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`oxide film is then nitrided by lamp annealing in an atmo-
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`sphere including ammonium.Thenitridation is carried out at
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`a temperature of 900° C.—1100° C. for 10-60 seconds. After
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`the end ofnitridation, the silicon oxidefilm is re-oxidized in
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`an oxygen atmosphere. The re-oxidation is carried out at a
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`temperature of 1000° C.—1100° C. for 10-300 seconds.
`Thus, nitrided oxide film 5 is formed.
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`Then, polycrystallinesilicon of 2000-4000A in thickness
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`is formed on nitrided oxide film 5. The polycrystalline
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`silicon film and nitrided oxide film 5 are then patterned by
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`employing photolithography and etching technique, to form
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`gate electrode 7. Silicon substrate 1 is then implanted with
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`arsenic ions with gate electrode 7 used as a mask. Accel-
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`eration energy is 30-70 keV and a dose is 1x10'*/cm? or
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`more. After that, a resulting film is annealed to form source
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`region 3a and drain region 3b. The steps of manufacturing
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`the MOSfield effect transistor is over through the foregoing
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`processings.
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`The concentration of nitrogen in nitrided oxide film 5
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`depends on a nitriding atmosphere, nitridation temperature,
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`Page 41 of 51
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`nitridation time, re-oxidation time, an initial thickness of
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`silicon oxide film and the like. That is, when a nitriding
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`atmosphere is NO, nitrogen concentration is lower as
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`compared to the case with an ammonium gas even though
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`the same parameters are employed for other parameters. As
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`re-oxidation time becomes longer, nitrogen concentration
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`becomes lower. Nitrogen concentration becomes higher with
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`a higher nitridation temperature, a longer nitridation time, a
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`smaller initial thickness of silicon oxide film and a higher
`ammonium concentration.
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`There are two types of hot carriers that cause a deterio-
`ration in characteristics of MOSfield effect transistors: drain
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`avalanche hot carriers and channel hot holes (electrons). A
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`channel hot hole (electron) phenomenon indicates a case
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`where holes (electrons) traveling in a channel region 11 are
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`accelerated by an electric field around drain 3b and then
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`enter in a gate insulator film 6 near drain 3b as shownin FIG.
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`72. Silicon substrate, source region and gate electrode are
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`denoted with reference characters 1, 3a and 7, respectively.
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`Thechannel hotholes (electrons) are also called channel hot
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`carriers. In a case with an NMOStransistor, channel hot
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`carriers are channel hot electrons, while in a case with a
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`PMOStransistor, channel hot carriers are channel hot holes.
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`A description will now be given on drain avalanche hot
`carriers with reference to FIG. 73. When accelerated carriers
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`collide with lattice of Si, electron-hole pairs are generated.
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`At that time, holes (electrons) are drawn by a gate voltage
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`and enter into gate insulator film 6. It depends on the type
`of a MOStransistor whether electrons or holes enter into
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`gate insulator film 6. Electrons enter in the case of an NMOS
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`transistor, while holes enterin the case of a PMOStransistor.
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`Both the channel hot holes (electrons) and the drain
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`avalanche hot carriers are generated near the drain.
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`However,it appears that the channelhotholes (electrons)are
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`generated closer to the source than the drain avalanche hot
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`carriers. If a comparison is made between a gate voltage
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`provided when channel hot holes (electrons) are generated
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`and that provided when drain avalanche hot carriers are
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`generated, the gate voltage provided with generation of the
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`channel hot holes (electrons) is higher. As the gate voltage
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`becomes higher, the holes (electrons) which enter in gate
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`insulator film 6 are largely affected by the gate electrode.
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`That is, with a larger gate electrode, the holes (electrons)
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`which enter in the gate insulator film are more strongly
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`drawn to the gate electrode.
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`In a portion of the gate electrode, into which hot carriers
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`are entered, interface states or traps are generated, causing a
`deterioration in characteristics of MOSfield effect transis-
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`tors. Interface state is an energy level which allows
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`transmission/reception of charges to/from Si substrate in a
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`Si—SiO, interface region. Trap is a portion that serves to
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`trap or capture conduction electrons or holes contributing to
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`electric conduction to prevent the contribution to electric
`conduction.
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`The drain avalanche hot carriers and the channel hotholes
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`(electrons) have the following nature. With reference to FIG.
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`74,this field effect transistor has an LDD structure. A high
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`concentration source region 19a and a high concentration
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`drain region 19d are formed to be spaced apart from each
`other in a silicon substrate. A low concentration source
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`region 15a is formed in the inside of high concentration
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`source region 19a, while a low concentration drain region
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`15b is formed in the inside of high concentration drain
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`region 19b. Sidewall
`insulating films 13a and 13b are
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`formed on opposite sides of a gate electrode 7.
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`Respective amounts of injected hot carriers in respective
`cases where the concentration of low concentration drain
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`10
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`65
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`Page 41 of 51
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`3
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`region 15d is low, medium and high are shownin thefigure.
`Channel hot electrons are denoted with CHE, and drain
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`avalanche hot carriers with DAHC. For the channel hot
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`electrons, its peak value of the amount of injected carriers
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`does not change even if the concentration of low concen-
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`tration drain region 15b changes. For the drain avalanche hot
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`carriers, its peak value (P) of the amountof injected carriers
`increases with an increase in concentration of low concen-
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`tration drain region 15b. In addition, the peak value (P) of
`the drain avalanchehot carriers shifts to the side of a channel
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`region with an increase in concentration of low concentra-
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`tion drain region 15d.
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`As the gate voltage becomes higher, a hot carrier resis-
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`tivity of nitrided oxide film becomes lower than that of
`silicon oxide film. This is described as follows. A threshold
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`value (V,,) is measured before application of stresses, and
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`then stresses are applied. As stresses, the following four
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`conditions are provided: a gate voltage of 1.0 V in absolute
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`value, a drain voltage of 6.0 V and a time of 1000 seconds;
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`a gate voltage of 2.5 V (2.0 V for PMOS)in absolute value,
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`a drain voltage of 6.0 V and a time of 1000 seconds; a gate
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`voltage of 4.0 V in absolute value, a drain voltage of 6.0 V
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`and a time of 1000 seconds; and a gate voltage of 6.0 V in
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`absolute value, a drain voltage of 6.0 V and a time of 1000
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`seconds. After stresses are applied, threshold values are
`measured. Thus, the difference between threshold values
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`before and after the application of stresses, i.e., a shift of
`threshold value is measured. FIG. 75 shows the case with an
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`NMOSfield effect transistor, and FIG. 76 shows the case
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`with a PMOSfield effect transistor. The lateral axis indicates
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`a gate voltage in the application of stresses. As the amount
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`of generated hot carriers increases, the shift of threshold
`values increases.
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`As shown in FIG. 75, in the case with the NMOSfield
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`effect transistor, if a gate voltage is lower, the shift of
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`threshold value for nitrided oxygen film is smaller than that
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`for silicon oxidefilm. Thatis, the hot carrier resistivity of the
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`nitrided oxide film is higher than that of silicon oxide film.
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`However,if the gate voltage is higher, the shift of threshold
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`values for the nitrided oxide film is larger than that for the
`silicon oxide film.
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`In the case with the PMOSfield effect transistor shown in
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`One object of the present invention is to providea field
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`FIG. 76, if the absolute value of the gate voltage is smaller,
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`effect transistor having an NO film of high hot carrier
`the shift of threshold values for the nitrided oxide film is
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`resistivity at a high gate voltage.
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`approximately the same as that for the silicon oxide film.
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`Another object of the present invention is to provide a
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`That is, the hot carrier resistivity of the nitrided oxide film
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`field effect transistor having a higher hot carrier resistivity at
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`is the sameas that of the silicon oxide film. However, if the
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`a high gate voltage and a low gate voltage evenif including
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`absolute value of the gate voltage is higher, the shift of
`a nitrided oxide film.
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`threshold values for the nitride oxide film is larger than that
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`A further object of the present invention is to provide a
`for the silicon oxide film.
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`field effect transistor exhibiting a higher current handling
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`According to “1982 Symposium on VLSI Technology
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`capability at a low gate voltage even if including a nitrided
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`Digest” p.40 by Eiji Takeda et al, it is disclosed that when
`oxide film.
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`a gate voltage is 4 V or less, drain avalanche hotcarriers are
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`A still further object of the present inventionis to provide
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`liable to be generated, and when the gate voltage is 4 V or
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`a method of manufacturing a field effect transistor having a
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`more, channel hot electrons are liable to be generated.
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`higher hot carrier resistivity at a high gate voltage even if
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`Therefore, as shown in FIG. 75, in the NMOSfield effect
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`including a nitrided oxide film.
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`transistor, the nitrided oxide film is more resistive to drain
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`A still further object of the present inventionis to provide
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`avalanche hotcarriers as comparedto the silicon oxide film,
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`and the silicon oxide film is more resistive to channel hot
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`a method of manufacturingafield effect transistor having a
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`nitrided oxide film of a lower interface state.
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`electrons as compared to the nitrided oxide film. In the
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`Astill further object of the present inventionis to provide
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`PMOSfield effect transistor, as shown in FIG. 76, both the
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`silicon oxide film and the nitrided oxide film exhibit
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`a method of manufacturing a field effect transistor having
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`two types of nitrided oxide films with different nitrogen
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`approximately the sameresistivity to drain avalanche hot
`concentrations.
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`carriers, and the silicon oxide film is more resistive to
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`channel hot holes as comparedto the nitrided oxide film.
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`A still further object of the present inventionis to provide
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`a method of manufacturingafield effect transistor having a
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`In a CMOS (Complementary MOS)circuit, it is possible
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`further improved hot carrier resistivity.
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`that either an NMOStransistor or PMOStransistor is put in
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`5,648,284
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`10
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`15
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`35
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`40
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`Page 42 of 51
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`a high gate voltage state. As has been described above with
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`reference to FIGS. 75 and 76, when the nitrided oxide film
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`is used as a gate insulatorfilm, if the absolute value of a gate
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`voltage is higher than that provided when the silicon oxide
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`film is used as the gate insulator film,
`the hot carrier
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`resistivity deteriorates in both the NMOStransistor and the
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`PMOStransistor. Accordingly, when the MOS transistor
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`including the nitrided oxidefilm as the gate insulatorfilm is
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`incorporated into the CMOScircuit, such a disadvantage is
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`provided that
`the hot carrier resistivity of the circuit
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`decreases as comparedto the transistor including the silicon
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`oxide film as the gate insulator film.
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`FIGS. 77 and 78 are diagrams showing voltage-current
`characteristics of the MOSfield effect transistor disclosed in
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`the aforementioned document, Digest “International Elec-
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`tron Device Meeting 1989,” p. 267. FIG. 77 shows the case
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`with the NMOStransistor, and FIG. 78 showsthe case with
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`the PMOStransistor. In the figures, a symbol NO indicates
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`a nitrided oxide film, and PO indicates a pure oxide film.
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`As shown in FIG. 77, when an NMOSfield effect tran-
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`sistor including an NO film as a gate insulator film is
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`employed at a lower gate voltage, such an NMOSfield effect
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`transistor exhibits a lower current handling capability than
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`that of an NMOSfield effect transistor including the pure
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`oxide film as the gate insulator film. As shown in FIG. 78,
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`when a PMOSfield effect transistor including the NO film
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`as the gate insulator film is employed, such a PMOSfield
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`effect transistor exhibits a lower current handling capability
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`at any gate voltages as compared to a PMOSfield effect
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`transistor including the pure oxide film as the gate insulator
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`film. The deterioration in current handling capability means
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`a deterioration in higher speed performance ofcircuits.
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`Asthe numberoftraps increases, the characteristics of the
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