SILICON PROCESSING
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`THE VLSI ERA
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`FOR
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`VOLUME 1:
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`PROCESS TECHNOLOGY
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`STANLEY WOLF Ph.D. ’
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`Professor, Department of Electrical Engineering
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`California State University, Long Beach
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`Long Beach, California
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`and
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`Instructor, Engineering Extension, University of California, Irvine
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`I
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`RICHARD N. TAUBER PhD.
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`Manager of VLSI Fabrication
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`TRW - Microelectronics Center
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`Redondo Beach, California
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`and
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`Instructor, Engineering Extension, University of California, Irvine
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`P
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`age
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`1 “5
`0
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`LATTICE
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`PRESS
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`Sunset Beach, California
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`TSMC Exhibit 1045
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`TSMC v. IP Bridge
`IPR2016-01246
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`Page 1 of 15
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`TSMC Exhibit 1045
`TSMC v. IP Bridge
`IPR2016-01246
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`

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`DISCLAIMER
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`Library of Congress Cataloging in. Publication Data
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`Wolf, Stanley
`and Tauber, Richard N.
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`Silicon Processing for the VLSI Era
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`Volume 1
`: Process Technology
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`
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`Includes Index
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`1. Integrated circuits-Very large scale
`
`
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`
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`integration.
`I. Title
`2. Silicon.
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`86-081923
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`ISBN 0—961672-3—7
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`987654
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`PRINTED IN THE UNITED STATES OF AMERICA
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`Page 2 0f 15
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`Page 2 of 15
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`PREFACE
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`CONTENTS
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`
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`vii
`
`PROLOGUE
`
`
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`xxi
`
`
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`1. SILICON: SINGLE-CRYSTAL GROWTH AND WAFERING 1-
`
`
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`
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`— TERIVIINOLOGY OF CRYSTAL STRUCTURE, 1
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`— MANUFACTURE OF SINGLE-CRYSTAL SILICON, 5
`
`
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`From Raw Material to Electronic Grade Polysilicon
`
`
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`- CZOCHRALSKI (CZ) CRYSTAL GROWTH, 8
`
`
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`Czochralski Crystal Growth Sequence
`
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`Incorporation of Impurities into the Crystal (Normal Freezing)
`
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`Modifications Encountered to Normal Freezing in CZ Growth
`
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`Czochralski Silicon Growing Equipment
`
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`Analysis of Czochralski Silicon in Ingot Form
`
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`Measuring Oxygen and Carbon in Silicon Using Infrared Absorbance Spectroscopy
`
`
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`- FLOAT-ZONE SINGLE—CRYSTAL SILICON, 21
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`- FROM INGOT TO FINISHED WAFER: SLICING; ETCHING; POLISHING, 23
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`- SPECIFICATIONS OF SILICON WAFERS FOR VLSI, 26
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`- TRENDS IN SILICON CRYSTAL GROWTH AND VLSI WAFERS, 30
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`2.’ CRYSTALLINE DEFECTS, THERMAL PROCESSING,
`
`
`
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`AND GETTERING
`
`
`
`
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`36
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`—
`
`
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`~ CRYSTALLINE DEFECTS IN SILICON, 37
`
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`Point Defects
`
`
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`One—Dimensional Defects (Dislocations)
`
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`Area Defects (Stacking Faults)
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`Bulk Defects and Precipitation
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`INFLUENCE OF DEFECTS ON DEVICE PROPERTIES, 51
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`Leakage Currents in pn Junctions
`
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`Collector-Emitter Leakage in Bipolar Transistors
`
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`Minority Carrier Lifetimes
`
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`Gate Oxide Quality
`A
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`Threshold Voltage Control
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`Wafer Resistance to Warpage
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`Page 3 0f 15
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`Page 3 of 15
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`xii
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`CONTENTS
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`~ CHARACTERIZATION OF CRYSTAL DEFECTS, 55
`
`
`
`- THERMAL PROCESSING, 56
`
`
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`Rapid Thermal Processing (RTP)
`
`
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`- OXYGEN IN SILICON, 59
`
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`- GETTERING, 61
`
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`Basic Gettering Pinciples
`
`
`Extrinsic Gettering
`
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`Intrinsic Gettering
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`3. VACUUM TECHNOLOGY FOR VLSI APPLICATIONS
`
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`73
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`- FUNDAIVIENTAL CONCEPTS OF GASES AND VACUUMS, 73
`Pressure Units
`
`
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`Pressure Ranges
`
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`Mean Free Path and Gas Flow Regimes
`
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`- LANGUAGE OF GAS /SOLID INTERACTIONS, 77
`
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`- TERMINOLOGY OF VACUUM PRODUCTION AND PUMPS, 78
`
`
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`— ROUGHING PUMPS, 85
`
`
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`Oil-Sealed Rotary Mechanical Pumps
`
`
`Pump Oils
`
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`Roots Pumps
`
`
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`- HIGH VACUUM PUNIPS I: DIFFUSION PUMPS, 89
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`- HIGH VACUUM PUMPS II: CRYOGENIC PUMPS, 92
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`- HIGH VACUUM PUB/1P8 III: TURBOMOLECULAR PUMPS, 95
`
`
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`— SPECIFICATION OF VACUUM PUMPS FOR VLSI, 97
`
`
`
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`-r TOTAL PRESSURE MEASUREMENT, 97
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`- MEASUREMENTS OF PARTIAL PRESSURE: Residual Gas Analyzers, 101
`
`
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`Operation of Residual Gas Analyzers (RGA)
`,
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`RGAs and Non-High Vacuum Applications: Difi‘erential Pumping
`
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`Interpretation of RGA Spectra
`
`
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`RGA Specification List
`
`
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`
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`— HIGH GAS FLOW VACUUM ENVIRONIVIENTS IN VLSI PROCESSING, 104
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`Medium and Low-Vacuum Systems
`
`
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`Throttled High-Vacuum Systems
`
`
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`109 .
`
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`4. BASICS OF THIN FILMS
`
`
`
`I
`
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`
`
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`- THIN FILM GROWTH, 110
`
`
`
`
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`— STRUCTURE OF THIN FILMS, 111
`
`
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`- MECHANICAL PROPERTIES OF THIN FILMS, 113
`Adhesion
`
`Stress in Thin Films
`
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`
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`Other Mechanical Properties
`- ELECTRICAL PROPERTIES OF METALLIC THIN FILMS, 118 V
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`Electrical Transport in Thin Films
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`Page 4 0f 15
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`Page 4 of 15
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`

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`CONTENTS
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`5. SILICON EPITAXIAL FILM GROWTH
`
`
`
`Km
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`
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`124
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`- FUNDANIENTALS OF EPITAXIAL DEPOSITION, 125
`
`
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`The Grove Epitaxial Model
`A
`
`
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`
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`Gas Phase Mass Transfer
`
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`Atomistic Model Of Epitaxial Growth
`
`
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`- CHEMICAL REACTIONS USED IN SILICON EPITAXY, 133
`
`
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`- DOPING OF EPITAXIAL FILMS, 136
`
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`Intentional Doping
`
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`Autodoping and Solid-State Diffusion
`
`
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`
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`— DEFECTS IN EPITAXIAL FILMS, 139
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`Defects Induced During Epitaxial Deposition and their Nucleation Mechanisms
`
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`Techniques for Reducing Defects in Epitaxial Films
`
`
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`
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`— PROCESS CONSIDERATIONS FOR EPITAXIAL DEPOSITION, 142
`
`
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`Pattern Shift, Distortion, and Washout
`
`
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`— EPITAXIAL DEPOSITION EQUIPMENT, 145
`
`
`
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`- CHARACTERIZATION OF EPITAXIAL FIIMS, 147
`
`
`
`
`
`Optical Inspection of Epitaxial Films
`Electrical Characterization
`
`
`
`
`
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`Epitaxial Film Thickness Measurements
`
`
`
`Infrared Reflectance Measurement Techniques
`
`
`
`
`- SILICON ON‘INSULATORS, 151
`
`
`
`Silicon on Sapphire
`
`Silicon on Other Insulators
`
`
`
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`
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`- MOLECULAR BEAM EPITAXY OF SILICON, 156
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`6. CHEMICAL VAPOR DEPOSITION OF AMORPHOUS
`
`
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`AND POLYCRYSTALLINE FILMS
`
`
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`161
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`- BASIC ASPECTS OF CHEMICAL VAPOR DEPOSITION, 162
`
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`— CHEMICAL VAPOR DEPOSITION SYSTEMS, 164
`
`
`
`
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`Components of Generic CVD Systems
`
`
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`Terminology of CVD Reactor Design
`
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`
`
`Atmospheric Pressure CVD Reactors
`
`Low-Pressure CVD Reactors
`
`
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`
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`Plasma-Enhanced CVD: Physics; Chemistry; and Reactor Configurations
`
`Photon—Induced CVD Reactors
`
`
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`
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`- POLYCRYSTALLINE SILICON: PROPERTIES AND CVD DEPOSITION, 175
`
`
`
`
`Properties of Polysilicon Films
`
`
`
`CVD of Polysilicon
`
`
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`Doping Techniques for Polysilicon
`
`
`
`Oxidation of Polysilicon
`
`
`
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`
`
`- PROPERTIES AND DEPOSITION OF CVD Si02 FILMS, 182
`
`
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`Chemical Reactions for CVD Formation
`
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`Step Coverage of CVD Si02
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`Undoped CVD Si02
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`Page 5 .of 15
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`Page 5 of 15
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`xiv
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`
`
`CONTENTS
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`
`
`Phosphosilicate Glass
`
`
`Borophosphosilicate Glass
`
`
`
`
`
`
`
`
`- PROPERTIES AND CVD OF SILICON NITRIDE FILMS, 191
`
`
`
`
`
`
`
`
`— OTHER FILMS DEPOSITED BY CVD (OXYNITRIDES and SIPOS), 195
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`7. THERMAL OXIDATION OF SINGLE-CRYSTAL SILICON 198
`
`
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`
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`
`
`- PROPERTIES OF SILICA GLASS, 199 I
`
`
`
`— OXIDATION KINETICS, 200
`The Linear-Parabolic Model
`
`
`
`
`
`
`
`- THE INITIAL OXIDATION STAGE, 207
`
`
`
`
`Growth of Thin Oxides
`
`
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`
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`- THERMAL NITRIDATION OF SILICON AND 8102, 210
`
`
`
`
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`
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`- FACTORS WHICH AFFECT THE OXIDATION RATE, 211
`
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`Oxidation Growth Rates: Crystal Orientation Dependence
`
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`Oxidation Growth Rates: Dopant Efi’ects
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`Oxidation Growth Rates: Water (H20) Dependence
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`Oxidation Growth Rates: Chlorine Dependence
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`Oxidation growth Rates: Pressure Efiects
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`Oxidation Growth Rates: Plasma and Photon Effects
`
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`
`
`- MASKING PROPERTIES OF THERMALLY GROWN SiOZ, 219
`
`
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`
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`- PROPERTIES OF THE Si /Si02 INTERFACE AND OXIDE TRAPS, 220
`
`
`
`
`Interface Trap Charge
`
`
`
`Fixed Oxide Charge
`
`
`
`Mobile Ionic Charge
`
`
`
`Oxide Trapped Charge
`
`
`
`
`Nature of the Si ISiOZ Interface
`
`
`
`
`
`- STRESS IN SiOz, 228
`
`
`
`
`
`- DOPANT IMPURITY REDISTRIBUTION DURING OXIDATION, 228
`
`
`
`- OXIDATION SYSTEMS, 230
`Horizontal Furnaces
`
`
`
`
`Suspended Loading Systems
`Vertical Furnaces
`
`
`
`
`
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`- MEASUREMENT OF OXIDE THICKNESS, 234
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`8. DIFFUSION IN SILICON .
`
`242
`
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`
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`- MATHEMATICS OF DIFFUSION, 242
`Ficks First Law
`
`
`
`Ficks Second Law
`
`
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`Solutions to Ficks Second Law
`
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`Concentration Dependence of the Difiusion Coefiicient
`
`
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`- TEMPERATURE DEPENDENCE OF THE DIFFUSION COEFFICIENT, 250
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`
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`- DIFFUSION CONSTANTS OF THE SUBSTITUTIONAL
`
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`IMPURITIES: B; As; and P, 251
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`Arsenic Diffusion
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`Page 6 0f 15
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`Page 6 of 15
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`

`

`CONTENTS
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`
`
`
`
`xv
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`Boron Diffusion
`
`
`Phosphorus Diffusion
`
`
`
`
`
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`- ATOMISTIC MODELS OF DIFFUSION IN SILICON, 256
`
`
`
`The Vacancy Model
`
`
`
`The Vacancy-Interstitial Model
`
`
`
`
`— DIFFUSION IN POLYCRYSTALLINE SILICON, 261
`
`
`
`
`— DIFFUSION IN SiOz, 262
`
`
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`
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`— ANOMALOUS DIFFUSION EFFECTS IN SILICON, 262
`
`
`
`Emitter Push Effect
`
`
`
`
`
`Lateral Diffusion Under Oxide Windows
`
`
`
`
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`DWusion in an Oxidizing Ambient
`
`
`
`
`
`- DIFFUSION SYSTEMS AND DIFFUSION SOURCES, 264
`Gaseous Sources
`
`
`
`
`Liquid Sources
`Solid Sources
`
`
`
`
`
`
`
`— IMEASUREMENT TECHNIQUES FOR DIFFUSED LAYERS, 267
`
`
`
`Sheet Resistivity Measurements
`
`
`Junction Depth Measurements
`
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`
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`Doping Profile Measurements
`
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`9. ION IMPLANTATION FOR VLSI
`
`
`
`280
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`- ADVANTAGES (AND PROBLEMS) OF ION-MLANTATION, 282
`
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`
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`- IIVII’URITY PROFILES OF IMPLANTED IONS, 283
`
`
`
`
`
`
`Definitions Associated with Ion Implantation Profiles
`
`
`
`
`\
`Theory of Ion Stopping
`
`
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`
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`Models for Predicting Implantation Profiles in Amorphous Solids
`
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`Implanting into Single-Crystal Materials: Channeling
`
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`Boltzmann Transport Equation and Monte—Carlo Approaches to Calculating Profiles
`
`
`
`
`
`
`
`— ION IMPLANTATION DAMAGE AND DAMAGE ANNEALING IN SILICON, 295
`
`
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`
`Implantation Damage in Silicon
`
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`Electrical Activation and Implantation Damage Annealing
`
`
`
`
`— ION IIVIPLANTATION EQUIPNIENT, 309
`
`
`
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`Components of an Ion Implantation System
`
`
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`Ion Implanter Types
`
`
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`Ion Implantation Equipment Limitations
`
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`Ion Implantation Safety Considerations
`
`
`
`
`- CHARACTERIZATION OF ION IMPLANTATIONS, 318
`
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`Measurement of Implantation Dose and Dose Uniformity
`
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`Measurement of Implantation Depth Profiles
`
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`Measurement of Implantation Damage and Damage Annealing Efficacy
`
`
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`
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`- ION IMPLANTATION PROCESS CONSIDERATIONS, 321
`
`
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`Selecting Masking Layer Material and Thickness
`
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`Implanting Through Surface Layers
`I
`
`
`
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`
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`Shallow Junction Formation by Ion-Implantation
`
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`Multiple Implantations
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`Page 7 0f 15
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`Page 7 of 15
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`

`
`
`“i
`
`CONTENTS
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`
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`
`10. ALUMINUM THIN FILMS AND
`
`
`
`
`PHYSICAL VAPOR DEPOSITION IN VLSI
`
`
`
`331
`
`
`
`
`
`
`
`
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`- ALUIVIINUM THIN FILMS IN VLSI, 332
`
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`- SPUTTER DEPOSITION OF THIN FILMS FOR VLSI, 335
`
`
`
`Properties of Glow-Discharges
`
`
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`Physics of Sputtering
`
`
`
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`Sputter Deposited Film Growth
`
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`Radiofrequency (RF) Sputtering
`
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`Magnetron Sputtering
`
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`Bias Sputtering
`
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`Sputter Deposition Equipment
`
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`Commercial Sputtering System Configurations
`
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`
`
`Process Considerations in Sputter Deposition
`
`
`Reactive Sputtering
`
`
`
`
`
`Future Trends in Sputter Deposition
`
`
`
`
`
`— PHYSICAL VAPOR DEPOSITION BY EVAPORATION, 374
`
`
`Evaporation Basics
`
`
`Evaporation Methods
`
`
`
`Evaporation Process Considerations
`
`
`
`
`- METAL FILM THICKNESS NIEASUREMENT, 380
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`11. REFRACTORY METALS and THEIR SILICIDES in VLSI
`
`
`
`384
`
`
`
`
`
`
`
`
`- CANDIDATE SILICIDES FOR VLSI APPLICATIONS, 386
`Silicide Resistivities
`
`
`
`
`— SILICIDE FORMATION, 388
`
`
`
`Direct Metallurgical Reaction.
`
`Co-Evaporation
`
`
`
`
`
`
`
`Sputter Deposition: Co-Sputtering and Sputtering from Composite Targets
`
`
`
`Chemical Vapor Deposition
`
`
`
`
`— STRESS IN SILICIDES, 394
`
`
`
`- OXIDATION OF SILICIDES, 395
`
`
`
`~ PROCESS INTERACTION, 397
`
`
`
`
`
`- SELF-ALIGNED SILICIDE (SALICIDE) TECHNOLOGY, :397_
`
`
`
`
`
`- REFRACTORY WTAL INTERCONNECTIONS FOR VLSI, 399
`
`
`
`
`Deposition of C VD Tungsten
`'
`
`
`
`
`Selective Deposition. of Tungsten
`
`
`
`
`
`
`Properties of CVD Tungsten for VLSI Contacts
`Future Trends
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`..
`12. LITHOGRAPHY I: OPTICAL PHOTORESISTS -
`
`
`
`
`
`MATERIAL PROPERTIES AND PROCESS TECHNOLOGY 407
`
`
`
`- BASIC PHOTORESIST TERMINOLOGY, 407
`
`
`
`
`
`
`Page 8 0f 15
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`Page 8 of 15
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`

`

`CONTENTS
`
`
`
`xvii
`
`
`
`
`
`
`— PHOTORESIST MATERIAL PARAMETERS, 409
`Resolution
`
`
`
`
`
`Sensitivity
`
`
`
`
`Etch Resistance and Thermal Stability
`Adhesion
`
`
`
`
`
`Solids Content and Viscosity.
`
`
`
`Particulates and Metals Content
`
`
`
`
`
`Flash Point and TLV Rating
`
`
`
`
`
`Process Latitude, Consistency, and Shelf—Life
`
`
`
`
`- OPTICAL PHOTORESIST MATERIAL TYPES, 418
`
`
`
`Postive Optical Photoresists
`
`
`
`Negative Optical Photoresists
`
`
`
`
`Image Reversal of Positive Resist
`
`
`
`Multilayer Resist Processes
`
`
`Contrast Enhancement Layers
`
`
`Inorganic Resists
`
`
`Dry-Developable Resists
`
`
`
`Mid—UV and Deep-UV Resists
`
`
`Photosensitive Polyimides
`
`
`
`- PHOTORESIST PROCESSING, 429
`
`
`
`
`
`Resist Processing: Dehydration Baking and Priming
`
`
`
`Resist Processing: Coating
`
`
`Resist Processing: Soft—Bake
`
`
`
`Resist Processing: Exposure
`
`
`
`Resist Processing: Development
`
`
`
`
`
`
`
`Resist Processing: Afier Develop Inspection and Linewidth' Measurement
`
`
`
`
`
`
`
`
`Resist Processing: Post Bake and Deep UV Hardening
`
`
`
`— PHOTORESIST SELECTION, 454
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`I
`
`
`
`
`
`
`_
`,
`.
`13. LITHOGRA’PHY II:
`
`
`
`OPTICAL ALIGNERS AND PHOTOMASKS
`
`
`
`g
`
`._
`
`--
`
`459
`
`
`
`
`
`
`
`
`
`
`
`- OPTICS OF MICROLITHOGRAPHY, 460
`
`
`
`
`
`Diffraction, Coherence, Numerical Aperture, and Resolution
`
`
`
`Modulation Transfer Function
`
`
`
`
`- OPTICAL NIETHODS OF TRANSFERRING PATTERNS
`
`
`
`
`
`
`TO A WAFER: OPTICAL ALIGNERS, 468
`
`
`
`
`
`
`
`Light Sources and Light Meters for Optical Aligners
`
`
`Contact Printing
`:
`-
`
`
`Proximity Printing
`
`
`
`
`
`Projection Printing: Scanning Aligners and Steppers
`
`
`
`, - PATTERN REGISTRATION, 473
`7
`
`
`/
`'
`Automatic Alignment
`
`
`
`
`
`- MASK AND RETICLE FABRICATION, 476 -
`
`
`
`
`Glass Quality and Preparation
`
`
`
`Glass Coating (Chrome)
`
`
`
`
`
`Page 9 0f 15
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`Page 9 of 15
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`

`

`xviii
`
`
`
`CONTENTS
`
`
`
`
`
`
`
`
`Mask Imaging (Resist Application and Processing)
`
`
`
`
`
`Pattern Generation (Optical and Electron—Beam)
`
`
`
`
`
`
`
`Mask and Reticle Defects and their Repair
`Pellicles
`
`
`
`
`
`
`
`
`
`Critical Dimension and Registration Inspection of Masks and Reticles
`
`
`
`
`
`
`
`14. ADVANCED LITHOGRAPHY
`
`
`
`493
`
`
`
`
`
`
`
`- ELECTRON BEAM LITHOGRAPHY, 493
`
`
`
`Electron Beam Systems
`
`
`Writing Strategies
`
`
`
`Electron Scattering in Resists
`
`
`Resist Development
`
`
`Proximity Efiects
`
`
`— X-RAY LITHOGRAPHY, 504
`
`
`X—Ray Sources
`
`
`X-Ray Masks
`
`
`X-Ray Resists
`
`
`
`— ION BEAM LITHOGRAPHY, 510
`
`
`
`
`
`
`
`
`
`
`
`
`
`15. WET PROCESSING: CLEANING; ETCHING; LIFT-OFF 514
`
`
`
`'
`
`
`
`— WAFER CLEANING, 516
`
`
`
`Sources of Contamination
`
`
`
`
`Wafer Cleaning Procedures
`
`
`
`
`—, TERMINOLOGY OF ETCHING, 520
`
`
`
`
`
`
`'Bias, Tolerance, Etch Rate, and Anisotropy
`
`
`
`
`
`I Selectivity, Overetch, and Feature-size Control
`
`
`
`
`
`
`
`Determining Required Selectivity with Respect to Substrate, st
`
`
`
`
`
`
`
`
`Determining Required Selectivity with Respect to Mask, Sfm
`
`
`Loading Effects
`
`
`
`- WET ETCHING TECI'INOLOGY, 529
`
`
`
`Wet Etching Silicon
`
`
`
`Wet Etching Silicon Dioxide
`
`
`
`
`Wet Etching Silicon Nitride
`
`
`
`Wet Etching Aluminum
`
`
`
`
`— LIFT-OFF TECHNOLOGY FOR PATTERNING, 535
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`16. DRY ETCHING FOR VLSI
`
`
`
`'
`
`539
`
`
`
`
`
`
`
`
`
`
`- BASIC PHYSICS AND CHEMISTRY OF PLASMA ETCHING, 542
`
`
`
`
`
`The Reactive Gas Glow Discharge
`
`
`
`
`Electrical Aspects of Glow Discharges
`
`
`
`
`
`Page 10 0f 15
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`Page 10 of 15
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`

`

`CONTENTS
`
`
`
`Xix
`
`
`
`
`
`
`
`
`
`
`Heterogeneous (Surface) Reaction Considerations
`
`
`
`
`
`,
`Parameter Control in Plasma Processes
`
`
`
`
`
`
`- ETCHING SILICON AND Si02 in CF4 /02 /HZ, 547
`
`
`Fluorine-to—Carbon Ratio Model
`
`
`
`
`
`
`
`
`
`
`— ANISOTROPIC ETCHING AND CONTROL OF EDGE PROFILE, 552
`
`
`
`
`
`
`
`
`- DRY ETCHING VARIOUS TYPES OF THIN FILMS, 555
`
`
`
`Silicon Dioxide (Si02)
`Silicon Nitride
`
`
`
`Polysilicon
`
`
`
`
`Refractory Metal Silicides and Polycides
`
`
`
`
`Aluminum and Aluminum Alloys
`
`
`Organic Films
`
`
`
`
`
`
`- PROCESS MONITORING AND END POINT DETECTION, 565
`
`
`
`
`
`Laser Reflectometry and Laser Reflectance
`
`
`
`Optical Emission Spectroscopy
`
`
`Mass Spectroscopy
`
`
`
`
`— DRY ETCHING EQUIPMENT CONFIGURATIONS, 568
`
`
`
`
`
`Commercial Dry Etch System Configurations
`
`
`
`
`
`
`
`
`Comparison of Single Wafer and Batch Dry Etchers
`
`
`
`
`
`
`-_ PROCESSING ISSUES RELATED TO DRY ETCHING,‘ 574
`
`
`
`
`Plasma Etching Safety Considerations
`
`
`
`Uniformity and Reproducibility Considerations
`
`
`
`
`
`
`Contamination and Damage of Etched Surfaces
`
`
`
`
`
`Process Gases for Dry Etching
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`17. MATERIAL CHARACTERIZATION TECHNIQUES
`
`
`
`FOR VLSI FABRICATION
`
`
`
`586
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`- WHAT ARE WE TRYING TO DETECT, AND HOW IS IT DONE?,.58
`
`
`
`
`
`
`
`
`Energy Regimes and Energy Levels in Material Characterization
`-
`
`
`
`
`
`Definitions of Material Characterization Terminology
`
`
`
`
`
`Vacuum Requirements of Compositional Analysis
`
`
`
`
`- MCROSCOPY FOR VLSI MORPHOLOGY, 589
`
`
`Optical Microscopes
`
`
`
`Scanning Electron Microscopes (SEM)
`
`
`
`Transmission Electron Microscopy
`
`
`
`
`— ELECTRON IX-RAY COMPOSITIONAL ANALYSIS TECHNIQUES, 599
`
`
`
`Auger Emission Spectroscopy
`
`
`
`X—Ray Emission Spectrocopy
`
`
`
`
`X—Ray Photoelectron Spectroscopy (XPS, ESCA)
`
`
`X-Ray Fluorescence
`
`
`
`
`
`- ION BEAM EXCITED COMPOSITIONAL ANALYSIS, 606
`
`
`
`
`Secondary-Ion Mass Spectroscopy (SIMS)
`
`
`
`
`
`Laser Ion Mass Spectroscopy (LIMS)
`
`
`
`
`Rutherford Backscattering Spectroscopy (RBS)
`
`
`
`
`
`
`
`
`
`
`
`Page 11 0f 15
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`Page 11 of 15
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`

`

`xx
`
`
`CONTENTS
`
`
`
`
`
`
`- CRYSTALLOGRAPHIC STRUCTURE ANALYSIS, 610
`
`
`X-Ray DWaction
`
`
`
`X—Ray Lang Topography
`
`
`
`
`Neutron Activation Analysis (NAA)
`
`
`
`
`
`
`- SUMMARY OF CHARACTERIZATION TECHNIQUE CAPABILITIES, 612
`
`
`
`
`
`
`
`
`- SUGGESTIONS FOR HOW TO ACCOIVIPLISH AN EFFECTIVE ANALYSIS, 614
`
`
`
`
`
`
`
`
`
`
`
`18. STRUCTURED APPROACH to DESIGN of EXPERIMENTS
`
`
`
`FOR PROCESS OPTIMIZATION
`'
`
`
`
`618
`
`
`
`
`
`
`
`- FUNDAMENTALS OF STATISTICS, 619
`
`
`
`
`
`
`Samples, Populations, Means, Variance, and Standard Deviation
`
`
`
`
`
`
`Pooled Variance and Degrees of Freedom
`Normal Distributions ‘
`
`
`
`
`
`
`
`
`Distributions of Averages, t-Distributions, and Confidence Levels
`
`
`
`
`
`
`— DESIGN OF EXPERIMENTS: BASIC DEFINITIONS, 625
`
`
`
`
`— CHARACTERISTICS OF FACTORIAL EXPERINIENTS, 627
`
`
`
`
`
`- STRATEGY OF DESIGNING EXPERIMENTS, 632
`
`
`
`
`
`
`— DESIGNING and ANALYZING 2—LEVEL FULL-FACTORIAL EXPERIIVIENTS, 634
`
`
`
`
`
`
`Method for Designing 2-Level Full-Factorial Experiments
`
`
`
`
`
`Analysis of the Measured Data
`
`
`— SCREENING EXPERIIVIENTS, 641
`
`
`
`
`- RESPONSE SURFACES, 643
`
`
`
`
`
`
`
`
`
`
`
`
`
`647
`648
`649
`
`6 5 1
`
`,
`
`
`
`APPENDICES
`
`
`
`
`
`
`
`
`
`1. MATERIAL PROPERTIES OF SILICON at 300°K
`
`
`
`2. PHYSICAL CONSTANTS
`
`
`3. ARRHENIUS RELATIONSHIP
`
`'
`
`‘
`
`
`
`IND EX
`
`
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`Page 12 0f 15
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`REFRACTORY METALS AND THEIR SILICIDES IN VLSI FABRICATION
`
`397
`
`
`
`
`PROCESS INTERACTION
`
`
`
`
`
`
`
`
`
`
`
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`
`
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`
`
`In an MOS process the polycide is normally formed after the gate oxide step. Since the
`
`
`
`
`
`
`
`
`
`
`
`
`
`polycide approach to reducing interconnect resistance represents an "add on" process to the
`
`
`
`
`
`
`
`
`
`
`
`
`
`conventional Si gate process, compatibility with the original process must be maintained.
`In
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`this section, we discuss some of the properties of silicides that can impact the original process.
`
`
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`
`
`First there are some steps that must be added and others that must be modified, in order to
`
`
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`
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`form, pattern. and oxidize the silicide.
`In addition, the poiycidc must then remain compatible
`
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`with the rest of the steps in the process sequence, including: a) the source-drain ion-implant and
`
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`anneal steps; b) the flow ireflow cycles involving the CVD dielectric (eg. PSG or BPSG); and c)
`
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`
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`
`
`the Al alloying, passivation, bonding, and package sealing steps. The subjects of silicide
`
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`
`
`formation and oxidation were covered earlier. The remaining topics will be discussed here.
`
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`The patterning of the polyctde can involve several techniques, depending on how the
`
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`structure is formed. If the underlying poly-Si is patterned first (e.g. by dry-etching), pure metal
`
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`is deposited on top. and the silicide is formed by direct metallurgical reaction. The metal that is
`
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`not deposited on poly-Si remains unreacted, and can be subsequently removed by a selective etch.
`
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`This is one method for the formation and patterning of a TiSiz t‘poly-Si structure. If the silicide
`
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`
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`is formed on an unpatterned poly-Si layer. the polycide is patterned by dry-etching. The subject
`
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`of dry-etching polycides is discussed in Chap. 16 and in Refs. 3 and 25.
`
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`
`The highest temperature thermal steps associated with post-polycide formation can occur
`
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`during the annealing {drive-in of the source-drain implantations (600-900°C, depending on the
`
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`implant species and conditions), oxidation of the polycide. and flow lreflow of the deposited glass
`
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`layer (up to 1000°C). The polycide must not exhibit any undesirable properties during these
`
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`thermal steps. That is, the following characterisncs must be demonstrated: a) the silicide must
`
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`remain chemically stable; b) the poly-Si {silicide interface must not move. and the poly-Si
`
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`thickness remain unchanged (except during oxidation); 0) the silicide should not react with the
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`deposited glass; (1) the stress of the silicide film should not increase to unacceptably high levels;
`
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`and e) the resistivity of the silicide should not degrade. Reports indicate that polycides of
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`MoSiZ, WSiz, TaSiz. and ’l‘iSi2 are capable of satisfying the above process compatibility
`
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`requirements. Note that the oxidation of the silicide proceeds by the diffusion of the silicon
`
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`fl‘om the underlying poly-Si. Therefore. sufficient poly-Si must remain under the silicide (after
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`silicide formation). to supply Si for SiOz. and still leave an adequate poly-Si underlayer.
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`At the final steps of VLSI manufacture, one or more layers of aluminum are deposited and
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`Patterned, and the chip is passivated. bonded, and packaged. The metal annealing, chip bonding,
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`a“d sealing temperatures are in the 350-500°C range. Since Al makes contact with the silicide
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`layer,
`it is important that the Al {silicide
`interface remain stable at these temperatures.
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`
`Fortunately, the lowest temperatures at which Al and the refractory metal silicides interact, are
`
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`above the typical alloy and assembly procedure temperatures le.g. WSi2 (~SUO°C), TaSi2
`
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`
`950°C), MoSi2 (500°C), and TiSi2 (MO-600°C”. Note that at such temperatures,
`
`
`mifitmetallics of A] and the metal are formed, as well as free Si, that precipitates into the Alzé.
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`SW31! interactions affect the electrical characteristics and the stability of silicide {Si contacts. A
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`“1"! diffusion barrier (c.g. W) has been suggested to preventthis reaction, if necessary.
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`SELF-ALIGNED SILICIDE (SALICIDE) TECHNOLOGY
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`As the contact dimensions of VLSI shrink, the contact resistance iucl'cascsi ifnd in addition,
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`the sheet resistivity of the shallow-junctions of the source {drain regions also increases. To
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`Page 13 of 15
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`SILICON PROCESSING FOR THE VLSI ERA
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`reduce these resistance values. while simultaneously reducing the interconnect resistance of the
`polysilicon lines. self—aligned singing,
`(or salicide) technology can be used”. That is, metal
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`is deposited over an M08 structure, and reacted with the exposed Si areas of the source and drain.
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`as Well as the exposed poly- Si areas on the gate, to form a silicide. Note that side-wall oxidationl
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`structures along the gate (known as oxide spacers) are used to prevent the gate and source idrain
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`areas from being electriCally connected by avoiding silicide formation on this oxide.) Following
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`the silicide formation, a selective etch removes the unreacted metal without attacking the silicide.
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`Figure 13 shows the key processing steps and final salicidc structure”. A much lower
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`contact resistance between silicitle and Si is achieved than with a conventional contact structure
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`because the area of this interface is much larger than the area of a conventional metal-Si comam
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`structure.
`(The silicidc IAI coulact resistance is much lower titan metal [Si contact resistance).
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`The salicide structure is also formed after the source—drain implant and anneal steps, and thus
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`must only experience high-temperatures during oxidation and flow lrel'low steps.
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`The most widely used silicide for the salicide process is TiSiz, although PtSi and MoSi
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`have also been employedfl‘zg.
`TiSi2 is attractive for this application because it exhibits
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`the lowest resistivity of the refractory metal siticides, and since it can reduce native layers, it is
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`the only known refractory metal that can reliably form a silicide on both poly and single-crystal
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`Si by thermal reaction. However, it also has the following drawbacks: a) the reactivity of Ti
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`with SiO2 can cause unwanted reaction of Ti and the oxide spacers during the silicide formation
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`process; b) TiSi2 is less stable than WSi2 or MoSiz; and c) Ti films have a high propensity to
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`oxidize, and hence the silicidc reaction must be conducted in ambients that are free of oxygen.
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`In the salicide structure, the silicide is formed both in the diffusion areas and on the poly-Si
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`gate. The oxide spacers separate these two regions by only about ZOOO-SOOOA, Thus, any
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`lateral formation of silicide can easily bridge this separation and cause the gate to become shorted
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`to the source {drain (and is referred to as bridging).
`It has been observed that if 'I‘iSi2 is formed
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`by conventional furnace annealing (Le. anneal times of ~30 min) in an inert gas (cg. Ar)
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`atmosphere. such lateral TiSi2 formation rapidly occurs. By annealing in an ambient of N2, the
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`Ti absorbs a significant amount of N2 (e.g. >20at%)' and at the same time reacts with N2 and
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`forms a nitride phase at the Ti surface. Once Ti is "stuffed with" (or reacted with) nitrogen, the
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`[— POLY'SI
`
`"-‘--‘-
`
`——..
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`oi FORM SMNlMRD DEVICE lil'I
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`'il) DIFFUSION
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`tl) SELEC'thlJ' REMOVE IIHHEACTED MEML
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`I‘IAHRIEH
`COHTAGI
`Lin-LII
`--—-
`
`- Al BASED
`METALLUIIGY
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`*
`
`~
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`II FINflL STRUCTURE AFTER $1.365 PASSIVATION-
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`REFLOW.CONTAC'I
`(IPENNINB AND ME IRLLlZflTION
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`bl FORM Slut: WALL OXIDE SPACEIiS SILICIDE -—-
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`“CTN.
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`"Li-1E3-
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`HIUz
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`POL‘I"Sl
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`* {WAGE—fl
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`c)
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`I'JEPOSII' ME'IALfiEAC'I' 10 FORM SILICIUE
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`Fig. 13
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`Salicide process flow and final structure. 23. (e 1935 IEEE.
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`Page 14 of 15
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`Page 14 of 15
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`REFRACTORY METALS AND THEIR SILIcrons IN VLSI FABRICATION
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`lateral silicide reaction is essentially suppressed. Thus, annealing in pure N2 (i.e. oxygen and
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`moisture content of less than 10 ppma), or pure forming gas (90% N2 + 10% H2), results in
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`TiSi2 formation without bridging.
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`During the TiSi2 formation, the Ti and the spacer SiOz can react. Any residues of this
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`reaction can degrade device performance by compromising the oxide integrity, or by producing
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`bridging. To avoid such effects, it is recommended that the TiSi2 formation temperature be held
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`to <700°C, and that a minimum field oxide thickness of 1000A be utilized.
`In practice, a
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`two—step formation process has been suggested. During the first step, the temperature is kept at
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`~650°C. After selectively etching and removing the unreacted Ti in a room temperature mixture
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`of DI H20, H202, and N'H4OH (511:1), a second temperature step of ~800°C is used to lower
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`the TiSi2 sheet resistance, and to stabilize the TiSi2 phase”.
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`Rapid thermal processing (RTP) has also been used to effect the silicide formation. Wang
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`and Lien report that TiSi2 is formed by RTP at 600-800°C in Ar (reaction time depends on the
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`temperature selected). After selectively removing the unreacted Ti, a stabilization anneal of
`1000°C for 30 sec in Ar is conducted to reduce the TiSi2 resistance“.
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`Once the TiSi2 is formed and stabilized,
`it can be subjected to somewhat higher
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`temperatures. Because of instability of the TiSi2 above ~900°C, however, it is recommended
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`that all processing steps after silicide formation be kept below 900°C”.
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`REFRACTORY METAL INTERCONNECTS FOR VLSI
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`As features shrink below 1 pm, and chip sizes increase beyond 1.0 cm2, polycide sheet
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`In
`resistances of 1-5 Q qu can still become the limiting performance factor for VLSI circuits.
`these cases it is necessa