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`_______________
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`
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`BEFORE THE PATENT TRIAL AND APPEAL BOARD
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`
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`_______________
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`
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`APPLE INC.,
`Petitioner
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`v.
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`FASTVDO LLC,
`Patent Owner
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`_______________
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`Case IPR2016-01203
`Patent 5,850,482
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`_______________
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`
`
`DECLARATION OF KENNETH A. ZEGER, PH.D., IN SUPPORT OF
`PATENT OWNER’S RESPONSE TO PETITION
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`1
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`I.
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`INTRODUCTION
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`1. I, Dr. Kenneth A. Zeger, have been retained by Patent Owner FASTVDO
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`LLC (“FASTVDO” or “Patent Owner”) through Zunda LLC to provide my
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`opinions in support of their Response to the Petition for Inter Partes Review
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`of U.S. Patent No. 5,850,482 to Meany et al., issued on December 15, 1998
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`(“’482 Patent,” Ex. 1001) pursuant to the legal standards set forth below.
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`Zunda LLC is being compensated for my time at the rate of $790 per hour
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`for time spent on non-deposition tasks and for deposition time. I have no
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`interest in the outcome of this proceeding, and no part of my compensation
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`is contingent upon the outcome of this proceeding.
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`2. I have also been asked to provide my technical review, analysis, insights, and
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`opinions regarding the Declaration of Andrew Lippman (“Lippman
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`Declaration,” Ex. 1002) on the patentability of claims 1-3, 5-14, 16-17, 22-
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`26, and 28-29 of the ‘482 patent and Apple Inc.’s (“Petitioner”) Petition that
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`relies on the Lippman Declaration. I have also reviewed the deposition
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`transcript of Dr. Lippman from March 20, 2017 (Ex. 2014).
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`3. In preparing this Declaration, I have also reviewed U.S. Patent No. 5,392,037
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`to Kato (“Kato,” Ex. 1003); Fiala and Greene, “Data Compression with
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`Finite Windows,” Communications of the ACM, Vol. 32, No. 4, pp. 490-505
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`(1989) (“Fiala,” Ex. 1004); Fazel and Lhuillier, “Application of Unequal
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`Error Protection Codes on Combined Source-Channel Coding of Images,”
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`International Conference on Communications, Including SuperComm
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`Technical Sessions (IEEE), Atlanta, April 15-19, 1990, Vol. 3, pp. 898-903
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`(“Fazel,” Ex. 1005); and U.S. Patent No. 5,218,622 to Fazel et al. (“Fazel
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`‘622,” Ex. 1006).
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`4. I have also reviewed portions of the file history of the ‘482 patent (Ex. 1010),
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`as well as other documents referenced below in this Declaration.
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`5. The statements made herein are based on my own knowledge and opinions.
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`II. BACKGROUND AND QUALIFICATIONS
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`6. I have studied, taught, and practiced electrical and computer engineering for
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`more than thirty years.
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`7. I received a Bachelor’s degree in Electrical Engineering and Computer
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`Science from the Massachusetts Institute of Technology in 1984.
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`8. I received a Master of Science degree in Electrical Engineering and
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`Computer Science from the Massachusetts Institute of Technology in 1984.
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`9. I received a Master of Arts degree in Mathematics from the University of
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`California, Santa Barbara, CA in 1989.
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`10. I received a Ph.D. degree in Electrical and Computer Engineering from the
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`University of California, Santa Barbara, CA in 1990.
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`11. I am currently a Full Professor of Electrical and Computer Engineering at
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`the University of California, San Diego (UCSD). I have held this position
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`since 1998, having been promoted from Associated Professor after two years
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`at UCSD. I have been an active member of the UCSD Center for Wireless
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`Communications for 18 years. I teach courses full-time at UCSD in the
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`fields of Electrical and Computer Engineering, and specifically in subfields
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`including communications and information theory at the undergraduate and
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`graduate levels. Prior to my employment at UCSD, I taught and conducted
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`research as a faculty member at the University of Illinois, Urbana-
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`Champaign for four years, and at the University of Hawaii for two years.
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`12. My twenty-plus years of industry experience includes consulting work for
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`the United States Department of Defense as well as for private companies
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`such as Xerox, Nokia, MITRE, ADP, and Hewlett-Packard. The topics upon
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`which I provide consulting expertise include data communications for
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`wireless networks, digital communications, information theory, computer
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`software, and mathematical analyses.
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`13. I have authored approximately 73 peer-reviewed journal articles, the
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`majority of which are on the topic of communications, information theory,
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`or signal processing. I have also authored over 100 papers at various
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`conferences and symposia over the past twenty-plus years, such as the: IEEE
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`International Conference on Communications; IEEE Radio and Wireless
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`Symposium; Wireless Communications and Networking Conference; IEEE
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`Global Telecommunications Conference; International Symposium on
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`Network Coding; IEEE International Symposium on Information Theory;
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`UCSD Conference on Wireless Communications; International Symposium
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`on Information Theory and Its Applications; Conference on Advances in
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`Communications and Control Systems; IEEE Communication Theory
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`Workshop; Conference on Information Sciences and Systems; Allerton
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`Conference on Communications, Control, and Computing; Information
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`Theory and Its Applications Workshop; Asilomar Conference on Signals,
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`Systems, and Computers. Roughly half of those papers relate to data
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`compression. I also am co-inventor on a US patent disclosing a memory
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`saving technique for image compression.
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`14. I was elected a Fellow of the IEEE in 2000, an honor bestowed upon only a
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`small percentage of IEEE members. The citation accompanying my
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`nomination as a Fellow reads: “For contributions to the theory and
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`practice of source and channel coding.” I was awarded the National
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`Science Foundation Presidential Young Investigator Award in 1991, which
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`included $500,000 in research funding. I received this award one year after
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`receiving my Ph.D.
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`15. I have served as an Associate Editor for the IEEE Transactions on
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`Information Theory and have been an elected member of the IEEE
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`Information Theory Board of Governors for three, three-year terms. I
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`organized and have been on the technical advisory committees of numerous
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`workshops and symposia in the areas of communications and information
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`theory. I regularly review submitted journal manuscripts, government
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`funding requests, conference proposals, student theses, and textbook
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`proposals. I also have given many lectures at conferences, universities, and
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`companies on topics in communications and information theory.
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`16. I have extensive experience in electronics hardware and computer software,
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`from academic studies, work experience, and supervising students. I
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`personally program computers on an almost daily basis and have fluency in
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`many different computer languages.
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`17. My curriculum vitae, attached to this declaration as Exhibit 2009 (“Zeger
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`CV”), lists my publication record in archival journals, international
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`conferences, and workshops.
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`III. LEGAL PRINCIPLES
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`18. I am not an attorney and therefore I offer no opinions on the law. I have
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`been advised of the following general principles of patent law to be
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`considered in formulating my opinions as to the issues of the validity of the
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`challenged claims.
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`19. Anticipation: I have been informed by counsel that for a claim to be invalid
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`as anticipated, the challenger in an inter partes review must show, by a
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`preponderance of the evidence, that all the elements of a claim are present in
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`a single previous device or method, or sufficiently described in a single
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`previous printed publication or patent. To anticipate the claim, the prior art
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`does not have to use the same words as the claim, but all the requirements of
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`the claim must have been disclosed expressly or inherently, so that looking
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`at that one reference, a person of ordinary skill in the art could make and use
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`the claimed invention. A requirement of a claim that is missing from a prior
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`art may be disclosed inherently if that missing requirement is necessarily
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`present in that prior art. All elements of the claim must also be disclosed in
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`the reference as they are arranged in the claim.
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`20. I have been informed by counsel that if a prior art reference discloses two or
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`more embodiments, none of which disclose all elements of a claim as
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`arranged in the claim, those embodiments cannot be combined for
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`anticipation purposes. Instead, the party asserting invalidity must present an
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`obviousness analysis to support the combination of the embodiments.
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`21. Obviousness: I have been informed by counsel that for a claim to be invalid
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`as obvious, it must be obvious to a person of ordinary skill in the field of
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`technology of the patent at the relevant time. The existence of every element
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`of the claimed invention in multiple prior art references or systems does not
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`necessarily prove obviousness. Most, if not all, inventions rely on building
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`blocks of prior art. Obviousness may be found in an inter partes review
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`proceeding only where there is a preponderance of evidence that the
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`differences between the subject matter sought to be patented and the prior art
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`are such that the subject matter as a whole would have been obvious at the
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`time the invention was made to a person having ordinary skill in the art to
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`which said subject matter pertains. Obviousness analysis involves
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`determining the scope and content of the prior art; ascertaining the
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`differences between the prior art and the claims at issue; and analyzing
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`secondary considerations of non-obviousness (as explained below).
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`22. I have been informed by counsel that in determining whether any of the
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`challenged claims are obvious, I should consider whether the prior art
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`discloses or suggests all the elements of the challenged claims. I understand
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`that I should also consider whether there was a reason that would have
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`prompted a person having ordinary skill in the art to combine the known
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`elements (whether those elements are disclosed in different prior art
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`references or in different embodiments in a single reference) in a way the
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`claimed invention does, taking into account such factors as (1) whether the
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`claimed invention was merely the predictable result of using prior art
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`elements according to their known function(s); (2) whether the claimed
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`invention provides an obvious solution to a known problem in the relevant
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`field; (3) whether the prior art teaches or suggests the desirability of
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`combining elements claimed in the invention; (4) whether the prior art
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`teaches away from combining elements in the claimed invention; (5)
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`whether it would have been obvious to try the combinations of elements,
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`such as when there is a design need or market pressure to solve a problem
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`and there are a finite number of identified, predictable solutions; and (6)
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`whether the change resulted more from design incentives or other market
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`forces. To render a claim obvious, the prior art must have provided a
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`reasonable expectation of success.
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`23. I have been informed by counsel that I should also consider any objective
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`evidence (sometimes called “secondary considerations”) that may have
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`existed at the time of the invention and afterwards that may shed light on the
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`obviousness of the claims, such as:
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`a. Whether the invention was commercially successful as a result of the
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`merits of the claimed invention (rather than the result of design needs
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`or market-pressure advertising or similar activities);
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`b. Whether the invention satisfied a long-felt need;
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`c. Whether others had tried and failed to make the invention;
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`d. Whether others invented the invention at roughly the same time;
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`e. Whether others copied the invention;
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`f. Whether there were changes or related technologies or market needs
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`contemporaneous with the invention;
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`g. Whether the invention achieved unexpected results;
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`h. Whether others in the field praised the invention;
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`i. Whether persons having ordinary skill in the art of the invention
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`expressed surprise or disbelief regarding the invention;
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`j. Whether others sought or obtained rights to the patent from the patent
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`holder; and
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`k. Whether the inventor proceeded contrary to accepted wisdom in the
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`field.
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`l. I have been informed by counsel that differences between the prior art
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`reference and a claimed invention, however slight, invoke the
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`question of obviousness, not anticipation. Thus, the question of
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`obviousness is invoked if a prior art reference, or a single embodiment
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`of a prior art reference, discloses part but not all of the claimed
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`invention, or if the prior art reference includes multiple, distinct
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`teachings or embodiments that separately fail to disclose the claimed
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`invention as arranged in the claims.
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`IV. LEVEL OF ORDINARY SKILL
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`24. Dr. Lippman, Petitioner’s declarant, submitted a declaration stating that the
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`person of ordinary skill in the art (“POSITA”) of the patented technology at
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`the time of the invention of the ‘482 Patent, or April 17, 1996, would have a
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`Bachelor’s degree in electrical engineering, computer engineering, or
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`computer science, and 3-5 years of experience with data encoding. Ex.
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`1002, ¶18.
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`25. I disagree with Dr. Lippman’s definition of a POSITA in this case. I note
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`that under Dr. Lippman’s definition, a person of ordinary skill in the art
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`could have experience with certain aspects of data encoding, such as source
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`encoding, but would not necessarily have any experience or training in the
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`subjects of error protection, including unequal error protection, error-
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`resilient data transmission, or the equivalent.
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`26. Based on my education and experience, as of April 1996, it was not
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`standard practice in engineering to use unequal error protection (“UEP”)
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`even when systems transmitted data of varying levels of importance. The
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`actual design of a UEP application as of April 17, 1996 would have
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`generally been performed, studied, or overseen by advanced inventors or
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`Ph.D.-level researchers having additional training, experience, or education.
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`27. My opinion is that a POSITA would have an undergraduate degree in
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`computer science, computer engineering, or electrical engineering, or the
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`equivalent, as well as at least two to three years of work experience with
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`error protection and error-resilient data transmission, or the equivalent. A
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`POSITA as of the time of the ‘482 patent would have understood the costs
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`and complexities that would have been incurred as a result of incorporating
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`UEP in a system. Equivalent knowledge and/or experience could have been
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`acquired through other means. For example, a POSITA could have an
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`undergraduate degree in a different field, but could have acquired the
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`requisite knowledge in the subject of error protection and error-resilient data
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`transmission through work experience.
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`V.
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`THE ‘482 PATENT
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`28. A digital transmission system typically provides the function of
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`communicating information (e.g., source bits) across a distance at a desired
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`rate through a given transmission channel. A transmission channel can be
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`noisy (i.e., subject to transmission errors), and therefore would have a
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`limited capacity, known as the channel capacity. In the field of information
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`theory, if the source entropy is below the channel capacity, all channel errors
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`can in principle be overcome, and the source bits can be received entirely
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`intact. To achieve this, channel encoding is applied to the source bits. This
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`means that the source bits are encoded into another corresponding set of bits
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`by an operation known as error control coding (e.g., block coding or
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`convolutional coding). This operation increases the overall number of bits
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`being transmitted by adding redundancy to the information. These channel
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`encoded bits are transmitted and subject to the noisy transmission channel
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`errors discussed previously. But despite the introduction of such errors in the
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`bits received from the transmission channel, the redundancy introduced at
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`the channel encoding stage can be utilized to accurately reproduce the source
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`bits despite the channel noise and signal degradation. In general, more
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`redundancy introduced in the channel encoding process confers greater
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`robustness and resistance to channel errors, but also comes at a cost.
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`29. The approach described above provides for equal error protection to the
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`source bits. However, not all transmission errors due to transmission channel
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`noise have the same effect on the receipt, correct decoding, and use of the
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`source bits. Some errors may be unnoticeable or inconsequential, while
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`other errors may propagate and corrupt many source bits, or may result in
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`the loss of synchronization. One of the benefits of the ’482 invention is the
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`provision of greater error protection to bits more susceptible to
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`consequential or catastrophic errors, i.e. those bits including some
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`information that represents a property of the less or unprotected bits.
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`30. According to the prior art, encoded code words could generally be highly
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`susceptible to channel errors. If certain portions of the code word were
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`corrupted, serious or catastrophic corruption could result. Error protection
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`can include the transmission of additional redundant bits enabling the
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`recipient to identify whether and how transmitted data differs from the
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`source bits. For example, additional redundant data may be transmitted in a
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`way that permits the original data to be reconstructed even if multiple errors
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`are introduced. Another approach for alerting the system to errors is to
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`append to the data cyclic redundancy check (“CRC”) bits, which represent
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`the result of a particular mathematical operation performed upon the data.
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`The recipient may perform the same mathematical operation upon the
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`incoming data, and if the result is different from the appended CRC bits, the
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`recipient can become aware of one or more errors in the data.
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`31. Adding error protection information increases bandwidth requirements in
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`the case of transmission over a noisy channel or storage capacity
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`requirements in the case of storage in a storage medium. Therefore, the ’482
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`invention contemplates the selective application of unequal error protection.
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`It does this by distinguishing between those portions of the code word or
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`data that are susceptible to errors and those portions that are resilient to
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`errors, and applying more error protection to the portions susceptible to
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`errors while applying less or no error protection to the portions resilient to
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`errors. For example, one portion (e.g., “first portion” or “prefix”) may
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`contain information about how to decode other portions (e.g., “second
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`portion” or “suffix”). In this case, it can be beneficial to apply greater error
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`protection to the first portion since an error in that portion would
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`compromise the receiver’s ability to accurately decode the contents of the
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`second portion. Thus, the invention prioritizes, and applies more protection
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`to, those portions of the data that are more sensitive to errors (i.e., those
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`areas that represent some property of the less protected, or unprotected, bits),
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`as shown in Fig. 1 of the ’482 Patent reproduced below.
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`32. The ’482 Patent discloses and claims devices and methods for organizing
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`
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`and encoding the data or code word and selectively applying error
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`protection. This is beneficial in several ways, including the ability to
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`minimize necessary transmission bandwidth or storage capacity.
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`Furthermore, by structuring the data or code words into vulnerable portions
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`and resilient portions, and then unequally protecting only those vulnerable
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`portions against errors, the ’482 Patent reduces the need for more
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`comprehensive error protection of all the data regardless of importance or
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`error resilience of the data. These portions receiving higher levels of error
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`protection contain information useful to decoding and/or decompressing the
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`information contained in the error-resilient portions.
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`VI. CLAIM CONSTRUCTION
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`33. I have been informed that the ‘482 patent is expired as of April 17, 2016. I
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`have also been informed that the claims of an expired patent are construed in
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`inter partes review according to a district court’s standard. I understand that
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`standard states that words of a claim are generally given their ordinary and
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`customary meaning as understood by a person of ordinary skill in the art. I
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`have reviewed the District Court’s claim construction order (Ex. 2003) and
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`the Patent Trial and Appeal Board’s Institution Decision (Paper 14), and
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`have applied the constructions set forth in those documents for the purpose
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`of rendering my opinions below. I take no position on whether the
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`constructions issued by the District Court and Patent Trial and Appeal Board
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`represent the ordinary and customary meaning as understood by a POSITA
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`as of the filing date of the ’482 patent.
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`34. I note that neither the Petitioner nor the District Court construed the term
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`“storage medium” as it appears in claims 5, 10, 16, 25, and 28. I have
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`reviewed the ‘482 patent and believe that based on the contents of the patent,
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`the term “storage medium” should be interpreted as a physical storage
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`device. This term should not be construed to cover transmission channels or
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`data links, which generally do not store data. This term should also not be
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`construed to cover transitory data in transmission.
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`35. The specification and drawings of the ‘482 patent support the proper
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`interpretation of a “storage medium” as a physical storage device. In FIG. 1
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`of the ‘482 patent, the storage medium 18 is arranged parallel to a
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`transmitter block 20 for transmitting via data links 22 and 24. Ex. 1001,
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`FIG. 1. The ‘482 specification explains that the storage medium 18 may be
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`a “magnetic disk storage which is error protected as shown in FIG. 6.” Ex.
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`1001, 17:15-19. Instead of storing the data in a storage medium 18, the ’482
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`patent discloses that “the compressed and encoded data can be efficiently
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`transmitted, such as via first and second data links.” Ex. 1001, 17:26-27. I
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`read this disclosure in the ‘482 patent to indicate that storing data in a
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`storage medium should be interpreted differently from transmitting data via
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`a data link.
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`36. While I do not take a position on whether the preamble of claim 28 is a
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`limitation, I have also used the preamble of claim 28 to inform my
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`construction of “storage medium.” Specifically, the preamble of claim 28
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`states a “computer readable memory.” ‘482 patent, 22:23. In my opinion, a
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`“computer readable memory” and a “storage medium” would have been
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`interpreted consistently by a POSITA as of April 17, 1995. Therefore, I
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`believe the preamble of claim 28 reinforces my interpretation of “storage
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`medium” as a physical storage device. A POSITA would not characterize
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`the transmission of data as a “computer readable memory,” and would not
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`characterize the transmission of data as a “storage medium.” The ‘482
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`patent claims also clearly distinguish between the concept of “storing” data
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`“in a first data block of a storage medium” and the concept of “transmitting”
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`data “via a first data link,” such as shown in the different word choices used
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`in claims 5 and 6. Ex. 1001, 18:57-59; 19:1-2. I understand that Dr.
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`Lippman also agrees that the different word choices in claims 5 and 6 are
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`intended to cover the different concepts of “storing” and “transmitting.” Ex.
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`2014, 98:11-16; 134:4-22.
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`VII. NON-OBVIOUSNESS OF THE CHALLENGED CLAIMS
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`37. As I will explain below, I disagree with Dr. Lippman’s opinion that the
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`challenged claims are obvious over Kato alone, and over Fiala in view of
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`Fazel, further in view of Fazel ‘622.
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`Kato
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`38. I have reviewed FastVDO’s Response to the Petition’s challenges based on
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`Kato alone, and understand that FastVDO’s Response is being filed
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`currently with this Declaration. I agree with FastVDO’s Response to the
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`Petition’s challenges based on Kato alone. Petitioner and Dr. Lippman
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`propose to combine and modify the embodiments of Kato in order to render
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`the challenged claims obvious.
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`39. Kato discloses four separate embodiments. Three of the embodiments
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`relied upon by Dr. Lippman are introduced in Kato as a “Description of the
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`First Preferred Embodiment” (6:55-16:28), a “Description of the Third
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`Preferred Embodiment” (19:36-23:43), and a “Description of the Fourth
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`Preferred Embodiment” (23:44-33:12). Likewise, Figures 1(a) and 1(b) of
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`Kato relate to the first embodiment; Figures 4(a), 4(b), and 5 relate to the
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`third embodiment; and Figures 6(a), 6(b), and 7 relate to the fourth
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`embodiment.
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`40. The fourth embodiment describes an “encoding circuit 602” that “encodes
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`the input data Di into variable-length code words, which are sequentially
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`arranged in one or more data store regions within a transmission format.
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`Thus, the variable-length code words are converted into bit-serial-format
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`data, which are outputted from the encoding circuit 602.” Kato, 24:24-30.
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`Then, after briefly describing the error correcting code (ECC) encoder 603’s
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`operation, which includes the addition of error correcting code bits “to the
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`output data from the encoding circuit 602” (Kato, 24:32-3), Kato resumes
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`the discussion of the encoding circuit 602: “The operation of the encoding
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`circuit 602 will now be described in more detail. As described previously,
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`the encoding circuit 602 encodes the input data Di into the variable-length
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`code word Ci, and locates the variable-length code word Ci in the data store
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`region within the data transmission format.” Kato, 24:40-45. Kato then
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`describes the arrangement of the data store region(s) with respect to the
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`encoding circuit 602. Kato, 24:46-27:31.
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`41. Specifically, Kato describes the RAM 617 as being “formed with one or
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`more data store regions corresponding to the data store region or regions in
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`the transmission format.” Kato, 25:31-34. The writing of the first portion Pi
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`and second portion Ri into the RAM 617 is described at 25:45-26:4, and the
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`conclusion of this process is described by Kato as “the arrangement of one
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`variable-length code word Ci into the data store region.” Kato, 26:5-7. The
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`arrangement of code words stored in the data store region(s) of RAM 617
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`by encoding circuit 602 is described by Kato as a “transmission format.”
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`Kato, 25:33-34; 23:54-57; 24:41-45; 24:46-48.
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`42. The data stored in RAM 617 and then passed to ECC encoder 603 in the
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`fourth embodiment does not require multiplexing. This is because the fourth
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`embodiment stores the first and second portions in the RAM 617 in a
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`“transmission format.” Kato, 25:31-34. The output from the ECC encoder
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`603 is sent to modulator 604, and then to an output terminal 605. Kato,
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`23:57-63.
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`43. I note also that Kato refers to only a single “transmission line.” Kato,
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`23:60-63; 24:37-39. Given the arrangement of data in the RAM 617, and the
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`output of the data in bit serial format, I disagree that there is any reason a
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`POSITA would have been motivated to implement separate transmission
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`lines based on the level of error protection added at ECC encoder 603. Such
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`a change would require other modifications to Kato’s fourth embodiment
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`that neither Petitioner nor Dr. Lippman have addressed. In particular, it
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`would be necessary, after the ECC encoder 603, to split the data into
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`separate streams for transmission. This is contrary to Kato’s disclosure.
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`Even Kato’s first embodiment, which separately encodes data Ji and Ei,
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`multiplexes the separately encoded data CJi and CEi into multiplexed coded
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`data Ci, and “outputs the multiplexed coded data Ci in a bit serial format,
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`which is transmitted via the output terminal 108.” Kato, 11:5-11.
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`44. The Petition and Dr. Lippman’s declaration and deposition testimony point
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`to Kato, col. 33 lines 2-7 for support that Kato discloses other “data store
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`regions” than RAM 617. But I do not read the paragraph spanning 32:66-
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`33:12 of Kato to describe a “storage medium” (as claimed in claims 5, 16,
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`and 28 of the ‘482 patent) downstream from Kato’s ECC encoder 603. As I
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`explained above, the arrangement of code words stored in the data store
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`region(s) of RAM 617 by encoding circuit 602 is described by Kato as a
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`“transmission format.” Kato, 25:33-34; 23:54-57; 24:41-45; 24:46-48. I
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`interpret Kato’s disclosure of a “transmission format” at 33:6-7 to refer once
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`again to the format of the data as arranged in RAM 617’s data store
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`region(s) and as shown in Fig. 7. I also specifically disagree that the media,
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`including the antenna and transmission line, that transmits the data output
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`from ECC encoder 603 could be interpreted as a “storage medium” as
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`claimed in the ‘482 patent. In the context of data transmission, this media
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`includes the antenna corresponding to output terminal 605, and the air or
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`wires (transmission line) through which the electromagnetic signals
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`propagate. While Dr. Lippman’s deposition testimony on the meaning of
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`Kato, 33:2-7 appears to differ from the positions he took in his original
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`declaration, it does not change my opinion that Kato fails to render any of
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`the challenged claims obvious for each of the reasons set forth in this
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`declaration.
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`Claims 5, 10, 16, 25, and 28
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`45. The Lippman Declaration does not establish that Kato renders claims 5, 10,
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`16, 25, or 28 obvious.
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`46. While claims 5 and 16 are method claims and claim 28 is a computer
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`readable memory claim, each of these claims recite the element of a “storage
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`medium.” Claims 5 and 16 each include the step of “storing the at least one
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`first portion of the plurality of code words in a first data block of a storage
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`medium, wherein the first data block is error protected.” Claim 28’s storage
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`medium is “partitioned into a first error protected data block and a second
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`data block,” and the “at least one of the first portions of the plurality of code
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`words is stored in the first data block of said storage medium such that the at
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`least one first portion is error protected.” Claims 10 and 25 claim a storage
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`medium in a manner very similar to claim 28. Although the wording of each
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`of these claims differs slightly, it is clear that a first portion of a code word is
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`stored in a first data block of a storage medium, and that error protection is
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`provided to that first portion stored in the first data block. Kato fails to
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`disclose these features in any embodiment as I explain below.
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`47. Kato’s fourth embodiment specifically discloses that the data store region
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`depict