LANCE J. McNALLY
`HARBOR FALLS, INC.
`11 SHIRLEY ROAD
`TOWNSEND, MA 01469
`
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`lmcnally@harborfalls.com
`office: (978) 300-5326
`mobile: (617) 335-3308
`
`HIGHLIGHTS
`• In-depth processor, computer and telecommunications/data communications technical background, coupled with
`patent prosecution and litigation experience, provides the basis for effective and efficient patent non-infringement
`and invalidation analysis.
`• Familiarity with technology, standards organizations and key industry contributors, resulting in high value prior art
`searches, not limited to patent databases, and claim construction.
`• Multi-discipline development experience (Hardware, Software, Product Verification and ASIC) facilitates review
`of clients’ product implementations at the schematic, RTL, and source code levels for non-infringement positions
`and discovery support.
`• Technical and litigation experience facilitates expedient patent prosecution as well as patent portfolio analysis in
`M&A activities or IP asset procurement.
`• Ten patent awards.
`
`EXPERIENCE
`
`FOUNDER Oct 2007-Present
` HARBOR FALLS, Inc.
`
`IP Litigation
`
`Key areas of Responsibility: Consultant firm supporting law firms and enterprise clients with intellectual property.
`
`Eight years of litigation experience with multiple clients involving numerous patent suits and licensing negotiations.
`
`I have worked directly with inside and outside counsel on patent litigation and prosecution. My main focus has been
`working with Multiple Service Operators (MSOs) in a defensive position focused on video (VOD/MPEG/IPTV),
`data (DOCSIS) and VoIP (PacketCable) communication services.
`
` Primarily, I have performed the following patent litigation activities:
`Immediate review, analysis, and preparation of executive summary upon notification of filed suits.
`-
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`In depth patent and file history review.
`- Development of patent non infringement positions.
`- Translation of technical non infringement positions for understanding by a layman.
`Identification of key patent terms and claim construction.
`-
`- Extrinsic anticipatory and obviousness patent invalidation through prior art searching and claim chart
`generation.
`- Expert Witness.
`Intrinsic U.S.C. § 112 patent invalidation.
`-
`- Discovery.
`Involved in the formulation of legal case strategies.
`-
`- Generation and delivery of numerous external presentations summarizing patent positions.
`Additionally, I’m performing patent prosecution and responding to office actions.
`
`Lastly, I have reviewed patent portfolios in support of procurement and M&A activities as well as strategic business
`and technical analysis supporting proactive “patent harvesting”.
`
`VICE PRESIDENT ENGINEERING Sept 2005-Sept 2007
`
` OPVISTA, Inc.
` Metro Optical Transport
`
`Key areas of Responsibility: All Engineering responsibilities of Hardware, Software and Product Verification of
`Metro Optical products including Optical Node, Element Management System (EMS) and Network Planning Tool.
`
`Significantly increased manufacturing capacity and gross margin improvements through product yield, test process
`and design change improvements.
`
`Established and set in place engineering processes, including software unit test plans, functional and design
`specifications, bug tracking system, source control, and defect metric tracking. Aggressively drove the automation
`of Product Verification testing.
`
`Provided customer support with rapid turn-around when required and attended face-to-face customer meetings.
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`DIRECTOR ENGINEERING June 1997-Sept 2005
`NORTEL NETWORKS, Inc.
`Data & Telecommunications
`
`
`
`
`Key areas of Responsibility: Led development of 10G Network Processing Units (NPU) and processor based
`networking units. The NPUs were comprised of multiple custom processors operable to perform packet analysis and
`packet manipulation. The multiple packet analysis processes were multi-threaded with a custom instruction set. The
`packet manipulation processor was pipelined based. Multiple NPUs were developed with first pass Silicon success.
`
`Managed the Hardware, Software and Product Verification of DOCSIS Cable Modems and CMTS products.
`
`Participated in numerous M&A activities. Served as the Design Authority for NPU development in Nortel.
`
`DIRECTOR ENGINEERING Oct 1983-June 1997
`
` HONEYWELL/HONEYWELL ERICSSON/ZENITH DATA SYSTEMS, Inc.
`
`Data & Telecommunications/Computer Servers
`
`Key areas of Responsibility: Led development of Intel based server and computer products.Software, Hardware,
`ASIC and Integration/Test teams in the development of Private Branch Exchange (PBX), X.25 Packet Switches,
`Mini-Computer Communication Protocols (SNA, X.25, TCP/IP), ASIC, and Intel based server and storage
`products. As corporate representative, participated in Telecommunications standard organizations.
`
`Was a key management team member that developed the Server Business Unit at Zenith Data Systems. This effort
`resulted in a new Product line of Intel Based Servers creating a greater than $400M annual business with the
`highest divisional gross margin.
`
`Responsible for leading the R&D team developing, OEM'ing and validating Intel based server products.
`
`Post merger, drove the integration of the NEC Computer Systems division.
`
`Worked jointly with Intel in the development of an ASIC based Pentium chipset used to implement symmetrical
`multi-processor systems. The chip set implemented a split transaction, dual data bus using MESI cache coherency.
`
`
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`SENIOR HARDWARE DESIGN ENGINEER Oct 1982- Oct 1983
`TEXAS INSTRUMENTS, Inc.
`Semi Conductor
`
`
`
`
`Key areas of Responsibility: Led a team, working jointly with IBM to implement a gate level model used to validate
`the Token Ring chipset prior to tape out.
`
`Parallel teams working two overlapping fourteen hour shifts, seven days a week, for a period of two months were
`required for on-time delivery.
`
`HARDWARE DESIGN ENGINEER Jan 1980-Sept 1982
` MOSTEK, Inc.
` Micro Processor Based Designs
`
`Key areas of responsibility: Design and Implementation of various STD and VMEbus hardware modules based on
`Z80 and 68000 processors that were sold to end users to implement control systems.
`
`Worked jointly with Motorola and Signetics as an architectural team member in the design and specification of the
`VMEbus. As corporate representative, participated in SASI/SCSI and Future Bus standards organizations.
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`EDUCATION
`
`Masters in Business Administration - University of Dallas 1985
`
`Bachelor of Science in Electrical Engineering - Purdue University 1979
`
`OTHER
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`U.S.C.G. Master Licensed Captain
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