`Greszczuk et al.
`
`(10) Patent N0.:
`
`(45) Date of Patent:
`
`US 8,611,404 B2
`Dec. 17, 2013
`
`US00861 1404B2
`
`MULTICARRIER TRANSMISSION SYSTEM
`WITH LOW POWER SLEEP MODE AND
`RAPID-ON CAPABILITY
`
`Applicant: TQ Delta, LLC, Austin, TX (US)
`
`Inventors: John A. Greszczuk, Stow, MA (US);
`Richard W. Gross, Acton, MA (US);
`Halil Padir, N. Andover, MA (US);
`Michael A. Tzannes, Lexington, MA
`(US)
`
`Assignee: TQ Delta, LLC, Austin, TX (US)
`
`Notice:
`
`Subject to any disclaimer, the term of this
`patent is extended or adjusted under 35
`U.S.C. 154(b) by 0 days.
`
`Appl. No.: 13/887,889
`
`Filed:
`
`May 6, 2013
`
`Prior Publication Data
`
`US 2013/0243051A1
`
`Sep. 19, 2013
`
`(60) Provisional application No. 60/072,447, filed 011 Jan.
`26, 1998.
`
`(51)
`
`Int. Cl.
`H04L 5/16
`H04L 27/28
`
`(2006.01)
`(2006.01)
`
`(52) U.S. Cl.
`USPC ......................................... .. 375/219; 375/260
`(58) Field of Classification Search
`USPC ....... .. 375/219, 220, 222, 260, 282, 356, 373,
`375/376; 370/278, 311, 503; 455/500, 551,
`455/560, 574
`See application file for complete search history.
`References Cited
`
`U.S. PATENT DOCUMENTS
`
`5,206,886 A
`5,224,152 A
`
`4/1993 Bingham
`6/ 1993 Harte
`
`(Continued)
`
`FOREIGN PATENT DOCUMENTS
`
`0473465
`0840474
`
`3/1992
`5/1998
`
`(Continued)
`OTHER PUBLICATIONS
`
`Related U.S. Application Data
`
`Continuation of application No. 13/152,558, filed on
`Jun. 3, 2011, now Pat. No. 8,437,382, which is a
`continuation of application 1\o. 12/615,946, filed on
`Nov. 10, 2009, now Pat. No. 7,978,753, which is a
`continuation of application 1\o. 11/425,507, filed on
`Jun. 21, 2006, now Pat. No. 7,697,598, which is a
`continuation of application l\o. 11/289,516, filed on
`Nov.
`30,
`2005, now abandoned, which is
`a
`continuation of application 1\o. 11/090,183, filed on
`Mar.
`28,
`2005, now abandoned, which is
`a
`continuation of application 1\o. 10/778,083, filed on
`Feb. 17, 2004, now abandonec , which is a continuation
`of application No. 10/175,815, filed on Jun. 21, 2002,
`now abandoned, which is a co itinuation of application
`No.
`09/581,400,
`filed
`as
`application No.
`PCT/US99/01539 on Jan. 26, 1999, now Pat. No.
`6,445,730.
`
`Bingham, “Multicarrier Modulation for Data Transmission: An Idea
`Whose Time Has Come.” IEEE Communications Magazine, May
`1990, vol. 28(5), pp. 5-8, 11.
`
`(Continued)
`
`Primary Examiner — Khai Tran
`(74) Attorney, Agent, or Firm —Jason H. Vick; Sheridan
`Ross, PC
`
`ABSTRACT
`(57)
`A multicarrier transceiver is provided with a sleep mode in
`which it idles with reduced power consumption when it is not
`needed to transmit or receive data. The full transmission and
`
`reception capabilities of the transceiver are quickly restored
`when needed, without requiring the full (and time-consum-
`ing) initialization commonly needed to restore such trans-
`ceivers to operation after inactivity.
`
`20 Claims, 4 Drawing Sheets
`
`Flima Caunlnr
`
`58
`/
`
`,1
`rv
`1:1 nensaov H Par:
`34
`/
`BAT
`
`ARRIS EX. 1001
`
`
`
`US 8,611,404 B2
`Page 2
`
`References Cited
`
`U.S. PATENT DOCUMENTS
`
`D>D>D>D>D>D>D>D>D>D>D>D>D>
`
`5,428,790
`5,452,288
`5,487,069
`5,519,757
`5,566,366
`5,581,556
`5,590,396
`5,852,630
`5,870,673
`5,960,344
`6,047,378
`6,052,411
`6,154,642
`6,246,725
`6,278,864
`6,332,086
`6,347,236
`6,359,938
`6,389,062
`6,445,730
`6,567,473
`6,654,410
`7,292,627
`7,463,872
`7,697,598
`7,978,753
`8,437,382
`2002/0150152
`2004/0160906 A1
`2005/0185726
`2006/0078060 A1
`
`............... .. 713/300
`
`6/1995 Harper et al.
`9/1995 Rahuel et al.
`1/1996 O’Sullivan et al.
`5/1996 Torin
`10/1996 Russo et al.
`12/ 1996 Ohie
`12/1996 Henry
`12/1998 Langberg et al.
`2/1999 Haartsen
`9/1999 Mahany
`4/2000 Garrett et al.
`4/2000 Mueller et al.
`11/2000 Dumont et al.
`6/2001 Vanzieleghem et al.
`8/2001 Cunnnins et al.
`12/2001 Avis
`2/2002 Gibbons et al.
`3/2002 Keevill et al.
`5/2002 Wu
`9/2002 Greszczuk et al.
`5/2003 Tzannes
`11/2003 Tzannes
`11/2007 Tzannes
`12/2008 Jin et al.
`4/2010 Greszczuk et al.
`7/201 1 Greszczuk et al.
`5/2013 Greszczuk et al.
`10/2002 Greszczuk et al.
`8/2004 Greszczuk et al.
`8/2005 Greszczuk et al.
`4/2006 Greszczuk et al.
`
`FOREIGN PATENT DOCUMENTS
`
`H04-227348 A
`H05-095315
`H06-114196
`H06-169278
`H06-296176
`H06-311080
`H07-079265
`H07-086995
`H09-275587
`H10-327309
`1998-26703
`W0 98/09461
`WO 98/35473
`W0 99/20027
`W0 00/45559
`
`8/1992
`4/1993
`4/1994
`6/1994
`10/1994
`1 1/1994
`3/1995
`3/1995
`10/1997
`12/1998
`8/1998
`3/1998
`8/1998
`4/1999
`3/2000
`
`OTHER PUBLICATIONS
`
`§§§§§%¥%¥%¥%%%%
`
`Series G: Transmission Systems and Media, Digital Systems and
`Networks, “Spitterless Asymmetric Digital Subscriber Line (ADSL)
`transceivers,” ITU-T G.992,2,
`International Telecommunication
`Union, Jun. 1999, 179 pages.
`Macq et al., “A CMOS activity detector for ADSL link,” ESSCIRC
`1995, 21st European Solid-State Circuits Conference, Sep. 19-21,
`1995, pp. 430-433.
`International Search Report for International (PCT) App. No. PCT/
`US99/01539, mailed Oct. 29, 1999.
`for International
`International Preliminary Examination Report
`(PCT) App. No. PCT/US99/01539, mailed Dec. 6, 2000.
`Examiner’s First Report for Australian Patent Application No.
`23409/99, dated Feb. 7, 2003.
`Notice of Acceptance for Australian Patent Application No. 23409/
`99, dated Jul. 25, 2003.
`
`Official Action for Canadian Patent Application No. 2357551, dated
`Nov. 23, 2005.
`Notice of Allowance for Canadian Patent Application No. 2357551,
`dated Dec. 14, 2007.
`Official Action for Canadian Patent Application No. 2,633,064. dated
`Oct. 31, 2008.
`Official Action for Canadian Patent Application No. 2,633 ,064, dated
`Aug. 17, 2009.
`Notice ofAllowance for Canadian Patent Application No. 2,633,064,
`dated Mar. 5, 2010.
`Official Action for Canadian Patent Application No. 2,633 ,064. dated
`Oct. 15,2010.
`Communication under Rule 51(4)EPC. dated Apr. 22, 2004, granting
`European Patent Application No. 99 909 9707-2411.
`European Search Report for European Patent Application No. EP
`04022871. dated Jul. 6, 2005.
`Communication under Rule 51(4) EPC, dated May 7, 2007, granting
`European Patent Application No. 040228710.
`Extended European Search Report and Opinion for European Patent
`Application No. 07021150, dated Feb. 15, 2008.
`European Examination Report for European Patent Application No.
`07021150, dated Oct. 9. 2008.
`Official Action for European Patent Application No.07021150. dated
`\/Iay 6, 2010.
`Communication under Rule 71(3) EPC for European Patent Appli-
`cation No. 07021150.3, dated May 30, 2011.
`Extended European Search Report for European Patent Application
`\Io. 10011996.5, dated Dec. 21, 2011.
`European Search Report for European Patent Application No. EP
`10012013.8, mailed Dec. 27,2011.
`\Iotice of Reasons for Rejection (including translation) for Japanese
`Patent Application No. 2000-596705., mailed Aug. 19, 2008.
`\Iotice of Allowance for Japanese Patent Application No. 2000-
`596705, mailed Mar. 16, 2009.
`\Iotification of Reasons for Rejection (including translation) for
`Japanese Patent Application No. 2008-323651, mailed Feb. 8, 2010.
`\Iotification of Reasons for Refusal (including translation) for Japa-
`nese Patent Application No. 2008-323651, mailed Mar. 7, 2011.
`Decision of Final Rejection for Japanese Patent Application No.
`2 08-323651, mailed Nov. 28,2011.
`English Transla ion ofPreliminary Rejection re: Korean Application
`0. 2000-7009402, issued Nov. 15, 2005.
`ficial Action or L .S. Appl. No. 09/581,400 mailed Mar. 13, 2002.
`otice ofAllowance for U.S. Appl. No. 09/581,400 mailed Jun. 17,
`02.
`‘ficial Action or L .S. Appl. No. 10/175,815 mailed Nov. 17,2003.
`ficial Action or L .S. Appl. No. 10/778,083 mailed Nov. 30,2004.
`lficial Action or U.S. Appl. No. 11/090,183 mailed Sep. 12,2005.
`ficial Action or L .S. Appl. No. 11/289,516 mailed Mar. 27,2006.
`ficial Action forL .S. Appl. No. 11/425,507, mailed Nov. 28,2007.
`1‘1cial Action forU.S. Appl. No. 1 1/425,507, mailed Aug. 22, 2008.
`ficial Action orL .S. Appl. No. 11/425,507,mailedApr. 27,2009.
`otice ofAllowance for U.S. Appl. No. 11/425,507, mailed Sep. 22,
`09.
`ficial Action or L 8. Appl. No. 12/615,946, mailed Aug. 6,2010.
`otice ofAllowance for U.S. Appl. No. 12/615,946, mailed Apr. 25,
`1 1.
`ficial Action for L .S. Appl. No. 13/152,558, mailed Jun. 1, 2012.
`otice ofAllowance for US. Appl. No. 13/152,558, mailed Feb. 4,
`13.
`ficial Action for European Patent Application No. 100119965,
`dated May 29, 2013.
`Communication under Rule 71(3) EPC, dated Jul. 5, 2013 granting
`European Patent Application No. 10012013 .8.
`
`OMZONZONZOOOOOOONZOZ
`
`* cited by examiner
`
`
`
`U.S. Patent
`
`Dec. 17, 2013
`
`.4cl01tEEhS
`
`US 8,611,404 B2
`
`
`
`S._oEu5_muflw
`
`Gn_n_
`
`GE
`
`DOM
`
`._.<m
`
`um.
`
`vm
`
`
`
`//E_:_._oUaEw._n_T_
`
`..o__EEoO
`
`
`
`U.S. Patent
`
`Dec. 17, 2013
`
`Sheet 2 014
`
`US 8,611,404 B2
`
`Subchannel
`
`
`
`U.S. Patent
`
`Dec. 17, 2013
`
`Sheet 3 of 4
`
`US 8,611,404 B2
`
`C0 Transceiver
`
`Notify:
`Acknowledge Sleep
`Mode
`
`Detect "Entering Sleep
`Mode"
`
`Notify: "Entering Sleep
`Mode"
`
`Enter Sleep
`Mode Store
`
`State Continue Sync
`Monitor
`For Exit
`Reduce Power
`
`Sleep
`
`Dectect "Exiting Sleep
`Mode"
`
`Exit Sleep Mode
`Restore State
`Restore Power
`Resume Transmission
`
`Verify Data
`
`Full Data
`Communication
`
`Fig. 2
`
`CPE Transceiver
`
`80
`
`Receive Power Down
`Indication
`
`Notify: "intend To Enter
`Sleep Mode"
`
`Notify "Entering Sleep
`Mode"
`
`Detect CO Entrance
`
`Into Sleep Mode
`
`Enter Sleep Mode
`Store State Continue
`Frame Counter
`
`Redirect PLL Input
`
`Sleep
`
`Awaken
`
`Exit Sleep Mode
`Notify
`Restore State Restore
`Power Restore PLL
`
`Input
`
`Send Test Data
`
`Resume Full Data
`Communication
`
`
`
`U.S. Patent
`
`Dec. 17, 2013
`
`Sheet 4 014
`
`US 8,611,404 B2
`
`/
`
`//Z//
`
`Analog Front
`End
`
`Data Buffer
`
`DAC/ADC
`
`2 1 2
`
`/Z/
`
`Idle Symbol
`Generator
`
`
`
`US 8,61 1,404 B2
`
`1
`NIULTICARRIER TRANSMISSION SYSTEM
`WITH LOW POWER SLEEP MODE AND
`RAPID-ON CAPABILITY
`
`CROSS-REFERENCE TO RELATED
`APPLICATIONS
`
`This application is a continuation of U.S. application Ser.
`No. 13/152,558, filed Jun. 3, 2011, now U.S. Pat. No. 8,437,
`382, which is a continuation of U.S. application Ser. No.
`12/615,946, filed Nov. 10, 2009, now U.S. Pat. No. 7,978,
`753, which is a continuation of U.S. application Ser. No.
`11/425,507, filed Jun. 21, 2006,now U.S. Pat. No. 7,697,598,
`which is a continuation of U.S. application Ser. No. 11/289,
`516, filed Nov. 30, 2005, which is a continuation of U.S.
`application Ser. No. 11/090,183, filed Mar. 28, 2005, which is
`a continuation of U.S. application Ser. No. 10/778,083, filed
`Feb. 17, 2004, which is a continuationofU.S. application Ser.
`No. 10/175,815, filed Jun. 21, 2002, which is a co11tinuation
`of U.S. application Ser. No. 09/581,400, filed Jun. 13, 2000,
`now U.S. Pat. No. 6,445,730, which is a 371 of International
`ApplicationNo. PCT/US99/01 539, filed Jan. 26, 1999, which
`claims the benefit of and priority to U.S. Application No.
`60/072,447, filed Jan. 26, 1998 entitled “Multicarrier Trans-
`mission System with a Low Power Sleep Mode and with
`Instant-On Capability” each ofwhicl1 are incorporated herein
`by reference in their entirety.
`
`BACKGROUND OF THE INVENTION
`
`The invention relates to multicarrier transmission systems,
`and comprises method and apparatus for establishing a power
`management sleep state in a multicarrier system.
`
`SUMMARY OF THE INVENTION
`
`Multicarrier transmission systems provide high speed data
`links between communication points. Such systems have
`recently been introduced for communications over the local
`subscriber loop that connects a telephone service subscriber
`to a central telephone office; in this important application they
`are commonly referred to as “xDSL” systems, where the “x”
`specifies a particular variant of DSL (digital subscriber loop)
`communications, e.g., ADSL (asynchronous digital sub-
`scriber loop), HDSL (High-Speed Digital Subscriber Loop),
`etc. These will be referred to generically herein simply as
`“DSL” systems.
`In such systems, a pair of transceivers communicate with
`other by dividing the overall bandwidth of the channel inter-
`connecting the subscriber and the central office into a large
`number of separate subchannels, each of limited bandwidth,
`operating in parallel with each other. For example, one com-
`mon system divides the subscriber line charmel into two
`hundred and fifty six subchannels, each of 4.3 kilohertz band-
`width. A first group of these (e.g., one hundred ninety six) is
`allocated to communications from the central office to the
`
`subscriber (this is known as the “downstream” direction); a
`second group (e.g., thirty-two) is allocated to communica-
`tions from the subscriber to the central office (this is known as
`the “upstream” direction). The remaining subchannels are
`allocated to administrative, overhead and control (AOC)
`functions.
`Data to be communicated over the link is divided into
`
`groups of bits, one group for each subchamiel. The group of
`bits allocated to a given subcharmel is modulated onto a 65
`carrier whose frequency is specific to that charmel. Typically,
`quadrature amplitude modulation (QAM) is used for this
`
`2
`
`purpose, and the group of bits is mapped into a vector defined
`by one of the points of a “constellation” which specifies the
`allowable data points for transmission over that subchannel at
`a particular time. Each vector or data point thus comprises a
`' unique symbol representing a specific bit configuration for
`transmission as a group over its associated subcharmel. Dur-
`ing the time period allocated for transmission of a symbol
`(commonly referred to as a “symbol period” or “frame”),
`each subchannel transmits its symbol inparallel with all other
`subchannels so that large amounts of data can be transmitted
`during each frame.
`The number ofbits carried by a symbol is dependent 011 the
`characteristics of the subchannel over which it is to be trans-
`
`mitted. This may vary from one subchannel to another. The
`principal determinant is the signal-to-noise ratio of the sub-
`channel. Accordingly, this parameter is measured from time
`to time in order to ascertain its value for each subchannel, and
`thus determine the number of bits to be transmitted on the
`
`particular subchannel at a given time.
`The telephone charmel is subject to a number of impair-
`ments which must be compensated for in order to ensure
`reliable transmission. Phase (delay) distortion of the trans-
`mitted signal is typically the most limiting of these impair-
`ments. This distortion is frequency-dependent, and thus com-
`ponents of a signal at different frequencies are shifted by
`varying amounts, thereby distorting the signal and increasing
`the likelihood oferroneous detection unless provision is n1ade
`to combat it. To this end, frequency domain equalizers (FDQ)
`and time domain equalizers (TDQ) are commonly incorpo-
`rated into the transmission channel in order to equalize the
`phase (time) delay across the channel frequency band. Other
`impairments also exist. For example, frequency-dependent
`signal attenuation adversely affects signal transmission on
`the telephone li11e. This is compensated by the use of gain
`equalizers on the line, while echo on the line is handled by the
`use of echo cancellers.
`
`The problem of signal impainnent is especially serious in
`those xDSL configurations which carry the DSL communi-
`cations on a common line with ordinary voice comm1mica-
`tions but which omit the use of a “splitter” at either the
`subscriber premises the central office or both. A “splitter” is
`basically a filter which separates the low-frequency voice
`communications (e.g., from zero to four kilohertz) from the
`higher frequency data communications (which may extend
`up into the megahertz band) and provides a strong degree of
`isolation between the two. In the absence of a splitter, unique
`provisions must be made to accommodate voice and data
`communications on the same line. For a more detailed
`
`description of the problem and its solution, see the co-pend-
`ing application of Richard Gross et al. entitled “Splitterless
`Multicarrier Modem”, Serial No. PCT/US98 21442, filed
`Oct. 9, 1998, and assigned to the assignee of the present
`invention, the disclosure of which is incorporated herein by
`reference.
`Because of tl1eir extensive use in Internet communications
`
`as well as in other applications, DSL transceivers are com-
`monly maintained in the “on” state, ready to transmit or
`receive once they have been installed a11d initialized. Thus,
`such modems consume a significant amount of power, even
`when they are not actively transmitting or receiving data. It is
`generally desirable to limit this power consumption, both for
`environmental reasons as well as to prolong the life of the
`equipment. Further, such modems may be implemented or
`incorporated in part or in whole i11 computer equipment such
`as in personal computers for home and business use, and such
`computers increasingly incorporate power conservation pro-
`cedures. See, for example, U.S. Pat. No. 5,428,790, “Com-
`
`
`
`US 8,611,404 B2
`
`3
`
`4
`
`puter Power Management System”, issued Jun. 27, 1995 on
`the application of L. D. Harper. Thus, it is desirable to provide
`an ADSL modem wl1ich can acconunodate power conserva-
`tion procedures in equipment with which it is associated, as
`well as independently of such equipment as may be appro-
`priate.
`Because of the complexity of DSL transceivers, and the
`conditions under which they must operate, it is necessary to
`initialize them prior to the transmission and reception ofdata.
`This initialization includes, inter alia, channel corrections
`such as “training” the frequency-domain and time-domain
`equalizers and the echo cancellers; setting the channel gains;
`negotiating the transmission and reception data rates; adjust-
`ing the fine gains on the subchannels over which communi-
`cation is to take place; setting the coding parameters; and the
`like. Additionally, it includes measuring the signal-to-noise
`ratio ofeach ofthe subchannels, calculating the bit-allocation
`tables characteristic of each u11der given conditions of trans-
`mission, and exchanging these tables with other modems with
`which a given modem communicates. For more detailed dis-
`cussion of these procedures, refer to the application of Rich-
`ard Gross et al., cited above and incorporated herein by ref-
`erence. These procedures can require from seconds to tens of
`seconds. In a new installation, the time required is inconse-
`quential. However, in an already-operating installation, the
`time required to initialize or re-initialize the system after a
`suspension of operation in connection with power conserva-
`tion is generally unacceptable, since it is typically desired to
`have the modem respond to request for service nearly instan-
`taneously.
`Accordingly, it is an object of the invention to provide a
`multicarrier transmission system having a low power sleep
`mode and a rapid-on capability.
`Further, it is a11 object of the invention to provide a multi-
`carrier transmission system for use in digital subscriber line
`communications that can rapidly switch from a sleep mode to
`a full-on condition.
`
`Still another object of the invention is to provide a DSL
`system that can readily be integrated into a con1puter having
`a low power sleep mode and which is capable of rapid return
`to full operation.
`
`BRIEF DESCRIPTION OF THE DRAWINGS
`
`The invention description below refers to the accompany-
`ing drawings, of which:
`FIG. 1 is a block and line diagram of a multicarrier trans-
`mission system in accordance with a preferred embodiment
`of the present invention;
`FIG. 1A is a portion of an exemplary chart showing a
`possible bit distribution among subchannels;
`FIG. 1B illustrates a timing signal used in accordance with
`the invention;
`FIG. 2 is a flow diagram of the operation of the present
`invention; and
`FIG. 3 is a block and li11e diagram of still another aspect of
`the present invention.
`
`DETAILED DESCRIPTION OF AN
`ILLUSTRATIVE EMBODIMENT
`
`For purposes of explanation, the present invention will be
`described in the context of an ADSL system having a first
`transceiver located at the site of a custo1ner’s premises (re-
`ferred to hereinafter as the “CPE transceiver”) and a second 65
`transceiver located at a local central telephone office (herein-
`after referred to as the “CO transceiver”). The two are inter-
`
`connected for communication by means of a common tele-
`phone line over which voice and data are to be transmitted,
`and the CO transceiver is commonly connected into a broader
`network such as the Internet to mid from which data is to be
`
`communicated. The system will be described as using Fourier
`transform technology for modulation and demodulation of
`the data to be transmitted. It will be understood, however, that
`the invention is not limited to this environment, and is appli-
`cable to point-to-point communications is other environ-
`ments, a11d with other forms of modulation/demodulation.
`Further, since the CPE transceiver and CO transceiver are
`very similar, the invention will be explained i11 connection
`with a detailed illustration of the CPE transceiver only.
`In FIG. 1, a DSL t*ansceiver 10 in accordance with the
`present invention has a transmitter section 12 for transmitting
`data over a digital subscriber line 14 and a receiver section 16
`for receiving data from the line. The transmitter section 12 is
`formed from an input buffer and converter (IBC) 18 that
`receives a serial string of data (e.g., binary digits) b,. to be
`transmitted and converts the data into a plurality of pairs of
`complex-valued symbols Xi and their conjugates XN_,.:X*l,
`i:0, 1, .
`.
`. N. Typically, the buffer 18 holds at least a frame of
`data (a frame comprising the amount of data to be transmitted
`during one symbol period). The pairs of symbols X, and X*,.
`are applied to an Inverse Fast Fourier Transform (IFFT) 20 to
`provide real time output signals X], j:0, 1,
`.
`.
`. N/2-1. "he
`latter i11 turn are converted to serial form in a parallel-to-se ‘ial
`convener (PSC) 22 and then applied to a digital-to-analog
`converter (DAC) 24 for application to a line driver 26. "he
`converter 24 may apply a cyclic prefix to the signals X]. to
`combat intersymbol interference caused by the transmission
`medium. The driver 26 may incorporate a gain control section
`(GC) 26a for controlling the signal amplitude (and thus
`power) as it is applied to a communication charmel such as the
`digital subscriber line 14.
`IFFT 20 may be viewed as a data modulator. The symbols
`Xi, and their conjugates XN_,., correspond to data points defin-
`ing signal vectors in a quadrature amplitude modulation
`(QAM) constellation set. The converter 18 forms the respec-
`tive symbols from the input data with the aid ofa bit allocation
`table GBAT) 28 which specifies, for each subcharmel, the
`number of bits to be carried by the symbol transmitted over
`that subchannel, and thus defines the data point to be associ-
`ated with the symbol. This table is typically calculated at the
`transceiver and is transmitted to other transceivers with which
`
`the instant transceiver communicates, to thereby enable them
`to decode the symbols received by them from the instant
`transceiver.
`
`The number of bits which each symbol carries is deter-
`mined by the characteristics ofthe subchamiel over which the
`symbol is to be transmitted, and particularly by the sigr1al-to-
`noise ratio of the subchannel. Procedures for this calculation
`
`are known. FIG. 1A shows an example of such a table as
`formed and stored at transceiver 10. Thus, the symbol to be
`transmitted over subcharmel 50 may be determined to have an
`allocation of six bits; that of subchamiel 51, six bits; that of
`subchannel 52, seven bits, etc.
`A Clock 30 controls the timing of the operation of the
`transmitter 12. It supplies input to a Controller 32 which
`controls the individual units of the transmitter. In the case of
`
`the CO transceiver, the clock 30 typically is a master clock to
`which a remote transceiver, such as at a subscriber premises,
`will be synchronized. 111 the case of a transceiver at the sub-
`scriber premises, such as is shown here for purposes of illus-
`tration, the clock is derived from the master clock at the
`central office as described more fully below i11 connection
`with the receiver portion of the transceiver.
`
`
`
`US 8,611,404 B2
`
`5
`
`6
`
`A Frame Counter (FC) 24 connected to the controller 32
`maintains a count ofthe number of frames of data transmitted
`
`from or received by the transceiver 10. The clock 30 main-
`tains the count in counter 34 synchronous with that of a
`corresponding counter (not shown) in the CO transceiver. In 5
`DSL systems, typically, data is communicated in the form of
`a sequence of data frames (e. g., sixty-eight frames for ADSL
`as specified in ITU Document G.992.2), followed by a syn-
`chronization frame, each frame having a duration of one
`symbol period ofapproximately two hundred and fifty micro-
`seconds. Together, the sixty-nine frames comprise a “super-
`frame”. Thus, the counter 34 typically maintains a count
`modulo sixty-nine. Finally, a State Memory (SM) 36 con-
`nected to the controller 32 records the state oftlie transceiver
`
`for reasons discussed more fully below.
`Turning now to the receiver section 16, it is formed from a
`line conditioner (LC) 50; an analog-to-digital converter
`(ADC) 52; a serial-to-parallel converter 54; a Fast Fourier
`Transform (FFT) section 56; a decoder 58; and a parallel-to-
`serial converter 60. The conditioner50 compensates for trans-
`mission distortions introduced by the line 14, and commonly
`includes a frequency-domain equalizer (FDQ) 5011; a time-
`domain equalizer (TDQ) 50b; and an echo ca11celler (EC)
`500, among other elements. The ADC 52 converts the
`received signal to digital form and applies it to the serial-to-
`parallel converter 54. The converter 54 removes any cyclic
`prefix that may have been appended to the signal before it was
`transmitted, and applies the resultant signal to the FFT 56
`which effectively “demodulates” the received signal. The
`output of the FFT is applied to decoder 58 which, in conjunc-
`tion with a bit-allocation-table 64, recovers the symbols X,
`and X*,. and the bits associated with them. The output of
`detector 58 is applied to the parallel-to-serial converter 60
`which restores the data stream, b,., that was originally applied
`to the transmitter. The controller 32 also controls the opera-
`tion of the receiver portion 16 of the transceiver 10.
`During normal (non-sleep mode) operation, a phase-lock
`loop (PLL) 62 receives from the FFT 56 a timing reference
`signal 62a (see FIG. 1A) via a line 62b. The timing reference
`signal 62a is transmitted from the transmitter with which the
`receiver 16 communicates (e.g., the CO transmitter). This
`signal is advantageously a pure tone of fixed frequency and
`phase which is synchronized with the Master Clock in the
`transmitter; its frequency defines the frame rate of the trans-
`ceivers. Other forms oftiming signal may, of course, be used,
`but use of a pure tone l1as the advantage of simplicity and
`reliability even when portions of the transceiver are powered
`down in accordance with the invention. The PLL 62 looks
`
`itself to this signal and drives clock 30 in synchronism with
`the Master Clock in the driving transmitter. This also syn-
`chronizes frame counter 34 of the CPE transceiver to the
`
`corresponding frame counter of the CO transceiver. Control
`of the receiver section is provided by the controller 32.
`In the sleep mode, the FFT 56 is preferably dormant.
`Accordingly, the timing reference signal for PLL 62 is pro-
`vided from the output ofthe analog to digital convener 52 via
`a detector 64 which extracts the timing signal from the signal
`appearing on line 14 during sleep mode, by calculating the
`DFT of the synchronizing pilot tone. Controller 32 controls
`the switching of the input to PLL 62 between these two
`sources so that the PLL 62 remains locked to the CO trans-
`
`ceiver timing reference.
`As noted earlier, the transceiver of the present invention
`will commonly be incorporated in a computer such as a per-
`sonal computer; indeed, it may be implemented as an integral
`part of such a computer, which may have a power conserva-
`tion capability for activation when the computer is not in
`
`active operation. It is thus desirable that the transceiver be
`able to suspend operations and enter a “sleep” mode in which
`it consumes reduced power when it is not needed for data
`transmission or reception, but nonetheless be able to resume
`transmission or reception almost instantaneously, e.g., within
`a few frames.
`
`Further, when the ADSL transceiver is implemented as an
`integral part of a computer, it may often be the case that the
`processing power of the computer is, at a given moment,
`devoted to another task such as graphics, word processing,
`and the like, and is thus unable to service the transceiver. In
`such circumstances,
`it
`is possible that a frame that
`is
`assembled for transmission to the CO transceiver, and thence
`to some network connected to it,
`is incomplete, and thus
`would generate errors if transmitted. Accordingly, the trans-
`ceiver of the present invention is responsive to such condi-
`tions by entering an “idle” state in which it ceases active
`transmission of data while the computer is elsewhere occu-
`pied. This state is similar in many ways to the sleep mode state
`although, of course, its purpose is not power conservation,
`and thus in the idle state the power to selected portions of the
`transceiver may, but need 11ot, be reduced. The idle state
`maintains synchronous signaling between the CPE and CO
`transceivers but no data is transmitted. On receipt of the idle
`indicator from the CPE, the CO transceiver transmits idle
`cells to the network to maintain comiection with the network.
`
`Referring now more particularly to FIG. 2, the power down
`operation of the CPE transceiver begins on receipt of a power
`down indication (step 80) by the CPE transceiver controller
`32. The power down indication may be applied to the con-
`troller 32 from an external source such as a personal computer
`in which the transceiver is included; it may be generated
`within the transceiver itselfas a result of monitoring the input
`buffer 18 and determining that no data has been applied to it
`for a given time interval or that the buffer has not been filled
`despite passage of a symbol time; it may be responsive to a
`power down connnand from t 1e CO transceiver; or it may be
`generated in response to othe* conditions.
`Considering for the mome it the first two cases, the CPE
`transceiver responds to the indication by transmitting to the
`CO transceiver an “Intend To Enter Sleep Mode” notification
`(step 82). This notification indicates that the transceiver is
`about to undergo a change of state, and may take any of a
`variety of forms; preferably it is a message, but may also
`comprise a tone, an inverted sync signal, a flag, or even the
`cessation of data transmission itself. The notification may
`advantageously be transmitted over one of the embedded
`operations channels of the system. It provides the CO trans-
`ceiver an opportunity to prepare itself to enter sleep mode,
`and also to signal the CPE transceiver if entrance into sleep
`mode is not appropriate or desirable at the particular moment.
`If entrance into sleep mode is permissible at this time; the
`CO transceiver responds to the power down or idle signal by
`transmitting an “Acknowledge Sleep Mode” notification
`(step 84) to the CPE transceiver. This and subsequent notifi-
`cations described in connection with the sleep or idle mode
`may similarly take any of a variety offorms such as described
`above for the “Intend To Enter Sleep Mode” notification, but
`again preferably is in the form of a message transmitted over
`an embedded operations channel.
`After it has received acknowledgment from the CO trans-
`ceiver, the CPE transceiver transmits an “Entering Sleep
`Mode” notification (step 86) to the CO transceiver and ceases
`transmission, either immediately or after a g'ven number of
`frames. The CO transceiver detects this not'fication; trans-
`mits its own “Entering Sleep Mode” notification (step 88);
`and enters sleep mode (step 90). In pursuance of this, the CO
`
`
`
`US 8,611,404 B2
`
`7
`
`8
`
`transceiver stores its state i11 its own state memory corre-
`sponding to the state memory 36 of CPE transceiver 10. The
`state of the CO or CPE transceivers preferably includes at
`least the frequency and time-domain equalizer coefficients
`(FDQ; TDQ) and the echo-canceller coefiicients (ECC) of its
`receiver portion and the gain of its transmitter portion; the
`transmission and reception data rates; the transmission and
`reception coding parameters; the-transmission fine gains; and
`the Bit Allocation Tables. The CO transceiver continues to
`
`advance the frame count and superframe count during the
`period of power-down in order to ensure synchrony with the
`remote CPE transceiver wl1e11 communications are resumed.
`
`In order to maintain synchronization during the power down
`or idle state, the CO transceiver continues to transmit to the
`CPE transceiver the synchronizing pilot tone 62a. It may, at
`this tim