throbber
(12) United States Patent
`Owen et al.
`
`(10) Patent N0.:
`(45) Date of Patent:
`
`US 7,542,045 B2
`*Jun. 2, 2009
`
`US007542045B2
`
`ELECTRONIC SYSTEM AND METHOD FOR
`DISPLAY USING A DECODER AND ARBITER
`TO SELECTIVELY ALLOW ACCESS TO A
`SHARED MEMORY
`
`Inventors: Jefferson Eugene Owen, Freemont, CA
`(US); Raul Zegers Diaz, Palo Alto, CA
`(US); Osvaldo Colavin, Tucker, GA
`(Us)
`Assignee: STMicroelectronics, Inc., Carrollton,
`TX (US)
`Subject to any disclaimer, the term of this
`patent is extended or adjusted under 35
`USC 154(b) by 0 days.
`
`Notice:
`
`This patent is subject to a terminal dis
`claimer.
`Appl. N0.: 11/956,165
`
`Filed:
`
`Dec. 13, 2007
`
`Prior Publication Data
`
`(56)
`
`References Cited
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`U.S. PATENT DOCUMENTS
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`(Continued)
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`(Continued)
`OTHER PUBLICATIONS
`
`US. District Court, Eastern District of Texas Live (Sherman), Civil
`Docket For Case #: 4:03-cv-00276-LED, STMicroe/ectronics, Inc.,
`Plaintiff v. Motorola, Inc., and Freescale Semiconductor", Inc., Defen
`dants, Counterclaim Plaintiffs v. STMicroe/ectronics N. V., and
`STMicroe/ectronics, Inc., Counterclaim Defendants, date ?led Jul.
`18, 2003, 47 pages.
`
`(Continued)
`Primary ExamineriHau H Nguyen
`(74) Attorney, Agent, or FirmiLisa K. Jorgenson; David V.
`Carlson
`
`US 2008/0088637 A1
`
`Apr. 17, 2008
`
`(57)
`
`ABSTRACT
`
`(54)
`
`(75)
`
`(73)
`
`(*)
`
`(21)
`
`(22)
`
`(65)
`
`(63)
`
`Related US. Application Data
`
`Continuation of application No. 10/174,918, ?led on
`Jun. 19, 2002, noW Pat. No. 7,321,368, Which is a
`continuation of application No. 09/539,729, ?led on
`Mar. 30, 2000, noW Pat. No. 6,427,194, Which is a
`continuation of application No. 08/702,910, ?led on
`Aug. 26, 1996, noW Pat. No. 6,058,459.
`
`(51)
`
`(52)
`
`(58)
`
`Int. Cl.
`(2006.01)
`G06F 15/167
`(2006.01)
`G09G 5/39
`(2006.01)
`G09G 5/36
`US. Cl. ..................... .. 345/541; 345/542; 345/531;
`345/547
`Field of Classi?cation Search ............... .. 345/541,
`345/531, 542, 547, 555, 501, 519, 545
`See application ?le for complete search history.
`
`An electronic system, an integrated circuit and a method for
`display are disclosed. The electronic system contains a ?rst
`device, a memory and a video/audio compression/decom
`pression device such as a decoder/encoder. The electronic
`system is con?gured to alloW the ?rst device and the video/
`audio compression/decompression device to share the
`memory. The electronic system may be included in a com
`puter in Which case the memory is a main memory. Memory
`access is accomplished by one or more memory interfaces,
`direct coupling of the memory to a bus, or direct coupling of
`the ?rst device and decoder/encoder to a bus. An arbiter
`selectively provides access for the ?rst device and/or the
`decoder/ encoder to the memory. The arbiter may be mono
`lithically integrated into a memory interface. The decoder
`may be a video decoder con?gured to comply With the
`MPEG-2 standard. The memory may store predicted images
`obtained from a preceding image.
`
`17 Claims, 6 Drawing Sheets
`
`FIRST DEVICE
`
`12
`
`72
`
`MEMORV INTERFACE
`55
`
`venom CONTROLLER
`
`REGISTER
`INTERFACE
`211
`
`1‘
`
`VIDEO
`utcoumc
`mm"
`AUDIO
`DECODING
`CIRCUIT
`
`VIDEO
`ENCODING
`01m“
`AUDIO
`ENCODING
`cmcun
`
`62
`
`REGISTER
`54 [NIERFACE
`2Q
`
`4Q
`
`DECODER
`
`ENOODER
`
`52
`
`‘16
`
`58
`
`/75
`
`MEMORY CONTROLLER
`
`B0
`
`4}
`U
`
`/
`4O
`
`FAST BUS
`
`{#70
`
`MEMORV
`
`4}
`'1
`
`Apple Exhibit 1001
`Page 1 of 19
`
`

`
`US 7,542,045 B2
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`Marco Winzker et al., “Architecture and Memory Requirements for
`Stand-Alone and Hierarchical MPEG2 HDTV-Decoders with Syn
`chronous DRAMs,” IEEE International Symposium on Circuits and
`Systems, Apr. 30-May 3, 1995, pp. 609-612.
`Andrew Wolfe et al., “Design Methodology for Programmable Video
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`Jeffrey J. Wong et al., “The H-Bus: A Media Acquisition Bus Opti
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`1997, Feb. 12-13, 1997, vol. 3021, pp. 40-50.
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`for Multimedia Networks with a Deterministic Service,” IEEE
`Inforcom ’96, Mar. 1996, vol. 2, pp. 537-544.
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`Chip for MPEG Video Image Coding,” IEEE Transactions on Con
`sumer Electronics, Nov. 1995, vol. 41, No. 4, pp. 1127-1137.
`A. Yamada et al., “Real-time MPEG2 Encoding and Decoding with a
`Dual-Issue RISC Processor,” Proceedings of the IEEE 1997 Custom
`Integrated Circuits Conference, May 5-8, 1997, pp. 225-228.
`Katsuyuki Yamazaki et al., “ATM Networking and Video-Coding
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`Circuits and Systems for J/ldeo Technology, Jun. 1993, vol. 3, No. 3,
`pp. 175-181.
`Masahiko Yoshimoto et al., “ULSI Realization of MPEG2 Realtime
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`May 23, 1995, vol. E78-C, No. 12, pp. 1668-1681.
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`Server,” Multimedia Storage and Archiving Systems, Nov. 18-19,
`1996, vol. 2916, pp. 290-300.
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`Over Broadband Network,” Proceedings of SPIE, Nov. 3-5, 1997,
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`Note entitled Macintosh Quadra 840AV and Macintosh Centris
`660AV Computers.
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`“CL450 MPEG Decoder User’s Manual,” C-Cube Microsystems,
`Milpitas, CA 1992 (MOT-S 721789-721874).
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`
`Apple Exhibit 1001
`Page 4 of 19
`
`

`
`US. Patent
`
`Jun. 2, 2009
`
`Sheet 1 of6
`
`US 7,542,045 B2
`
`VIDEO DECODING
`
`II
`
`‘
`
`CIRCUIT
`
`‘ "
`
`M|cRo—
`CONTROLLER ;
`
`l2
`
`1
`-—6
`
`— =
`
`AUDIO DECODING
`CIRCUIT
`~-—-
`14
`
`I
`
`MEMORY
`INTERFACE
`
`15
`
`f
`
`MEMORY
`
`Fj . 1a
`
`(Pug; Art)
`
`REGISTER
`MlcRo-
`coMIRoLLER<;:;> INTERFACE ,
`
`II
`
`II
`
`VIDEO DECODING
`CIRCUIT
`L2
`
`'II
`
`MEMORY
`' INTERFACE
`
`24
`
`20
`
`AUDIO DECODING
`
`18
`
`‘ ‘
`
`CIRCUIT
`
`II
`
`IF
`
`10g. 1b
`(Prior Art)
`
`Apple Exhibit 1001
`Page 5 of 19
`
`

`
`US. Patent
`
`Jun. 2, 2009
`
`Sheet 2 of6
`
`US 7,542,045 B2
`
`152\ CPU
`
`22\ CD3 M1M2M3
`
`MEM / 121
`
`M6 ‘
`\ U
`
`MAIN
`168
`\ ME“ ‘ = l/F
`
`122
`\
`
`10 ‘>26
`\ \
`-
`
`souaca
`
`DECODER
`
`‘ 120
`R
`u /
`VIDEO —"
`CTLR --—-~ 0
`
`170
`
`\
`
`‘
`
`‘
`
`‘\ \CD/z‘ " ‘xx ,1‘ t
`
`-
`
`"
`
`‘I
`
`If
`
`\
`
`mg. 10
`(Prior Art)
`
`0Ecoon~|c[ ID
`
`|
`
`F1
`
`|
`
`B2 |
`
`B3 1
`
`P4 I
`
`B5 |
`
`as |
`
`P7 |
`
`(Prior Art)
`
`Apple Exhibit 1001
`Page 6 of 19
`
`

`
`U.S. Patent
`
`Jun. 2, 2009
`
`Sheet 3 of6
`
`US 7,542,045 B2
`
`$5_H.E
`
`5§Ez_
`
`3_zaam:
`
`
`
`H$~Ez_EOE:
`
`mm
`
`$joE_,_8E03:
`
`Apple Exhibit 1001
`Page 7 of 19
`
`Apple Exhibit 1001
`Page 7 of 19
`
`

`
`US. Patent
`
`Jun. 2, 2009
`
`Sheet 4 0f 6
`
`US 7,542,045 B2
`
`182
`/
`DiSPLAY
`
`1
`
`M
`
`184
`/
`BTFF'QER
`I185
`V
`
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`178
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`DM
`
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`
`M
`
`i
`
`\ INTERFACE
`A‘
`
`1 72
`\ LAN
`CONTROLLER
`
`GRAPHiCS
`ACCELERATOR
`200 \
`(WITH VIDEO SCALER AND
`COLOR SPACE CONVERTER)
`
`180
`AUDIO
`CODEC /
`
`"
`
`l
`
`,
`
`PCI BUS
`
`M
`
`"
`
`I
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`
`153
`
`cpu = t
`4,
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`162/ CACHE
`
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`
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`
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`PROCESSOR
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`
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`
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`
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`
`190
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`
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`/
`
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`ma
`
`A = HARogleE‘sK
`,
`DVD
`CD ROM \166
`
`DECODER
`/
`M
`
`ENCODER
`h
`\
`
`44
`52 f
`
`
`
`
`U OMA ENGiNE ‘I’
`I
`E
`
`76
`/
`
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`Flg. 3
`
`= ARBITER = = REFRESH LOGIC
`/ \
`l
`\
`
`
`
`82 V MEMORY CONTROLLER \56 ‘I’
`
`
`
`MEMORY iNTERFACE
`
`0 @167
`
`MAIN
`153 f MEMORY
`
`Apple Exhibit 1001
`Page 8 of 19
`
`

`
`U.S. Patent
`
`Jun. 2, 2009
`
`Sheet 5 of6
`
`US 7,542,045 B2
`
`
`
`DECGDING -KIEIIZIIEEIEII
`
`DISPLAY EEIEEIEIEIZI
`
`H1“
`
`M2
`
`0
`
`Fig. 5
`
`
`
`Apple Exhibit 1001
`Page 9 of 19
`
`Apple Exhibit 1001
`Page 9 of 19
`
`

`
`US. Patent
`
`Jun. 2, 2009
`
`Sheet 6 of6
`
`US 7,542,045 B2
`
`30\
`
`DECODER
`ENCODER
`/
`M
`M
`\
`44
`r
`0
`46
`52/ OMA ENGINE
`76
`v
`/
`
`= ARBITER = = REFRESH LOGIC
`/ ‘
`\
`82
`58
`
`T
`MEMORY CONTROLLER
`/
`56 MEMORY INTERFACE
`
`200
`/
`
`AMP r176
`
`BUFFER
`
`185
`\
`
`182
`\
`DISPLAY
`TL
`
`‘F
`
`V ‘
`
`ll
`
`174
`\
`ENTERFACE
`n
`
`20 ACCELERATOR
`
`= ARR I180
`
`1/78
`DM
`M
`
`199
`
`V /
`
`MODEM
`A
`u
`
`\
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`co?agum 206/» 3D ACCELERATOR
`T
`210/ PCl/AGP BUS INTERFACE \203
`1
`"
`
`170
`\ A
`
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`
`l
`
`MAIN
`MEMORY
`/
`‘68
`
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`_ \ _
`
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`CACHE
`
`A
`‘
`
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`‘
`
`T,
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`CHiPSET
`T \
`_
`190
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`
`'
`
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`BRIDGE \192
`,
`0
`n
`
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`
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`/ 162
`
`
`
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`
`
`
`{r EIDE
`
`A
`
`_
`
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`
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`152
`
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`
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`CD ROM \155
`
`Apple Exhibit 1001
`Page 10 of 19
`
`

`
`US 7,542,045 B2
`
`1
`ELECTRONIC SYSTEM AND METHOD FOR
`DISPLAY USING A DECODER AND ARBITER
`TO SELECTIVELY ALLOW ACCESS TO A
`SHARED MEMORY
`
`CROSS-REFERENCE TO RELATED
`APPLICATIONS
`
`This application is a continuation of US. patent applica
`tion Ser. No. 10/174,918, ?led Jun. 19, 2002, and allowed
`Nov. 29, 2007; Which is a continuation of US. Pat. No.
`6,427,194, issued Jul. 30, 2002; Which is a continuation of
`US. Pat. No. 6,058,459, issued May 2, 2000. All ofthe US.
`patents, US. patent application publications, US. patent
`applications, foreign patents, foreign patent applications and
`non-patent publications referred to in this speci?cation and/or
`listed in the Application Data Sheet, are incorporated herein
`by reference, in their entirety.
`
`CROSS-REFERENCE TO OTHER RELATED
`APPLICATIONS
`
`The present application contains some text and drawings in
`common With US. patent application Ser. No. 08/702,911,
`?ledAug. 26, 1996, and issued Sep. 22, 1998 as US. Pat. No.
`5,812,789, entitled: “VIDEO AND/OR AUDIO DECOM
`PRESSION AND/ OR COMPRESSION DEVICE THAT
`SHARES A MEMORY INTERFACE” by Raul Z. Diaz and
`Jefferson E. OWen, Which had the same effective ?ling date
`and oWnership as the present application, and to that extent is
`related to the present application, Which is incorporated
`herein by reference.
`
`BACKGROUND
`
`The present invention relates to the ?eld of electronic sys
`tems having a video and/ or audio decompression and/ or com
`pression device, and is more speci?cally directed to sharing a
`memory interface betWeen a video and/ or audio decompres
`sion and/or compression device and another device contained
`in the electronic system.
`The size of a digital representation of uncompressed video
`images is dependent on the resolution and color depth of the
`image. A movie composed of a sequence of such images, and
`the audio signals that go along With them, quickly become
`large enough so that, uncompressed, such a movie typically
`cannot ?t entirely onto a conventional recording medium
`such as a Compact Disc (CD). It is noW also typically pro
`hibitively expensive to transmit such a movie uncompressed.
`It is therefore advantageous to compress video and audio
`sequences before they are transmitted or stored. A great deal
`of effort is being expended to develop systems to compress
`these sequences. Several coding standards currently in use are
`based on the discrete cosine transfer algorithm including
`MPEG-1, MPEG-2, H.261, and H.263. (MPEG stands for
`“Motion Picture Expert Group”, a committee of the Interna
`tional Organization for Standardization, also knoWn as the
`International Standards Organization, or ISO.) The MPEG-1,
`MPEG-2,

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