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`PUMA Exhibit 2003
`Apple v. PUMA, IPR2016-01114
`1of5
`
`

`
` Third Edition
`
`High-Performance
`Computer Architecture
`
`
`
`
`
`
`Apple V. PUMA, IPR2016—01114
`2 of 5
`
`PUMA Exhibit 2003
`
`

`
`Third Edition
`
`High-Performance
`Computer Architecture
`
`Harold S. Stone
`IBM T.]. Watson
`Research Center
`and
`
`Courant Institute
`New York University
`
`v‘v Addison-Wesley Publishing Company
`Reading, Massachusetts
`Menlo Park, California 0 New York
`Don Mills, Ontario o Wokingham, England
`Amsterdam 0 Bonn 0 Sydney o Singapore
`Tokyo o Madrid 0 San Juan o Milan 0 Paris
`
`PUMA Exhibit 2003
`
`Apple V. PUMA, IPR2016—01114
`3of5
`
`

`
`
`This book is in the Addison-Wesley Series in Electrical and Computer Engineering
`
`
`
`Copyright © 1993 by Addison-Wesley Publishing Company, Inc.
`
`All rights reserved. No part of this publication may be reproduced, stored in a
`retrieval system, or transmitted, in any form or by any means, electronic, mechanical,
`photocopying, recording, or otherwise, without the prior written permission of the
`publisher. Printed in the United States of America.
`
`1 2 3 4 5 6 7 8 9 10—HA-95949392
`
`PUMA Exhibit 2003
`
`Apple V. PUMA, IPR2016—01114
`4 of 5
`
`
`
`Library of Congress Cataloging-in-Publication Data
`
`Stone, Harold S.
`
`High-performance computer architecture / Harold S. Stone.—3rd
`ed.
`
`p.
`
`cm.
`
`Includes bibliographical references and index.
`ISBN 0-201-52688-3
`
`1. Computer architecture. I. Title.
`QA76.9.A73S76
`1993
`
`O04.2’2—dc2O
`
`92-32243
`CIP
`
`

`
`
`
`499
`Index and Glossary
`
`
`
`16
`
`U1
`
`.-’
`
`Gharachorloo, K., 388
`Gigaflops. See Gflops
`Global memory A memory directly ac-
`cessible by every processor in a mul-
`tiprocessor; 359, 418- 419, 423-453
`See also Shared memory
`Golub, G. H., 265
`Goodman, J. R., 48, 54, 387, 390, 449
`Gottlieb, A., 378, 442, 443
`Granularity A measure of the size of an
`individual task to be executed on a par-
`allel processor; 342-359, 417-420
`Gravitation, 240
`Greatest common divisor (GCD), 315
`Greedy strategy A strategy that initiates
`a new pipeline operation at the earliest
`opportunity; 180-182
`Green, P. E., ]r., 447
`Grohoski, G. F., 221
`Grosch’s Law An empirical rule that says
`that the cost of computer systems in-
`creases as the square root of the com-
`putational power of the systems; 14
`Gupta, S. C., 46
`Gustafson, ]. L., 320, 322
`
`Halstead, R., 421
`
`Hash lookup A search technique in which
`the search key is transformed to an ad-
`dress at which the search begins; 326
`Hayes, I. P., 23
`Heidelberger, I’., 446, 449
`Heller, D. E., 268, 308
`Hennessy, 1,, 23, 56-57, 228
`Hierarchy (of memory system) A multi-
`level memory structure in which suc-
`cessive levels are progressively larger,
`slower, and less costly; 25, 28, 100-101,
`137
`
`High-speed buffer memory A memory
`that holds data en route between a large
`main memory and the registers of a
`high-speed processor; 318
`See also Intermediate memory
`Hill, M., 60, 99, 101, 216
`Hillis, W. D., 338, 384, 385
`Hit. See Cache hit
`
`Hit ratio The ratio of the number of cache
`hits to the total number of cache ac-
`cesses; 34, 43, 114
`
`Hitachi Corporation, 44, 320
`Hoevel, L. W., 76
`Hopcroft, J.
`458
`Horowitz, M. 56-57
`Hoshino, T., 236, 238, 253, 287, 357, 370,
`445, 448
`
`Hot-spot contention An interference phe-
`nomenon observed in multiprocessors
`due to memory access statistics being
`slightly skewed from a uniform distri-
`bution to favor a specific memory
`module; 376-378, 381-382, 444, 474
`HP Spectrum, 214
`Hwang, I(., 227, 433
`Hwu, W.-M., 228
`
`Hypercube A parallel processor whose
`interconnection structure treats indi-
`
`vidual processors as the nodes of a
`multidimensional cube and intercon-
`
`nects two processors if the correspond-
`ing nodes of the cube are neighbors;
`252, 384-385
`See also Cosmic Cube
`
`IBM Corporation, 210, 320
`IBM GF-11, 327-329, 338, 343
`IBM RP3, 284, 371, 382-384, 415, 420
`IBM RS/6000, 220-225
`IBM STRETCH, 143
`IBM System 360/91, 204-206
`IBM System 360-370, 22, 96, 433, 436
`IBM 3090, 197, 341, 465
`IBM 801, 210. 227
`
`IEEE 802.5 Token-Ring Standard, 364
`IEEE Standard for Floating-Point Arith-
`metic, 227
`ILLIAC IV, 164- 165, 237, 247-253, 257-259,
`287, 289, 330, 333
`Image processing A computation per-
`formed on a digitized representation of
`an image whose purpose is to enhance
`the image or to extract
`information
`about the image; 13
`Inclusion principle The property that a
`
`PUMA Exhibit 2003
`
`
`
`Apple v. PUMA, IPR2016—01114
`5of5

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