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`Routing lookups in hardware at memory access speeds - IEEE Xplore Document
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` P. Gupta ; S. Lin ; N. McKeown
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`Using multiple hash functions to improve IP
`lookups
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`RR-TCP: a reordering-robust TCP with DSACK
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`High-performance IP routing table lookup using
`CPU caching
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`Abstract:
`The increased bandwidth in the Internet puts great demands on network routers; for example, to route minimum sized Gigabit Ethernet packets, an
`IP router must process about 1.5/spl times/10/sup 6/ packets per second per port. Using the "rule-of-thumb" that it takes roughly 1000 packets per
`second for every 10/sup 6/ bits per second of line rate, an OC-192 line requires 10/spl times/10/sup 6/ routing lookups per second; well above
`current router capabilities. One limitation of router performance is the route lookup mechanism. IP routing requires that a router perform a longest-
`prefix-match address lookup for each incoming datagram in order to determine the datagram's next hop. We present a route lookup mechanism
`that when implemented in a pipelined fashion in hardware, can achieve one route lookup every memory access. With current 50 ns DRAM, this
`corresponds to approximately 20/spl times/10/sup 6/ packets per second; much faster than current commercially available routing lookup
`schemes. We also present novel schemes for performing quick updates to the forwarding table in hardware. We demonstrate using real routing
`update patterns that the routing tables can be updated with negligible overhead to the central processor.
`
`Published in: INFOCOM '98. Seventeenth Annual Joint Conference of the IEEE Computer and Communications Societies. Proceedings. IEEE
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`Date of Conference: 29 March-2 April 1998
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` INSPEC Accession Number: 6004783
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`Date Added to IEEE Xplore: 06 August 2002
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`DOI: 10.1109/INFCOM.1998.662938
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` ISBN Information:
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`Print ISSN: 0743-166X
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`http://ieeexplore.ieee.org/document/662938/[4/20/2017 11:42:28 AM]
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`IEEE Keywords
`Routing, Hardware, Random access memory, Costs, Spine, Laboratories, Bit rate, Internet,
`Ethernet networks, Uninterruptible power systems
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`INSPEC: Controlled Indexing
`pipeline processing, telecommunication network routing, Internet, packet switching, transport
`protocols, table lookup, DRAM chips
`
`INSPEC: Non-Controlled Indexing
`50 ns, memory access speeds, IP routing lookups, bandwidth, Internet, network routers, Gigabit
`Ethernet packets, longest-prefix-match address lookup, OC-192 line, router performance,
`datagram, pipelined hardware implementation, DRAM, routing update patterns, forwarding table
`updates, routing tables, central processor
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`Authors
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`P. Gupta
`Comput. Syst. Lab., Stanford Univ., CA, USA
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`S. Lin
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`N. McKeown
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`
`Using multiple hash functions to improve IP lookups
`A. Broder; M. Mitzenmacher
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`RR-TCP: a reordering-robust TCP with DSACK
`Ming Zhang; B. Karp; S. Floyd; L. Peterson
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`High-performance IP routing table lookup using CPU caching
`T. Chiueh; P. Pradhan
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`A passive approach for detecting shared bottlenecks
`D. Katabi; I. Bazzi; Xiaowei Yang
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`Beyond TCAMs: An SRAM-Based Parallel Multi-Pipeline Architecture for Terabit IP Lookup
`W. Jiang; Q. Wang; V. K. Prasanna
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`A. Basu; Girija Narlikar
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`Optimal routing table design for IP address lookups under memory constraints
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`
`http://ieeexplore.ieee.org/document/662938/[4/20/2017 11:42:28 AM]
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`

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`Routing lookups in hardware at memory access speeds - IEEE Xplore Document
`
`An IP packet forwarding technique based on partitioned lookup table
`M.J. Akhbarizadeh; M. Nourani
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`Scalable High Throughput and Power Efficient IP-Lookup on FPGA
`Hoang Le; Viktor K. Prasanna
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