...-'-'-----...:,:-,'-,
`
`::..
`
`,-.-'-
`
`- ,-,- ~-~~..,--,
`
`,IN THE'UNIJEQ;IU1U WENlANDTBADElARK '9FFICE
`Iti re Appljca1ion of
`Date: 3.June 1994
`J,J.,aGlldik "tal.
`.serial N.o., {)Q6,120
`.Flled:
`01·t9"93
`FOR:'METHODOFFABRICATINGA
`MICROEl.ECTRONICSOEVICE
`
`Gr:oup ArtUnlt: ~ t01
`Examiner: O~ Graybill
`
`".
`
`Commissioner of Patents and Trademarks
`.washington DC ~()231
`
`Sir:
`
`Irlre~pohse totlieOffice Action datEld.Oe~ember 10, 199$,pleasa.enter
`t.h~ 'following ame~meflts,!imd oonslclef the remarkS I\~reil'l:'
`
`IN THE CLAIMS,
`Please anienaClaims 1. 12 and 1.5 as folloWf!:
`
`'OQt
`
`Petitioner Samsung - SAM1011
`
`

`
`.. -
`
`\
`
`Serial No. 006, 120 .................................................................................. :Page 2
`
`1.
`
`(Amended) A method of fabricating a microelectronic
`
`device, comprising the steps of:
`
`furnishing a first substrate having an etchable layer, an etch-stop
`
`layer overlying the etchable layer, and a wafer overlying the etch-stop
`
`5
`
`layer;
`
`forming a microelectronic circuit element in the exposed sjde of the
`
`wafer of the first substrate opposjte to the sjde oyerlyjng the etch-stop
`Jaw;
`
`attaching the wafer of the first substrate to a second substrate; and
`
`10
`
`etching away the etchable layer of the first substrate down to the
`
`etch-stop layer.
`
`)l
`~ (Amended) A method of fabricating a microelectronic
`
`device, comprising the steps of:
`
`furnishing a first substrate having an etchable layer, an etch-stop
`
`layer overlying the etchable layer, and a wafer overlying the etch-stop
`
`5
`
`layer;
`
`forming a microelectronic circuit element in the exposed sjde of the
`
`wafer of the first substrate opposjte the sjde oyerlyjng the etch-stop layer;
`
`attaching the wafer of the first substrate to a second substrate, the
`
`second substrate having a second microelectronic circuit element therein;
`
`10
`
`002
`
`

`
`- - - - - - - - - - - - -
`
`--------
`
`Serial No. 006, 120 ................................................................................... Page 3
`
`making an electrical contact from the microelectronic circuit
`
`element in the wafer of the first substrate to the second microelectronic
`
`circuit element on the second substrate; and
`
`etching away the etchable layer of the first substrate down to the
`
`etch-stop layer; and
`
`forming an electrical connection to the microelectronic circuit
`
`element in the wafer of the first substrate through the etch-stop layer.
`
`t0·
`.,}!f.' (Amended) A method of fabricating a microelectronic
`
`device, comprising the steps of:
`
`furnishing a first substrate having a silicon etchable layer, a silicon
`
`dioxide etch-stop layer overlying the silicon layer, and a single-crystal
`
`5
`
`silicon wafer overlying the etch-stop layer, the wafer having a front
`
`surface not contacting the silicon dioxide layer;
`
`forming a microelectronic circuit element in the front surface of the
`
`single-crystal silicon wafer;
`
`attaching the 'front surface of the single-crystal silicon wafer to a
`
`10
`
`first side of a second substrate; and
`
`etching away the silicon etch able layer down to the silicon dioxide
`
`etch-stop layer using an etchant that attacks the silicon layer but not the
`
`silicon dioxide layer.
`
`/ ,.
`
`l--~··
`
`003
`
`

`
`Serial No. 006,120..................................................
`Pleéase cancel c1aim$/11/.'1gnd 2 .
`
`................Page 4
`
`004
`
`

`
`Serial No. 006, 120 .................................................................................. Page 5
`
`REMARKS
`
`Claims 1-10, 12, 13 and 15-20 remain In this case after the
`
`cancellation of claims 11, 14 and 21 in this amendment. This amendment also
`
`amends claims 1 , 12 and 15.
`
`Claims 1-7, 10-18 and 21 were rejected under 35. U.S.C. §103 as
`
`being unpatentable over Riseman in combination with Yasumoto.
`
`Rise man, U. S. Patent No. 4, 169,000, differs from the present
`
`invention in a very fundamental aspect. In the present invention, the
`
`microelectronic circuit is initially formed on the first substrate which has an
`
`etchable layer, an etch-stop layer and a wafer, the microelectronic circuit being
`
`formed more specifically in the exposed side of the wafer, that is, the side of the
`
`wafer opposite to the side which overlies the etch-stop layer. In contrast, in
`
`Rissman, the microelectronic circuit is formed in a substrate 10 which does not
`
`have the construction specified in the present invention, i.e., the etchable layer,
`
`an etch-stop layer and a wafer overlying the etch-stop layer. Afterwards, a
`
`second substrate 21 which does not have a microelectronic circuit in it nor does
`
`it have a wafer overlying an etch-stop layer in which a microelectronic circuit
`
`element could be formed, is placed on top of the microelectronic circuit element
`
`of the first substrate. While the second substrate 21 in Rise man ·may be etched
`
`away because of the presence of layer 20 or 22 being resistant to etchants, th~
`
`~ substrate may not be etched away since there is no etch-stop layer and the
`
`005
`
`

`
`Serial No. 006,120 .................................................................................. Page 6
`
`microelectronic circuit is formed in it. In Riseman, the second substrate is in fact
`
`etched away leaving the silicon dioxide layer 20 covering the cavity pattern 12 as
`
`desirE!d. Because of these basic differences between Riseman and the present
`
`invention, the fact that Riseman does not teach a device made by the method of
`
`attaching the front surface of a single crystal wafer to a second substrate
`
`containing a second microelectronic circuit element and electrically contacting
`
`the first and second circuit elements cannot be overcome by the addition of
`
`Yasumoto at al.
`
`Claim 1 has been amended to make it clear that the microelectronic circuit
`
`.
`is formed in or through the exposed side of the wafer, that is the side of the
`wafer of the first substrate that is opposite to the side overlying the etch-stop
`
`layer. This language is intended to clarify the method so that the similarities in
`
`the overall location of substrates and layers to those in Riseman should not
`
`serve as a basis for rejecting these method claims. Similarly, in claim 15, it Is
`
`now specified that the microelectronic circuit element is formed in the front
`
`surface of the single crystal silicon wafer. It is submitted that the amendments to
`
`claims 1, 12 and 15 clarify the process of the present invention and that these
`
`claims and the claims dependent upon them are allowable over Riseman In
`
`combination with Yasumoto.
`
`Claims 8 and 20 were rejected under 35 U.S.C. §1 03 as being
`
`unpatentable over Riseman in combination with Yasumoto as applied to claims
`
`1-7, 10-18 and 21 above and further in view of Raschke. While Raschke·
`
`006
`
`

`
`- - - - ' -- -~- · - - -
`
`·---'
`
`Serial No. 006,120 .............................................................................. Page 7
`
`teaches a method of adhering circuit elements using epoxy resin and degassing
`
`the resin, this cannot overcome that part of the rejection depending upon
`
`Rise man in combination with Yasumoto as discussed above.
`
`Claim 9 was rejected under 35 U.S.C. §1 03 as being unpate_ntable over
`
`Rise man in combination with Yasumoto as applied to claims 1· 7, 1 0·18 and 21
`
`above and further in view of Stoller et al. While Stoller shows a support 22, 24
`
`that enables wafer support during etching, it is not seen how that reference can
`
`be combined with Riseman and Yasumoto as, as previously mentioned, the first
`
`substrate in Riseman does not have an etch-stop layer to prevent the etching of
`
`the substrate without a circuit. It is submitted that claim 9 Is therefore allowable.
`
`Claim 19 was rejected under 35 U.S.C. §1 03 as being unpatentable over
`
`Riseman in combination with Yasumoto as applied to claims 1-7, 10·18 and 21
`
`above in view of Applicant's submitted prior art and admissions of non criticality.
`
`The material cited at page 7, lines 1-19 concerning available substrates, does
`
`not overcome the deficiencies of that portion of the rejection depending upon
`
`Riseman, in combination with Yasumoto as discussed above.
`
`In view of the foregoing, Applicant submits that the remaining claims in
`this case, claims 1-1 o, 12, 13 and 15-20 are allowable. Reconsideration of the
`claims as amended is requested and allowance at an early date is solicited.
`
`007
`
`

`
`- - - - - ---
`
`----~
`
`Serial No. 006,120 .................................................................................. Page 8
`
`In addition, a PT0-1449 disclosing references cited with respect to device
`
`claims in a companion case is also submitted.
`
`Respectfully submitted,
`
`l!!HJ?e~cf:iit{pvj
`
`William C. Schubert
`Registration No. 30,102
`
`HUGHES AIRCRAFT COMPANY
`Bldg. C1; M.S. A126
`P.O. Box 80020
`Los Angeles CA 90080-0028
`Telephone: (805) 562-2108
`Date: 3 June 1994
`
`WCS :AM92654. PTO
`Attachment: PT0-1449
`
`008
`
`

`
`In re Ap1D1t;Qtk>n
`Joseph J. Eml._._..'fl
`Serial No. 006,120
`Filed:
`01-19·93
`For: METHOD OF FABRICATING A
`MICROELECTRONIC DEVICE
`
`IN JHE UNITED STATES PATENT AND TRADEMARK OFFICE
`Date: 3 June 1994
`
`Group Art Unit: 1107
`
`Examiner: D. GRAYBILL
`
`AMENDMEt-JT TBANSMIUAL LETTER
`
`PATENT
`PD-92654
`
`The Commissioner of Patents and Trademarks
`Washington, D.C. 20231
`
`Sir:
`
`Transmitted herewith Is an amendment in the above-identified application.
`
`'i(cid:173)
`~ ·;O
`c> ~ ·r,
`( }
`~ N
`1.2]
`c. <..J
`x._ Applicanl petitions for an extension of time for 3 monlh(s) to respond to the Offi'O$ ~n -dited
`December 10, 1993. If an additional extension of time is required, please consld~~ ~n ··'
`o
`C?.
`therefor.
`irio.oo
`Fee $
`
`~.
`
`'
`
`·:..r
`I
`\
`
`An extension for __ months(s) has already been secured: the fee paid therefor of
`is deducted from the total fee due for the total months of extension now requested.
`
`$:......, ___ _
`
`x__ An Information Disclosure Statement, PT0·1449,1s enclosed. Fee per 37CFA§1.17(p) $
`
`200.00
`
`x._ No additional fee for claims is required.
`
`x._ The fee for claims has been calculated as shown below:
`
`TOTAL CLAIMS
`INDEPENDENT CLAIMS
`MULTIPLE DEPENDENT CLAIMS
`
`CLAIMS REMAINING
`AfTER AMENDMENT
`18
`3
`
`CLAIMS AS AMENDED
`HIGHEST NUMBER
`PRESENT
`fm6
`pRE\IIOUSLY PAID FOB
`minus 21
`•
`"' 1oo1.0 _ _ _
`minus 3
`.. ~ 1oo1,0 _ _ _
`
`TOTAL ADDITIONAL FEE FOR THIS AMENDMENT:
`
`BAlE
`X $ 22.00
`X $ 74.00
`$230.00
`
`ADDmONAL
`FEE
`
`$0
`$0
`so
`$0
`
`Charge $1,040.00 to Deposit Account No. 08-3250 of Hughes Aircraft Company, Los Angeles, California.
`Please charge any additional fees for claims or credit overpayment to Deposit Account No. 08-3250.
`If any
`additional extension fee is required, please charge to Deposit Account No. 08-3250. This form Is submitted In
`triplicate.
`
`Respectfully submitted,
`
`W. C. Schubert, Registration No. 30,102
`
`I hereby certify that this correspondence is being deposited with the United States Postal Service as first·
`class mail in an envelope addressed to the Commissioner·of Patents & Trademarks, Washington, DC 20231 on
`3 JUNE 1994.
`;, scqoso 06/17/91f oaoo6t?.o
`nUGHES AIRCRAFT COMPANY
`.·
`Bldg. C1, Mail Station A-126
`P.O. Box 80028
`Los Angeles, CA 90080-0028
`Telephone: 805-562-2108
`00·516(11921
`Attachments
`
`oa-3r~~ 200J>~ /Y'jy
`W. C. SCHUBERT I DATE
`
`• If less lhan 20, Insert 20
`.. If less than 3, Insert 3
`
`009
`
`

`
`IN THE UNITED STATES PATENT ANP TRADEMARK OFFICE
`Date: 3June 1994
`
`PATENT
`PD-92654
`
`Group Art Unit: 1107
`
`. Examiner: D. GRAYBILL
`
`AMENQMENJ TRANSMITTAL LEITER
`
`The Commissioner of Patents and Trademarks
`Washington, D.C. 20231
`
`Sir:
`
`Transmitted herewith is an amendment in the above-identified application.
`
`x__ Applicant petitions for an extension of time for 3 month(s) to respond to the Office Action dated
`If an add'rtional extension of time is required. please consider this a petition
`December 10, 1993.
`therefor.
`
`Fee $ 94000
`
`An extension for __ months(s) has already been secured: the fee paid therefor of
`is deducted from the total fee due for the total months of extension now requested.
`
`$. ____ _
`
`x_ An !~formation Disclosure Statement, PT0-1449, is enclosed.· Fee per 37CFR§1.17(p) $
`
`200,00
`
`x__ No additional fee for claims is required.
`
`x__ The fee for claims has been calculated as shown below:
`
`TOTAL CLAIMS
`INDEPENDENT CLAIMS
`MULTIPLE DEPENDENT CLAIMS
`
`CLAIMS REMAINING
`AfTER AMENQMENT
`18
`3
`
`CLAIMS AS AMENQEQ
`HIGHEST NUMBER
`PRESENT
`EmA
`PAEYIOUSLY PAIQ FOB
`minus 21
`•
`• ....o _ _ _
`•• = .... o __ _
`minus 3
`
`TOTAL ADDITIONAL FEE FOR THIS AMENDMENT:
`
`&IE
`X $ 22.00
`X $ 74.00
`$230.00
`
`$0
`$0
`$0
`$Q
`
`ADDITIONAL
`FEE
`
`Charge $1,040.00 to Deposit Account No. ()8.3250 of Hughes Aircraft Company, Los Angeles, California.
`Please charge any additional fees for claims or cr~it overpayment to Deposit Account No. 08-3250. If any
`additional extension fee is required, please charge to Deposit Account No. 08·3250. This form Is submitted In
`triplicate.
`
`Respectfully submhted,
`
`W. C. Schubert, Registration No. 30,102
`
`I hereby certify that this correspondence is being deposited with the United States Postal Service as first·
`class mail in an envelope addres~ed to the Commissioner of Patents & Trademarks, Washington, DC 20231 on
`3 JUNE 1994.
`
`HUGHES AIRCRAFT COMPANY
`Bldg. C 1, Mail Station A·126
`P.O. Box 80028
`Los Angeles, CA 90080·0028
`Telephone: 805-562·2108
`09·5 16(1192)
`Attachments
`
`W. C. SCHUBERT I DATE
`
`• If less than 20, Insert 20
`.. If less than 3, Insert 3
`
`010