UNITED STATES PATENT AND TRADEMARK OFFICE
`
`________________
`
`BEFORE THE PATENT TRIAL AND APPEAL BOARD
`
`________________
`
`VOLKSWAGEN GROUP OF AMERICA, INC.,
`Petitioner,
`
`v.
`
`ADVANCED SILICON TECHNOLOGIES LLC
`Patent Owner
`________________
`
`Case IPR2016-00894
`U.S. Patent No. 8,933,945 B2
`________________
`
`DECLARATION OF JOHN C. HART, PH.D. IN SUPPORT OF PATENT
`OWNER ADVANCED SILICON TECHNOLOGIES LLC’S
`PRELIMINARY RESPONSE
`
`Case IPR2016-00894
`Volkswagen Group of America
`
`
` v. Advanced Silicon Technologies LLC
`
` AST Exhibit 2001
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`

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`I.
`
`INTRODUCTION
`
`1.
`
`I have been retained by counsel for Patent Owner Advanced Silicon
`
`Technologies LLC (“Patent Owner” or “AST”) as an expert to provide this
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`declaration and certain opinions regarding claims 1-11 and 21 of United States
`
`Patent No. 8,933,945 (“the ‘945 Patent”). More specifically, I have been asked to
`
`form opinions on whether Claims 1-11 and 21 of the ‘945 patent are rendered
`
`obvious by certain combinations of prior art references, including U.S. Patent No.
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`5,757,385 to Narayanaswami et al. (“Narayanaswami”), U.S. Patent No. 6,070,003
`
`to Gove et al. (“Gove”), portions of “Computer Graphics Principles and Practice:
`
`Second Edition in C,” by Foley et al. (“Foley”), and U.S. Patent No. 5,794,016 to
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`Kelleher (“Kelleher”). All of the opinions and conclusions found in this
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`declaration are my own and I have personal knowledge of all the facts set forth
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`herein. If called to testify, I would competently testify and verify that contained
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`herein.
`
`2.
`
`I am being compensated at my hourly rate of $550. I am also being
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`separately reimbursed for out of pocket expenses. My compensation does not
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`depend in any way on the outcome of these cases or the particular testimony or
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`opinions I express.
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`3.
`
`I understand that Volkswagen has filed a petition in this proceeding
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`contending claims 1-11, and 21 of the ’945 Patent are obvious over certain multi-
`
`reference combinations of Narayanaswami, Gove, Foley and Kelleher.
`
`II.
`
`EXPERT QUALIFICATIONS
`
`4.
`
`I have been a professor of computer graphics since 1992. I am
`
`currently a tenured Professor in the Department of Computer Science at the
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`University of Illinois at Urbana-Champaign, a department consistently ranked in
`
`the top-5 by US News and World Report. I am also the Executive Associate Dean
`
`of the Graduate College of the University of Illinois at Urbana-Champaign.
`
`5.
`
`I received a Bachelor’s of Science degree in Computer Science from
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`Aurora University in 1987, a Master’s of Science in Electrical Engineering and
`
`Computer Science from the University of Illinois at Chicago in 1989, and a Ph.D.
`
`in Electrical Engineering and Computer Science from the University of Illinois at
`
`Chicago in 1991.
`
`6.
`
`I worked as an intern in 1998 at the IBM TJ Watson Research Center
`
`in Hawthorn, New York, and in 1999 at AT&T Pixel Machines in Holmdel, New
`
`Jersey. I worked as a postdoc in 1991-1992 at the Electronic Visualization
`
`Laboratory at the University of Illinois at Chicago with funding from the National
`
`Center for Supercomputing Applications at the University of Illinois at Urbana-
`
`Champaign. I worked as a visiting researcher in the summer of 2007 for the
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`3
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`Graphics Research Group of Adobe Systems in Seattle, Washington.
`
`7.
`
`From 1997-2000, I designed, simulated and patented graphics
`
`hardware for Silicon Reality and the Evans & Sutherland Computer Corp. I have
`
`also consulted for visual effects companies (e.g., Kleiser-Walczak, Blue Sky
`
`VIFX), defense contractors (e.g., SAIC, Pratt & Whitney) and medical imaging
`
`companies (e.g., Intrinsic Medical Imaging).
`
`8.
`
`My research in computer graphics has been supported by Adobe,
`
`DARPA, Intel, Nokia, NVIDIA, NSF and Microsoft. I have published over 75
`
`reviewed papers on computer graphics, including papers in the most rigorous and
`
`prestigious venues, including the SIGGRAPH Annual Conference Proceedings, the
`
`ACM Transactions on Graphics, and the IEEE Transactions on Visualization and
`
`Computer Graphics. From 2002-2008, I was the longest-serving Editor-in-Chief of
`
`ACM Transactions on Graphics, the top journal in the field of computer graphics.
`
`9.
`
`I was an Executive Producer for the ACM SIGGRAPH documentary
`
`“The Story of Computer Graphics” in 1999. I served from 1996-2000 on the ACM
`
`SIGGRAPH Executive Committee. I am currently the computer graphics area
`
`editor of the ACM Books series, and oversaw the recent publication of “The VR
`
`Book: Human Centered Design for Virtual Reality.”
`
`10.
`
`I co-authored the book “Real-Time Shading” in 2002 on the
`
`implementation of procedural shaders on graphics processors became they became
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`fully user programmable GPU’s. I contributed two chapters to the book “Modeling
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`and Texturing: A Procedural Approach” in 2002, including a chapter on procedural
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`texturing using rasterization and texturing operations.
`
`11. My CV is attached as Exhibit A.
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`III. MATERIALS CONSIDERED
`
`12.
`
`In forming the opinions set forth in this declaration, I have considered
`
`and relied upon my education, knowledge of the relevant field, and experience. I
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`have also reviewed and considered Volkswagen’s petition, the ‘945Patent, its
`
`prosecution history, the prior art cited by Volkswagen above, Volkswagen’s
`
`proposed claim constructions for certain terms, and the parties’ Joint Claim
`
`Construction Chart submitted in ITC Proceeding Investigation No. 337-TA-984,
`
`and other materials expressly cited.
`
`IV. PERSON OF ORDINARY SKILL IN THE ART
`
`13.
`
`The field of the ‘945 Patent is computer graphics hardware.
`
`Professionals in the field of computer graphics hardware will generally be
`
`electrical engineers, computer engineers, or computer scientists.
`
`14.
`
`It is my opinion that a POSITA of computer graphics hardware would
`
`have a degree in electrical engineering, computer engineering, computer science,
`
`or a related field. Such a person would also have at least 3-5 years' experience
`
`working in computer graphics hardware/computer architecture or related fields, or
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`an equivalent combination of graduate education and/or work experience.
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`15.
`
`I meet this criteria and I consider myself a person with at least
`
`ordinary skill in the art pertaining to the ‘945 Patent. In addition, I would have
`
`been a POSITA at the time of the invention of the ‘945 Patent.
`
`V.
`
`U.S. PATENT NO. 8,933,945
`
`A.
`
`16.
`
`BACKGROUND OF THE ‘945 PATENT
`
`The ‘945 patent describes a “graphics processing circuit” consisting of
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`multiple graphics pipelines on the same chip. When multiple graphics pipelines
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`operate in parallel, an important goal for efficient graphics processing is “load
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`balancing,” which means all of the graphics pipelines remain busy and none lay
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`idle, such that the graphics processing unit can produce an image as quickly as
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`possible.
`
`17. One of these graphics pipelines is illustrated in Fig. 2 (reproduced
`
`below) of the ‘945 Patent, which I annotated to identify one of the graphics
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`pipelines using a red rectangle. It consists of “front end circuity,” a “scan
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`converter” and “back end circuitry.”
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`Raster Engine
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`18.
`
`“The front end circuitry 35 generates the pixel data 36 by performing,
`
`for example, clipping, lighting, spatial transformations, matrix operations and
`
`rasterizing operations on the primitive data.” (‘945 Patent at 4:39-42.) For
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`example, the front end circuitry would convert the vertices of a triangle from their
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`3-D XYZ positions on the sphere to their corresponding 2-D XY positions on the
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`display screen, as shown below. The “rasterizing operations” include computing
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`vertex values useful for the next scan converter stage.
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`Z
`
`XYZ
`
`XYZ
`
`XYZ
`
`Y
`
`X
`
`XY
`
`XY
`
`X
`
`Y
`
`XY
`
`19.
`
`“The scan converter 37 of the first graphics pipeline 101 receives the
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`pixel data 36 and sequentially provides the position (e.g. x, y) coordinates 60 in
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`screen space of the pixels to be processed by the back end circuitry 39…” (‘945
`
`Patent at 4:45-48.) As shown below, a scan converter accepts a triangle described
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`by three vertices and produces a collection of pixels designed to fill the triangle.
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`XY
`
`XY
`
`Y
`
`XY
`
`X
`
`20.
`
`“Back end circuitry 39 may include, for example, pixel shaders,
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`blending circuits, z-buffers or any other circuitry for performing pixel appearance
`
`attribute operations (e.g. color, texture blending, z-buffering) on those pixels
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`located, for example, in tiles…” (‘945 Patent at 4:66-5:3.) As illustrated below,
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`8
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`the back end circuitry determines the colors of the pixels produced by the scan
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`converter.
`
`21.
`
`In order to provide better load balancing of the available resources,
`
`the ‘945 Patent divides the screen up into tiles (below left), such that each tile can
`
`be assigned to one graphics pipeline for graphics processing. For example, as
`
`illustrated in below right, tiles shaded in red are assigned to one graphics pipeline
`
`while tiles shaded in blue are assigned to the other.
`
`As shown in Fig 2 of the ‘945 Patent, excerpted below left, a single front end
`
`circuit processes triangle vertices, but the remainder of the pipeline is performed
`
`by two different circuits “A” and “B,” which handle the portions of the screen in
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`Fig. 3 of the ‘945 Patent, shown below right.
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`22. Using the figures above, front end circuitry 35 computes screen 48
`
`position of triangle <V0,V1,V2>. Scan converter 37 gets portion 81 of the
`
`triangle, finds the pixels in this region and sends them to back end circuitry 39.
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`Scan converter 40 gets portion 84 of the triangle, finds the pixels in this region and
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`sends them to back end circuitry 42. Similarly, scan converter 37 gets portion 82
`
`and sends pixels to back end circuitry 39, and scan converter 40 gets portion 83
`
`and sends pixels to back end circuitry 42.
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`23. A memory controller 46 accepts pixels 43 and 44 generated by back
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`end circuitry A 39 and B 42 and writes pixels from both sources into the same
`
`graphics memory. This memory controller 46 also manages the transfer of pixel
`
`data 49 and 50 from graphics memory to the display, as illustrated by Fig. 2
`
`excepted below, and described by the ‘945 Patent at 5:37-44.
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`B.
`
`VOLKSWAGEN’S PROPOSED COMBINATIONS
`
`1.
`
`Narayanaswami
`
`24. Narayanaswami was filed by IBM to find “computer graphics
`
`systems” that could “render multiple objects into a frame buffer for display as
`
`quickly as possible.” (Narayanaswami at 1:15-17.) Narayanaswami recognized
`
`that “the rendering process has become more complex and computationally
`
`intensive as users demand more detailed results … using more computationally
`
`intensive processing techniques”. (Id. at 1:18-24.)
`
`25. Narayanaswami teaches that multiprocessing has been utilized to
`
`handle an ever increasing graphical workload. (Id. at 1:17- 25.) Narayanaswami
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`attributes that complexity to user demand for “more detailed results using more
`
`objects rendered more quickly, including providing realtime motion, while using
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`more computationally intensive processing techniques such as color, texture,
`
`lighting, transparency and other rendering techniques.” (Id.)
`
`26. Hence Narayanaswami was not motivated primarily by speed but by
`
`making the graphics pipeline more flexible through software programming on
`
`parallel processors to enable higher quality images.
`
`2.
`
`Gove
`
`27.
`
`The Gove patent was filed by Texas Instruments Incorporated (“TI”)
`
`for use in an imaging system. Gove was motivated to find “[i]maging systems
`
`which obtain visual images and perform various manipulations with respect to the
`
`data and then control the display of the imaged and stored data…” (Gove at 1:50-
`
`52.) While competitive graphics processors like Narayanaswami would have used
`
`specialized circuity including a scan converter and a texture unit (see e.g,
`
`Narayanaswami at 1:22 and 38-39), Gove does not disclose any texturing and its
`
`scan conversion are performed as a software process on a single master processor.
`
`(Gove at 12:4-8.)
`
`28. Gove’s patent embodiments would have been used in applications
`
`such as medical image processing. Gove describes operations in its “Image
`
`Processing” section such as the “removal of extraneous specks from an image” or
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`“recognizing … a circle” and that the circle in combination with “other shapes
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`form a human image.” (Gove, col. 7:50-64.) Those types of functions are meant
`
`to enhance the quality of the images, which decreases image turnover time. Gove
`
`Figure 11 lists the various operations or algorithms which would be typical for its
`
`imaging processing system. (Gove at col. 12:17-19; see also Fig. 11.)
`
`29. Gove teaches that “[a] typical type of operation would be optical
`
`character recognition, target recognition or movement recognition. In each of these
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`situations, the associated image processing would be controlled by the kind of
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`operations to be performed.” (Gove at 12:19-24.) Gove also describes how the
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`invention can be used for various methods of image enhancement. (See generally,
`
`id. at col. 12:33-59.) These types of operations place a premium on image quality
`
`which would be contrary to maximizing graphics turnover and display rates.
`
`30.
`
`The “graphics pipeline” disclosed in Gove was largely implemented
`
`on a single master processor and not designed to achieve the speed necessary to
`
`“render … for display as quickly as possible” as stated as a preliminary goal in
`
`Narayanaswami. A person of ordinary skill would understand that a transfer
`
`processor would be ill-suited for writing pixels to the frame buffer, especially in
`
`comparison to the memory controller described in the ‘945 patent which
`
`coordinates direct access from the back ends of the two or more pipelines so that
`
`they can write their data directly into the frame buffer memory.
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`31. As the transfer processor is described in Gove, the system would
`
`require the processors to write their pixel outputs to local memory and then require
`
`an additional step (introducing additional latency) to copy the contents of the local
`
`memory to the external frame buffer.
`
`32. Where Narayanaswami emphasizes speeds necessary to “to render
`
`multiple objects into a frame buffer for display as quickly as possible”, the
`
`inefficiencies that would accompany trying force Gove’s transfer processor to
`
`operate together with Narayanaswami’s graphics apparatus would make no sense.
`
`33. A person of ordinary skill in the art would not think to combine
`
`Narayanaswami with Gove.
`
`3.
`
`Foley
`
`34.
`
`Foley is a computer graphics textbook that has 21 chapters and over
`
`1,000 pages. (Ex. 1010) (Foley.) In Narayanaswami’s “Background of the Art”
`
`section concerning the prior art on which it claims to improves upon,
`
`Narayanaswami describes Foley teaching that “[e]ach object to be rendered may
`
`be assigned to a specific processor for processing including the use of a processor
`
`for each object in very high performance systems. (Narayanaswami, at 1:29-32
`
`(emphasis added).)
`
`35.
`
`Those types of processing assignments are the background art that
`
`Narayanaswami purports to improve upon, not follow. (E.g., Narayanaswami at
`
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`1:25-32, 2:7-11, 4:7-36.) Narayanaswami criticizes computer graphics systems
`
`such as Foley’s in which an entire object is assigned to a specific processor, and
`
`teaches that systems would be improved if they instead allocated workload based
`
`on “pixel location or display region” rather than by object. (E.g., Narayanaswami
`
`at 1:25-32, 2:7-11, 4:7-5:18.)
`
`36. A person of ordinary skill would not work backwards and subvert the
`
`supposed advantages of the Narayanaswami by incorporating the criticized and
`
`inferior system of Foley.
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`I declare under penalty of perjury under the laws of the United States of America
`
`that the foregoing is true and correct to the best of my knowledge.
`
`Executed on: July 18, 2016
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`Curriculum Vitæ
`
`
`John C. Hart
`
`(217) 333-8740
`jch@illinois.edu
`http://graphics.cs.uiuc.edu/~jch
`
`
`
`
`
`Professor
`Dept. of Computer Science
`3227 Siebel Center
`
`Executive Associate Dean
`Graduate College
`223 Coble Hall
`
`University of Illinois at Urbana Champaign
`
`
` Experience 
`
`
`
`
`
`
`
`
`
`Education
`
` Ph.D. Electrical Engineering and Computer Science Dept., University of Illinois at Chicago, 1991. Thesis
`title: ``Computer Display of Linear Fractal Surfaces.'' Advisor: Thomas A. DeFanti.
`
` M.S. EECS Dept., University of Illinois at Chicago, 1989. Thesis title: ``Image Space Algorithms for
`Visualizing Quaternion Julia Sets.'' Advisor: Thomas A. DeFanti.
`
` B.S. College of Liberal Arts and Science, Aurora University, 1987. Major: Computer Science.
`
`Academia
`
` Executive Associate Dean. Graduate College, University of Illinois, 2015-.
`
` Associate Dean. Graduate College, University of Illinois, 2014-2015.
`
` Director for Graduate Studies. Dept. of Computer Science. 2013.
`
` Full Professor. Dept. of Computer Science, University of Illinois, 2006-.
`
` Associate Professor. Dept. of Computer Science, University of Illinois, 2000-2006.
`
` Associate Professor. School of Electrical Engineering and Computer Science, Washington State
`University, 1998-2000.
`
` Assistant Professor. School of Electrical Engineering and Computer Science, Washington State
`University, 1992-1998.
`
` Postdoctoral Research Associate. Electronic Visualization Laboratory, University of Illinois at Chicago,
`and National Center for Supercomputing Applications, University of Illinois at Urbana-Champaign, 1991-
`1992.
`
` Research Assistant. Electronic Visualization Laboratory, Electrical Engineering and Computer Science
`Dept., University of Illinois at Chicago, 1988-1991.
`
` Teaching Assistant. Analog & digital circuit design courses, EECS Dept. University of Illinois at Chicago,
`1987-1988.
`
`John C. Hart
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`Industry
`
`
`
`Intrinsic Medical Imaging LLC, Bloomfield Hills, MI. Consultant, 2012-13. Mesh construction and
`simulation of coronary arterial blood flow.
`
` Pratt & Whitney, Hartford, CT. Consultant, 2011. Flux estimation in a lensed system.
`
` Science Applications International Corp. (SAIC), Champaign, IL. Consultant, 2008. Ray-NURBS
`intersection.
`
` Adobe Systems, Inc., Seattle, WA. Visiting Researcher, 2007. Project: Rendering meshed objects as
`stylized vector art.
`
` The Teaching Company, Chantilly, VA. Consultant, 2003. Produced custom educational video elements
`on the platonic solids.
`
` Evans & Sutherland Computer Corp., Salt Lake City, Utah. Consultant, 1999-2000. Project: Design of
`the Evans & Sutherland Multi-Texturing Language.
`
` Blue Sky | VIFX, Inc., Culver City, California. Consultant, 1998. Project: development of a custom
`software plug-in for the Houdini procedural animation package to polygonize a feature film villain modeled
`as a complex implicit surface.
`
` Evans & Sutherland Computer Corp., (group formerly known as Silicon Reality, Inc.) Federal Way,
`Washington. Consultant, 1997-8. Project: design of graphics hardware to support antialiased procedural
`solid texturing.
`
` Kleiser-Walczak Construction Company (a visual effects production company). Lennox,
`Massachussetts. Consultant, 1992-1993. Project: development of a new fractal-based video transition effect
`for an attraction at the Luxor Hotel, Las Vegas.
`
` AT&T Pixel Machines. AT&T Bell Laboratories, Holmdel, New Jersey. Summer Intern, 1990.
`
`
`
`IBM T.J. Watson Research Center. Hawthorne, New York. Summer Intern, 1989.
`
`Expert Services
`
` ZiiLabs (subsidiary of Creative Technology). Graphics Hardware Expert on graphics hardware, 2015.
`Authored reports on validity and damages. Deposed on both July 2015.
`
` Graphics Property Holdings (formerly SGI). Graphics Hardware Expert on floating point rasterization,
`2013-2014. Authored report on patent validity. Deposed Feb. 2014. Testified to the International Trade
`Commission Apr. 2014.
`
` Microsoft XBox. Graphics Hardware Expert on deinterlacing, through Sidley Austin LLP, 2010. Authored
`reports on patent invalidity and non-infringement.
`
` NVIDIA & AMD (ATI), Graphics Hardware Expert on graphics card features, through Cooley Godward
`Kronish LLP, San Francisco. 2008.
`
` Broadcom. Graphics Hardware Expert on graphics accelerators, through McAndrews, Held & Malloy, Ltd,
`2006.
`
`Awards and Honors
`
` Outstanding Advisor. College of Engineering, 2010 and 2015.
`
` Winner. 2004 Fantasy Graphics League.
`
`John C. Hart
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` Listed. International Who's Who of Professionals, 1997.
`
` Champion. SIGGRAPH Bowl II, SIGGRAPH 94. Captain of the EVL Alumni Team.
`
` NSF Research Initiation Award. “Modeling, Rendering and Animation of Implicit Surfaces,” to support
`the generalization of methods developed for the visualization of fractal models to the more common
`implicit surfaces used in CAGD and entertainment, 1993.
`
` First Runner-Up. Truevision Videographics Competition, SIGGRAPH 90.
`
` Graduate Fellowship. Graduate College, University of Illinois at Chicago, 1990-1991.
`
`
`
` Research Funding 
`
`From Industry
`
`
`
`
`
`
`
`Intel. Intel Illinois Parallelism Center. $2,500,000, Co-PI, 2011-2012.
`
`Intel. Leveraging Larrabee’s Programmable Rasterization. $130,000, 2009-2011.
`
`Intel/Microsoft. Universal Parallel Computing Research Center. $18,000,000, Co-PI, 2008-2012.
`
` NAVTEQ. “Surface Classification and Reconstruction from LIDAR and images.” $60,000, 2008.
`
` Thomas M. Siebel. “MethMorph: Visual Simulation of Methamphetamine Addiction.” $35,000, Spring
`2006.
`
` NVidia Corp. $15,000 annually though the UIUC CS Affiliates Program, 2004–, and $125,000 total to
`date in Ph.D. student fellowships ($25K directly to the student to support one year of Ph.D. research): Nate
`Carr: 2002 & 2003, Jesse Hall: 2003 & 2004, Jared Hoberock: 2005 & 2008.
`
` Microsoft Research. “Precomputed Radiance Transfer Compression.” $15,000, Sep. 2002.
`
` Evans & Sutherland Computer Corp. “Real Time Procedural Solid Texturing.” $83,246, June 1999 –
`May 2000.
`
` Evans & Sutherland Computer Corp. and Washington Technology Center. “APST: Computer
`Graphics Hardware for Antialiased Procedural Solid Texturing.” $77,089. Aug. 16, 1998 - Aug. 15, 1999.
`
`
`
`
`
`Intel Natural Data Types Group. “Procedural Modeling.” $43,000. Aug. 16, 1997 - Aug. 15, 1998.
`
`Intel Natural Data Types Group. “Recurrent Modeling -- Beyond Fractal Block Coding.” (Co-PI with
`P. Flynn.) $93,000. Apr. 1, 1995 - Mar. 31, 1997.
`
`From Government Agencies
`
` NSF. #OCI-1216788 “Collaborative Research: Conceptualizing an Institute for Using Inter-Domain
`Abstractions to Support Inter-Disciplinary Applications” (Co-PI with David Padua and Philippe Geubelle,
`and other collaborators at Purdue and UT-Austin), $135,000, Oct. 2012 – indefinite.
`
` NSF. #EF-1115112 “Collaborative Research: Digitization TCN: InvertNet--An Integrative Platform for
`Research on Environmental Change, Species Discovery and Identification” (co-PI with Christopher
`Dietrich, Christopher Taylor, Nahil Sobh and Umberto Ravaioli), $2,809,463, July 2011-June 2015.
`
` NSF. #OCI-1047764 “SI2-SSE: Collaborative Research: Lagrangian Coherent Structures for Accurate
`Flow Structure Analysis” (co-PI with Shawn Shadden) $251,643, Sep. 2010 – Aug. 2013.
`
`John C. Hart
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` NSF. #IIS-0534485 “Analysis and Visualization of Complex Graphs” (co-PI with Michael Garland)
`$300,000, Sep. 2006 – Aug. 2009.
`
` UIUC Critical Research Initiative. “A New Approach to Bone Replacement.” (Co-PI with Russ Jamison,
`Michael Goldwasser, Ben Grosser, Matei Stroila and Amy Wagoner Johnson.) $100,000, Sep. 2005 – Aug.
`2006.
`
` NSF Small Grant for Exploratory Research. “Application Directed Surface Parameterization.” $97,868,
`Jan. 2005 – Dec. 2005.
`
` NSF/DARPA CARGO (Computational and Algorithmic Representations of Geometric Objects)
`Award. “Robust Lagrangian Surface Propagation with Topological Control.” (Lead PI, with Michael
`Heath, Jim Jiao and John Sullivan), $400,000, May 2003 – May 2006.
`
` NSF Information Technology Research. #NSG-0219594 “Making 3D Visibility Practical.” (Co-PI with
`Steve LaValle, Jeff Erickson, Fredo Durand) $499,923. Aug. 2002 – Aug. 2005.
`
` CNRS (Centre National de la Recherche Scientifique). Supplement to “Making 3D Visibility Practical”
`to support UIUC – INRIA collaboration, $7,000, 2003-5.
`
` NSF Information Technology Research. #ACI-0113968 “Multipass Programming for Personal High-
`Performance Computing.” $489,671, Aug. 2001 – July 2006.
`
` NSF Information Technology Research. #ACI-0121288 “Procedural Representation and Visualization
`Enabling Personalized Computational Fluid Dynamics.” (Co-PI with David Ebert, David Marcum, Kelly
`Gaither and Penny Rheingans) $3,989,773. Aug. 2001 – July 2006.
`
` NSF. #NSG-9732379 “Applications of Morse Theory and Catastrophe Theory to Computer Graphics.”
`(Co-PI with R. Lewis.) $220,541. Aug. 16, 1997 – Aug. 15 2000.
`
` NSF. #CCR-9529809 “Recurrent Modeling.” (Co-PI with P. Flynn.) $206,435. June 15, 1996 - May 31,
`1999. Research Experience for Undergraduates Supplement: $5,000. Jan. 1, 1998 - May. 31, 1999.
`
` NSF Research Initiation Award. #CCR-9309210 “Modeling, Rendering and Animation of Implicit
`Surfaces.” $97,925. July 1, 1993 - June 30, 1996. Research Experience for Undergraduates Supplement:
`$4,885. Jan. 1, 1995 - Dec. 31, 1995.
`
`Education Projects
`
` Nokia University Cooperation Funding. “Teaching Mobile Augmented Reality on the Windows Phone
`Platform.” $11,377.64. 2013.
`
` UIUC College of Engineering Strategic Instructional Initiatives Program. Improvement of key ME
`courses (Statics, Dynamics and Solid Mechanics), $450,000, with MechSE Profs. Tortorelli, Dullerud
`Keane and West, 2012-2014.
`
` NSF Special Project. #EIA-9911033 “The Story of Computer Graphics Documentary Project.” $48,000.
`Sept. 15, 1999 – Aug. 31, 2000.
`
`Equipment Grants and Donations
`
` Nokia. Two Velodyne LIDAR scanners, 2013.
`
` NVidia. K20 graphics card, 2012.
`
`
`
`
`
`Intel. Dell XPS 12, $1,000, 2012.
`
`Intel. Two Knights Ferry development workstations, $4,940, 2009.
`
` NVidia. Various graphics cards, 2002-4.
`
`John C. Hart
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` AST Exhibit 2001
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`
` ATI. One graphics card, 2002.
`
` Tektronix Phaser 340 Color Printer. Tektronix. $5,000. Oct. 1995.
`
` High-Performance Networking and Computing Infrastructure for Imaging Research. (Co-PI with
`T. Fischer, P. Flynn and R. Bamberger.) NSF Research Instrumentation and Infrastructure. CISE
`Instrumentation Program, Office of Cross-Disciplinary Activites. $100,000. March 1, 1994 - April 30,
`1996. Awarded: Jan. 1995.
`
` Silicon Graphics Inc. Workstation Upgrade. $9,000. Apr. 1993.
`
` XAOS Tools. Software Donation. Pandemonium and n-title. $6,500. Feb. 1993.
`
` Karen Guzak. Art Donation. 12 Prints. $4,800. May 1995.
`
`
`
` Publications 
`
`Most of the following publications are available online via
`http://graphics.cs.illinois.edu/~jch/papers.
`
`Reviewed Publications
`
`1. M. Chen, S. Shadden and J.C. Hart. “Fast Coherent Particle Advection through Time-Varying Unstructured
`Flow Datasets.” To appear: IEEE Transactions on Visualization and Computer Graphics, 2016.
`
`2. M. Chen, J.C. Hart and S. Shadden. Hierarchical Watershed Ridges for Visualizing Lagrangian Coherent
`Structures. Presented at TopoInVis: Topology-Based Methods in Visualization, 2015. To appear: Springer
`Mathematics + Visualization Series.
`
`3. J. Kratt, M. Spicker, A. Guayaquil, M. Fiser, S. Pirk, O. Deussen, J.C. Hart, B. Benes. Woodification: User-
`Controlled Cambial Growth Modeling. Proc. Eurographics, Computer Graphics Forum 23(2), May 2015, pp.
`361-372.
`
`4. V. Lu, J.C. Hart. Multicore Construction of k-d Trees for High Dimensional Point Data. Proc. Advances in Big
`Data Analytics, July 2014.
`
`5. P.R. Khorrami, V.V. Le, J.C. Hart, T.S. Huang. A System for Monitoring the Engagement of Remote Online
`Students using Eye Gaze Estimation. Proc. IEEE ICME Workshop on Emerging Multimedia Systems and
`Applications, July 2014.
`
`6. V. Lu, I. Endres, M. Stroila and J.C. Hart. Accelerating Arrays of Linear Classifiers Using Approximate Range
`Queries. Proc. Winter Conference on Applications of Computer Vision, Mar. 2014.
`
`7. D. Mayerich, J.C. Hart, Volume Visualization of Serial Electron Microscopy Images Using Local Variance.
`Proc. BioVis (IEEE Symposium on Biological Data Visualization), pp. 9-16, Oct. 2012
`
`8. C. Dietrich, J. Hart, D. Raila, U. Ravaioli, N. Sobh, O. Sobh, C. Taylor. InvertNet: a new paradigm for digital
`access to invertebrate collections. ZooKeys 209, July 2012, pp. 165-181.
`
`9. Y. Jia, M. Garland, and J.C. Hart. Social Network Clustering and Visualization using Hierarchical Edge
`Bundles. Computer Graphics Forum 30(8), Dec. 2011, pp. 2314–2327.
`
`10. Y. Jia, V. Lu, J. Hoberock, M.J. Garland, J.C. Hart. Edge v. Node Parallelism for Graph Centrality Metrics.
`GPU Computing Gems – Jade Edition, Oct. 2011, pp 15-28.
`
`11. M. Kamali, F.N. Iandola, H. Fang, J.C. Hart. MethMorph: Simulating Facial Deformation due to
`Methamphetamine Usage. Proc. International Symposium on Visual Computing. Sep. 2011.
`
`John C. Hart
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`
`12. M. Kamali, J. Cho, M. Stroila, E. Shaffer, J.C. Hart. Robust Classification of Curvilinear and Surface-like
`Structures in 3D Point Cloud Data. Proc. International Symposium on Visual Computing. Sep. 2011.
`
`13. M. Kamali, E. Ofek, F. Iandola, I. Omer, J.C. Hart Linear Clutter Removal from Urban Panoramas. Proc.
`International Symposium on Visual Computing. Sep. 2011.
`
`14. K. Karsch, J.C. Hart. Snaxels on a Plane. Proc. Non-Photorealistic and Artistic Rendering, Aug. 2011.
`
`15. J. Hoberock, J.C. Hart. Arbitrary Importance Functions for Metropolis Light Transport. Computer Graphics
`Forum 29(6), 2010, pp. 1993-2003.
`
`16. S. Shi, M. Kamali, K. Nahrstedt, J.C. Hart, R. Campbell. High-Quality Zero-Delay Remote Rendering System
`for 3D Video. Proc. Multimedia, Oct. 2010.
`
`17. B. Choi, R. Komuravelli, V. Lu, H. Sung, R.L. Bochino, S.V. Adve, J.C. Hart. Parallel SAH k-D Tree
`Construction. Proc. High Performance Graphics, June. 2010.
`
`18. Y. Jia, X. Ni, E. Lorimer, M. Mullan, R. Whitaker, J.C. Hart. RBF Dipole Surface Evolution. Proc. Shape
`Modeling International, June 2010.
`
`19. W.-W. Feng, B.-U. Kim, Y. Yu, L. Peng, J.C. Hart, Feature-Preserving Triangular Geometry Images for Level-
`of-Detail Representation of Static and Skinned Meshes, ACM Transactions on Graphics 29(2), March 2010,
`Article 11.
`
`20. J. Hoberock, V. Lu, Y. Jia, J.C. Hart. Stream Compaction for Deferred Shading. Proc. High Performance
`Graphics, Aug. 2009.
`
`21. J.C Hart. Assistive Technology for the Aesthetically Impaired. Proc. CHI Workshop on Computational
`Creativity Support, Apr. 2009.
`
`22. J. Hoberock, S. Hornus, J.C. Hart. On Constructing and Visualizing the Topological Structure of the Visibility
`and Radiance of Architectural Models. Proc. TopoInVis: Topological Methods in Data Analysis and
`Visualization, Feb. 2009.
`
`23. Y. Jia, J. Hoberock, M. Garland, J.C. Hart. On the Visualization of Social and other Scale-Free Networks.
`(Proc. Infovis), IEEE Transactions on Visualization and Computer Graphics 14(6), Nov. 2008, pp. 1285-1292.
`
`24. A. Godiyal, J. Hoberock, M. Garland, J.C. Hart. Rapid Multipole Graph Drawing on the GPU. Proc. Graph
`Drawing, Sep. 2008.
`
`25. E. Eisemann, H. Winnemoller, J.C. Hart, D. Salesin. Stylized Vector Art from 3D Models with Region Support.
`(Proc. Eurographics Rendering Symposium), Computer Graphics Forum 27(4), June 2008, pp. 1199-1207.
`
`26. M. Stroila, E. Eisemann, J.C. Hart. Clip Art Rendering of Smooth Isosurfaces. IEEE Transactions on
`Visualization and Computer Graphics 14(1), Jan. 2008, pp. 71-81.
`
`27. H. Fang, J.C. Hart. Detail Perserving Shape Deformation in Image Editing. Proc. SIGGRAPH, ACM
`Transactions on Graphics 26(3), Aug. 2007, #12.
`
`28. T. Bergstrom, K. Karahalios, J.C. Hart. Isochords: Visualizing Structure in Music. Proc. Graphics Interface,
`May 2007.
`
`29. H. Fang, J.C. Hart. RotoTexture: Automated Tools for Texturing Raw Video. IEEE Transactions on
`Visualization and Computer Graphics 12(6), Nov. 2006, pp. 1580-1589.
`
`30. X. Jiao, A. Colombi, X. Ni, J.C. Hart. Aniso