Conference Materials
`
`Fairmant Hotel, San Jose
`October 10-11, 1995
`
`Spansaredhy
`MIERODESIGN
`
`Petitioners HTC & LG - Exhibit 1034, p. 1
`
`

`
`
`
`3230
`
`8:40
`
`AGENDA
`
`WELCOME Michael Slater
`
`KEYNOTE: SEMICONDUCTOR TECHNOLOGY AND THE GROWTH OF THE PC INDUSTRY
`Craig Barnett, late!
`
`9:20
`
`X85 MICROPROCESSORS Moderator: Michael Slater, M icroDesign Resources
`
`Shifting Sands in the X86 Landscape
`Michael Slater
`
`P6: The Myths and Realities
`Robert Colwell, Intel
`
`10:00
`
`BREAK: SPONSORED BY NEC ELECTRONICS
`
`AMD-K5 Performance and Microarchitecture Tradeoffs
`David Witt, AMD
`
`Optimizing the M1 for Windows 95
`Mark Bluhm, Cyrix
`
`_ Overview of the Nx6B6 Processor
`
`I Greg Favor: Ne7cGert
`
`QSIA Panel
`All Speakers above
`LUNCH
`
`Market Trends for x86 Microprocessors
`Aaron Goldberg, Computer Intelligence lnfoCorp
`
`12:00
`
`1:10
`
`1:30
`
`PROCESSORS FUR MULTIMEDIA Moderator: Yong Yao, MicroDest'gn Resources
`
`Implementation Strategies for Multimedia
`Yong Yao
`
`Architecture of a Broadband Mediaprocessor
`John Moussouris, MicroUnity
`
`A VLIW and SIMD Vector Processor for PC Multimedia
`Stephen Purcell, Chromatic
`The TriMedia VLIW-Based PCI Multimedia Processor
`Gen-it Slavenburg, Philips Semiconductors
`BREAK: SPONSORED BY LSI LOGIC
`
`Ii-‘l.EA.S.'I': A Highly Parallel. Scalable, Single-Chip DSP
`Gerald Pechanelz, IBM Micmelectrontcs
`
`UltraSPARC's Instruction Set Extensions for Multimedia
`Marc Trembloy, Sun Microsystems
`A Multimedia 536 Processor for Consumer PCs
`Forrest Norrod. Cyrix
`
`QSIA Panel
`All speakers about
`MICROPROCESSOR REPORT AWARDS
`Nick Tredennick, Tredenniciz, Inc.
`
`2:50
`
`3:10
`
`5:00
`
`5:30
`
`RECEPTIONILITERATURE 8: DEMONSTRATION CENTER OPENING
`
`3:30PM-10:30PM
`
`AFFINITY SESSIONS
`
`Open Session on Cryptography
`
`Benchmarks 5: Workloads Roundtable
`
`Packaging Technology Directions
`
`The Issue of Branding Microprocessors
`
`Sponsored by
`IVIICRODESIGN
`
`
`1995 Microprocessor Forum
`
`Page 2 of 16
`
`Petitioners HTC & LG - Exhibit 1034, p. 2
`
`1
`
`Petitioners HTC & LG - Exhibit 1034, p. 2
`
`

`
`AGENDA
`
`DAY TWO Wednesday, October 11
`
`EMBEDDED PROCESSORS
`
`Moderatofljames L. Turley, MicroDesEgn Resources
`
`Ubiquitous Computers: The New Embedded Applications
`James L. Turley
`
`Bringing RISC Technology to Communications
`Robert 0'Dell, Motorola
`
`An Integrated i960 to Enhance Server and Network I/0
`Elliot Gorbus, Intel
`
`
`
`SH-DSP 51: SH-FPU: Optimized Communication 6: Consumer Microprocessors
`Jim Slager; Hitachi
`
`St!'oI'.lgARM Reaches for Ever Higher Performance
`Rich ‘Mick, Digit-(Ii
`
`10:20
`
`BREAK: SPONSORED BY FUJITSU MICROELECTRONICS
`
`A Scalable 64-bit RISC for Custom Designs
`Bob Caulk, L5: Logic
`
`A Power-PC Core for Cost-Sensitive Consumer Applications
`Kim O’Dom1ell, IBM
`
`A Next-Generation DSP Solution for Communications Applications &‘ Beyond
`Roman Robles, Motorola
`
`12:00
`
`1:10
`
`QSIA Panel
`
`All speakers above
`
`LUNCH
`
`HIGH-PERFORMANCE RISC MICROPROCESSORS
`
`Moderator: Linley Gwemmp, MicroDesig11 Resource:
`RISC Processors: Generations
`
`Linley Gwennap
`
`PA—73ODLC: A Highly Integrated System on a Chip
`Tom Meyer; Hewlett-Pacliartl
`
`The Performance of PowerPC 603a and 604-e Microprocessors
`Kaivaiya Dtxit, IBM
`Colorado 4 Extends 32-bit SPARC Performance
`
`2:30
`
`Mitch Aisup, Ross Technology
`BREAK: SPONSORED BY MIPS TECHNOLOGIES
`
`Ultra.SPARC1: Advancing SPARC Perlormartce
`Anant Agrawal, Sun Microsystems
`
`Alpha 11 164A: Continued Performance Leadership
`Pete Barman, Digital Semiconductor
`
`4:10
`
`Q&A Panel
`All speakers above
`PANEL: FUTURE OF MICROFROCESSOR SYSTEM ARCHITECTURE
`Moderator: Michael Slater
`
`Dirk Meyer; Digital
`Lin Nease, Hewlett-Pachni
`Dan North, Apple
`
`Richard Oeihler; IBM
`Fred Pollac lr, Intel
`George White, Corollary
`
`5:00
`
`5:10
`
`WRAP-UP Michael Slater
`
`CONFERENCE HDJOURNED
`
`Sponsored by
`MICRODESIGN
`RESOURCES
`
`1995 Microprocessor Forum
`
`Page 3 of 16
`
`Petitioners HTC & LG - Exhibit 1034, p. 3
`
`Petitioners HTC & LG - Exhibit 1034, p. 3
`
`

`
`0 speaker biographies
`
`Michael Slater, moderator
`Founder and President of MicroDesign Resources, Michael
`Slater serves as the Editorial Director and Publisher of
`
`Microprocessor Report and Director of the Microprocessor
`Forum. He is internationally recognized as a leading authority
`on microprocessor technology and system trends. Michael has
`lectured at Stanford University, Santa Clara University, and
`National Technological University. He has presented hundreds
`of seminars and consults regularly for companies including
`IBM, Apple, Sun. Intel, Motorola. AMD, Amdahl, Digital, and
`Tektronix. He is a columnist for Electronic Engineering Times,
`Nikkei Electronics Asia, and Computer Shopper, and he has writ-
`ten for many computer publications.
`
`Linley Gwennap, moderator
`is Editor-in-Chief of Microprocessor Report and Director of
`Product Development for MicroDesign Resources. He joined
`MDR i.n 1992 after eight years at Hewlett-Packard working on
`RISC systems. His positions at HP included Product Manager
`for the HP PA71DD microprocessor. Program Manager for the
`HP9000 model 815, and System Designer for the HP90flU model
`870. He currently consults on microprocessor developments and
`strategies for leading processor and system vendors.
`
`James Turley, moderator
`Senior Analyst and Senior Editor of Microprocessor Report, spe-
`cializing i.n high-performance embedded microprocessors, Jim
`joined MDR i.n 1994 after devoting more than a dozen years to
`design engineering, engineering management, product market-
`ing, and program management. He has designed embedded
`processors into a variety of products and developed both hard-
`ware and software for leading companies around Silicon Valley
`and in Europe. He has also conducted numerous seminars and
`training courses.
`
`Yong Yao, moderator
`Director of the Technology Roadmap Service and Senior
`Analyst for PC technology for Microprocessor Report, is the most
`recent addition to the MicroDesign Resources staff of analysts.
`Prior to joining MDR, Yong was with Vitesse Semiconductor,
`where he was the director of product planning as well as the
`designer of the multiprocessor V-Bus.
`
`Craig Barrett, keynote speaker
`is Executive Vice President and Chief Operating Ofiicer of Intel
`Corporation, having corporate-wide responsibility for internal
`operations of the company. He joined Intel in 1974 and served
`in various technical and business management positions. In
`1984 Dr. Barrett was named a Vice President. and he became
`General Manager of the Components Technology and
`Manufacturing Group in 1985. Dr. Barrett was named a Senior
`Vice President in 1987 and became comanager of the
`Microcomputer Components Group in 1989. He was promoted
`to the post of Executive Vice President in 1990. Dr. Barrett was
`elected to the Board of Directors in 1992 and was named Chief
`
`Operating Officer in Ianuary 1993.
`
`Anant Agrawal is Vice President of Engineering for Sun's
`SPARC Technology Business. He has been involved in the
`design and development of the SPARC microprocessors at Sun
`since 1984.
`
`for its
`Mitch Alsup is ROSS Technology's Cl'liEfAICl'lit€CI
`SPARC CPU product line. Mitch joined ROSS in 1991 from
`Motorola, where he was the Architect of Motorola’s 88000.
`
`Peter Batman is a Consulting Engineer with Digital
`Semiconductor, Pete has participated in the design or verifica-
`tion of several microprocessor chips and was a member of the
`Alpha 21164 architecture team.
`
`is the Chief Architect of Cyrix's M1 as well as director
`Mark Bllllilll
`of engineering responsible for all future superscalar processors. As one
`of Cyri.x's initial design engineers, Mark helped define and design sev-
`eral generations of wholly original x86 processors and math coproces-
`sors.
`
`Bob caulk has spent the last six years at LSI Logic leading
`architecture definition and product development for LS1’s MIPS
`RISC processor family of embedded cores and derivative
`products.
`
`Robert colwell manages the P6 architecture organization at
`Intel. Bob joined Intel in 1990 as a Senior Architect on the P6
`project. and became manager of the architecture group two
`years later. Prior to Intel he was a CPU architect at Multiflow
`Computer.
`
`Kalvalya Dixlt is IBM's Director of Perfomance. Previous to
`joining IBM, he was Engineering Program Manager at SUN
`Microsystems.
`
`Gregory FEW! is NexGen’s Director of 686 Processor
`Development. Previous to his appointment to the Director
`position he was the Chief Processor Architect.
`
`Elliot Garbrs is Strategic Development Manager i.n Intel's
`Semiconductor Products Group. Elliot has participated in the
`definition of the three generations of 80960 microprocessor
`products. He is currently working on products to enhance the
`U0 performance of servers.
`
`Aaron Goldberg is Executive Vice President of Computer
`Intelligence InfoCorp. Prior to joining InfoCorp in 1992. Aaron
`was Senior Vice President ofthe Desktop Computing Group at
`lntemational Data Corporation.
`
`Dllk M838! is the Lead Architect of Digital's third-generation
`high-end Alpha microprocessor. Dirk was a co-microarchitect
`of Digital’s first-generation Alpha 21064 microprocessor and an_
`original member of the Alpha CPU team.
`
`Tom Meyer is currently a member ofHewlett-Pacl<ard’s
`Systems Technology Division and Project Manager for the
`PA730I}LC integrated memory and IIO controller. Previously he
`worked on the PA7IDOI.C and the memory controller for sever-
`al of the HP9{}U0 Series computers.
`
` Page4of1
`
`Petitioners HTC & LG - Exhibit 1034, p. 4
`
`Petitioners HTC & LG - Exhibit 1034, p. 4
`
`

`
`Jim Slager specializes in microprocessor and multimedia prod-
`ucts, Iim is Director of Advanced Product Planning at Hitachi
`Micro Systems. He participated in the design of the 286, 386,
`and 486 at Intel and was involved in SPARC design at Sun
`Microsystems.
`
`Genil: Slavenbelg Chief Scientist, Trilvledia technology, for
`Philips Semiconductors, Gert is responsible for development of
`current and future Trilvledia products.
`
`Nick Tredennick is President of Tredennick, Inc. He created the
`logic design for the 68000 at Motorola and for the Microl'370
`microprocessor at IBM.
`
`Marc Tremblay, as a computer architect involved in the
`research and development of high-perforrnance processors at
`Sun Microsystems Marc’s main contributions have focused on
`the microarchitecture definition and performance evaluation
`for the 64-bit UltraSPARC Processor.
`
`Geolge White, a cofounder and President of Corollary, George
`has pioneered a new category of computer, the PC-compatible
`multiprocessor system. He was instrumental in the develop-
`ment of the NuBus and was the chairman of the IEEE commit-
`tee that standardized the NuBus.
`
`Rich Wltek, a principal designer of the Alpha architecture and
`co-architect of the first Alpha chip, Rich is currently the Chief
`Architect for the StrongARM microprocessor family at Digital.
`
`David will is a Product Development Manager at AMD, where
`he is in charge of the Argoni'K7 processor development. David
`was in charge of the K5 development effort at AMD, where he
`has been working for the past 11 years.
`
`speaker biographies
`
`ldil MOIISWIIIIS is President a.nd CEO of MicroUnity Systems
`Engineering, which he founded in 1988. Prior to that John was
`Vice President of VLSI Development at MIPS Computer Systems.
`
`l.ll‘I Nease has been a System Architect for several of Hewlett-
`Pacl-tard’s UNIX server products. including the G-, H-, and 1-
`class midrangeflow-end systems. He has been involved in the
`development of HP's commercial UNIX servers since the
`advent of that product line.
`
`Forrest Norrod is Program Manager and Principal Architect of
`the multimedia 586 CPU at Cyrix. Prior to joining Cyrix in
`1993, Forrest was with Hewlett-Packard, where he designed
`advanced SD graphic systems.
`
`Don North has been associated with the Advanced Technology
`Group at Apple since its inception in 1985, and currently man-
`ages a systems architecture research group. His current research
`interests include high-performance system interconnect issues
`and multiprocessor systems architecture.
`
`RlCl'|3l'd Oehler is the Director of Systems Software in the
`Power Personal Systems Division at IBM. In over 20 years with
`IBM he has been involved in development of the 801, the first
`RISC machine, was lead architect for the the RISC System!6000,
`and is responsible for all dealings on PowerPC. In 1994 Rich
`became an IBM Fellow.
`
`Robert 0’Dell has played a significant role in the definition of
`Motorola's integrated communications controller family of
`products. Robert is currently the Applications Manager for the
`Data Communications Operation in the High Performance
`Embedded Systems Division of Motorola’s Semiconductor
`Products Sector.
`
`Kim O'Donnell, as Senior Engineering Manager for IBM. is
`responsible for the design and development of the IBM
`PowerPC 400 Series of Embedded Controllers.
`
`GOING Peehalek, at IBM Microelectronics Mwave group, is
`involved in the research and development of parallel computer
`architectures for graphics-, video—, neural-, and signal-process-
`ing multimedia applications.
`
`Fred Pollack is director of the group responsible for all Intel
`platform architecture and performance analysis. He also directs
`the planning for Intel’s future microprocessors. Prior to this, he
`was the manager of the P6 architecture. In January of 1993 he
`was promoted to an Intel Fellow, one of nine in the company.
`
`Stephen PIIICOH is co-founder of Chromatic. He was previous-
`ly a founder and Chief Architect at C-Cube Microsystems where
`he created the architecture for four generations of video
`CODECs, including the VideoRISC processor.
`
`ROITH1 Robles is manager of Motorola's 24- and 32-bit DSP
`applications group. He has worked in Motorola's DSP applica-
`tions group for the past five years, focusing primarily on
`Motorola’s industry-standard 24-bit DSP5600D architecture and
`applications.
`
`Page 5 of 16
`
`Petitioners HTC & LG - Exhibit 1034, p. 5
`
`MICROPROCESS
`
`M
`
`
`
`Petitioners HTC & LG - Exhibit 1034, p. 5
`
`

`
`
`
`The TriMedia VLIW-Based
`
`PCI Multimedia Processor
`
`___________________________________________________________________ H...
`
`Gerrit Slavenburg
`Philips Semiconductors
`
`Sponsored by
`
`MICRODESIGN
`
`Page 6 of 16
`
`12
`
`Petitioners HTC & LG - Exhibit 1034, p. 6
`
`Petitioners HTC & LG - Exhibit 1034, p. 6
`
`

`
`The Trirnedia VLIW-Based PCI Multimedia Processor
`
`The Trimedia VLIW-based PCI
`
`Multimedia Processor System
`
`Gerrit Slavenburg - Philips Semiconductors
`
`TM-1 : outside
`
`- mu!!!-standard, as In "any"
`Video and Audio [de}compression
`
`3D graphics
`customer programmable, using
`standard c
`
`CCIFI E01:'656
`
`cc"; 501555
`YUV 4-:2:2
`
`Microprocessor Forum
`
`12-1
`
`October 10-] 1, 1995
`
`Page 7 of 16
`
`Petitioners HTC & LG - Exhibit 1034, p. 7
`
`Petitioners HTC & LG - Exhibit 1034, p. 7
`
`

`
`The Trimedia VLIVV—Based PCI Multimedia Processor
`
`TM-1 configurations
`
`accellerator
`
`(dig) vcn
`TV monitor
`
`stand alone
`
`TV monitor
`
`TM-1 : inside
`
`Serial
`digital audio
`
`synchronous
`serial Vi for
`\d'.34:1SDN
`
`:|'-‘GI lnuur ftlnuo hridgl
`
`Microprocessor Forum
`
`12-2
`
`October 10~11, 1995
`
`Page 8 of 16
`
`Petitioners HTC & LG - Exhibit 1034, p. 8
`
`Petitioners HTC & LG - Exhibit 1034, p. 8
`
`

`
`The Trimedia VLIVV-Based PCI Multimedia Processor
`
`TM-1 Functional
`
`hardware
`
`hardware
`
`Video DMA in=
`.=. CClFlED1l'656 vuv 4:2:2 input
`9 horizontal scaling by 1:1 or 2:1
`
`Video DMA out:
`a cclnsousse vuv 4:2:2 out
`-»:- horizontal scaling by 1:1 or 1:2
`-:- graphics overlay (alpha blending)
`Image co-process°r
`.9 memul.y_t°_mamoI.y
`e memory to PCI windows, with YUV to FIGS
`-9 V resizing. H resizing
`VLD co-processor
`_
`4- memory-to-memory de-tokenize
`-9 MPEG-2, MPEG-1 sliceitime
`
`Audio DMA infout:
`4, 5 0,“; hi,
`_,, mom, 9,. stereo
`
`4- programmable 0 - 80 kHz sampling
`sgftware
`
`l'|'|Ulti't3Skin9 in C 0" DSPCPU3
`-9'
`CDf'I'Ipl'E35iOI"l (flfly standard)
`‘P
`decompression (any standard)
`I?
`an graphics
`'3-
`5733"‘ °°""°'
`° P0 ‘W 3"""’°"
`using powerful custom multimedia
`operations
`
`TM-1 Highway Arbitration
`
`-a- software assigns bandwidth to each master
`
`4- every master is guaranteed:
`— minimum bandwidth as assigned
`— associated max. latency
`-:- all unused bandwidth is available:
`
`— to the D5PCPUl‘caches within 1 cycle
`— to any other master within a few cycles from request
`
`this is an essential function for audiolvideo
`
`Microprocessor Forum
`
`12-3
`
`October 10-11, 1995
`
`Page 9 of 16
`
`Petitioners HTC & LG - Exhibit 1034, p. 9
`
`Petitioners HTC & LG - Exhibit 1034, p. 9
`
`

`
`The Trimedia VLIVV-Based PCI Multimedia Processor
`
`Image Co-Processor capabilities
`
`+ unlimited number of
`live video windows
`+ arbiuary I-l & V scaling
`using quality filters
`+ can drive RGB or YUV
`
`graphics cards
`+ up to SD Mpixelfsec refresh
`
`AudioNideo synchronization
`
`Video In :
`Video Out :
`
`Audio In,
`
`carneraioutside world is pixel clock master
`programmable 10 MHz - 38 MHz, resolution 0.02 Hz
`(very low jitter synthesizer}
`
`Audio Out:
`
`programmable 256 or 3B4t. of 0 - 20 MHz, 0.02 Hz
`
`synchronization is achieved by software PLL’s that vary the sampling
`trequencieslphase by minute amounts. This powertul method is universal
`and avoids application specific external hardware.
`
`Microprocessor Forum
`
`12-4
`
`October 10-11, 1995
`
`Page 10 of 16
`
`Petitioners HTC & LG - Exhibit 1034, p. 10
`
`Petitioners HTC & LG - Exhibit 1034, p. 10
`
`

`
`The Trimedia VLIVV-Based PCI Multimedia Processor
`
`TM-1 DSPCPU block diagram
`
`TM-1 DSPCPU functional units
`
`Fllnntinnnl Unit
`
`Lalenttv
`
`Recnveru Time
`
`constant
`
`integer ALU
`lnadlstnre
`
`DSP ALI]
`
`DSP MI IL
`shifter
`hrnncl-I
`
`intlflnaf. mnl
`
`float. A I .1!
`
`flnat mmnare
`
`fl oat sn rtldiv
`
`—n—It-Jk-.I'4-Il:-£|l.-‘|k~.'It-.i‘..l|tl"|
`
`3-nuu'.n—-:uu'.n---
`
`%-dfidfifinfijfiii
`
`—t
`
`Microprocessor Forum
`
`12-5
`
`October 10-11, 1995
`
`Page 11 of 16
`
`Petitioners HTC & LG - Exhibit 1034, p. 11
`
`Petitioners HTC & LG - Exhibit 1034, p. 11
`
`

`
`The Trimedia VLIW-Based PCI Multimedia Processor
`
`TM-1 instruction format
`
`9 5 operations Issued every clock cycie (1 D nsec)
`
`o Functional units are pipelined — each can start one operation per cycle
`¢ Issue slots are “guarded" for branch avoidance, delay slot utilization
`9 lnterruptable opcodes facilitate lightweight context switching
`9 Instructions compressed in memory and lcaohe, clecompressed on the fly
`
`isul:
`
`store
`
`iadd
`
`ume-Bil
`
`ifirfiil
`
`Trimedia programmer's model
`
`registers
`
`memory map
`.
`
`262
`
` }
`
`programmable base
`
`programmable base
`
`Microprocessor Forum
`
`12-6
`
`October 10-11, 1995
`
`Page 12 of 16
`
`Petitioners HTC & LG - Exhibit 1034, p. 12
`
`Petitioners HTC & LG - Exhibit 1034, p. 12
`
`

`
`The Trimedia VLIW-Based PCI Multimedia Processor
`
`Trimedia operation examples
`
`Typical 32 bit FIISC CPU operations
`-:- Integer, unsigned, logical, floating point (32 bit IEEE compatible)
`-2- Conditional branches
`«:- Lcadslslores with address modes
`
`Typical 8, 16 and 32 bit DSP operations
`«:- Saturation arithmetic (add, multiply-add, ...)
`
`Branch-avoiding operations
`-3» Min, max
`
`-:- Select one of two operands depending on a third
`(implemented as branch-free three-operation sequence)
`
`35 Multimedia-enhancing operations
`-:- meB(abcd,efgh)
`la-el+|b-il+|c-gI+ld-hl
`(motion estimation)
`-:- fir16(ab,cd} Dual multiply-add —ac+bd
`(FIFI filters)
`4- quadavg(abcd,efgh)
`2:31’ 32:11, 2:91’ tiigtisubsampling fillers}
`2
`2
`2
`
`TM-1 DSPCPU key features
`
`dual bytesex, determined by PCSW flag
`
`byte addressed memory, natural alignment required
`
`speculative loads & floating point supported
`
`precise IEEE exceptions, even when using speculation
`
`5 opslcycle, sustained
`
`- conditional (guarded) execution of each operation
`
`compressed, byte aligned VLIW instructions
`
`' vectored interrupts, zero overhead enterfreturn
`— compiler inserts interruptable points
`— CPU can handle simple interrupts at > 100 kHz with low loading
`
`instruction 8: data (addresslvalue) breakpoint hardware
`-:- level-1 boot from 120 resident serial xxFiOll.-l
`
`Microprocessor Forum
`
`12-7
`
`October 10-11, 1995
`
`Page 13 of 16
`
`Petitioners HTC & LG - Exhibit 1034, p. 13
`
`Petitioners HTC & LG - Exhibit 1034, p. 13
`
`

`
`The Trimedia VLIW-Based PCI Multimedia Processor
`
`Example TM-1 (simplified to 3lcycle)
`
`cycle
`
`101
`
`102
`
`103
`
`104
`
`105
`
`106
`107
`
`#13—>r11
`
`ld32 rl2(4)—>r13
`
`me8 rl01,rlI}0—>r14
`
`ileq r11,r15—>r11
`
`iaddi 112,220->rl7
`
`#LABEL—):-18
`
`r11:st32 r12(8) 1-14
`
`ld32x r17,r19 —>r16
`
`cjmpt rl1,r18
`
`bitinv r1l—>r2l
`
`r11:st32 r12(12) 1'13
`
`1-11:me8 r99,r98->r42
`
`r21:st32 rl2(l2) r17 r2l:fir8 rl01,r102->r23
`
`r11:n1e8 r9'7,r96—>1-43
`
`r2l:fir8 r103,1'16—>r25
`r21:#1234—>r24
`fir8 rl04,r105—>r26 fi1'8 r106,r107 -H27
`
`1'11:n1e8 r95,r94->1‘-44
`iadd r42,r43—>r45
`
`107
`
`mt-.8 r93,r92—)r45
`
`Ine8 r91,r90—)r46
`
` %rl8
`
`TM-1 system key stats
`
`0 consumer electronics price level, ranging to sub $50
`9 Early Access Program:
`— software development tools (now)
`— samples 02 '96
`9 application performance:
`—- HPEG-2 main level. main profile, 15 Mhitlsec.
`Video+Audio-rsystem decoding
`— H.320 coder: Video-I-Audio
`— H.324 cndac Video-+Aud[o+sofl:ware V34 modem
`
`— any custom WA algorithms with similar compute requirements
`
`v
`0 typical 4 W (6 100 MHZ, 3.3 V)
`. l}.5u OM05, 4L metal with shrink to 0.35:: to follow
`
`0 available in 240 pin EDGUAD or SuperBGA package
`
`Microprocessor Forum
`
`12-8
`
`October 10-11, 1995
`
`Page 14 of 16
`
`Petitioners HTC & LG - Exhibit 1034, p. 14
`
`Petitioners HTC & LG - Exhibit 1034, p. 14
`
`

`
`The Trimedia VLIW-Based PCI Multimedia Processor
`
`Software development
`
`‘human assisted microcode compilation’
`
`oz» sophisticated compilerfdehugger environment
`
`-:- compile, run, recompile for automatic fine grain
`parallelization
`
`-> programmer feedback (where is time spent, where is
`parallelism limited)
`
`TM-1 Innovations
`
`-9 very high performance CPU on a chip at a consumer
`price point
`— enhanced VLIW architecture with conditional execution
`
`— VLIW instruction compression : sub FIISC code size
`— multimedia operation set based on actual application ports
`— zero overhead interrupt handling
`— sophisticated compiler: profile driven program transformation and
`instruction scheduling
`
`-:- complete audiofvideo system -1- CPU on single chip
`— software controlled Audloflfideo synchronization
`— DMA mastering U0 units
`— DMA mastering co-processors (image & VLD co-processor}
`
`-:- 100 MHz SDI-‘IAN! interface, under worst-case conditions
`
`Microprocessor Forum
`
`12-9
`
`October 10-11, 1995
`
`Page 15 of 16
`
`Petitioners HTC & LG - Exhibit 1034, p. 15
`
`Petitioners HTC & LG - Exhibit 1034, p. 15
`
`

`
`The Trimedia VLIW-Based PCI Multimedia Processor
`
`Trimedia
`
`A “Family” of software compatible media processors
`a:- continuous renewal of CPU cores
`
`-:- interfaces addressing different market segments (PC, settop, TV, ..)
`-no mainline 8: derivative product strategy
`-:- a single architecture for all audio, video, graphics, communication, user-
`interface and system control
`
`Superior flexibility and programmability
`-r- "Any" compression standard
`
`-:- All programming In Standard 0
`-as Appllcationsfllbraries available for Audio, Video, Graphics
`
`-:- SUN and PC hosted programming environment
`-:- Automatic fine-grain parallelizaticn
`' Sophisticated source-ievel debugging of Device Under Test
`
`Microprocessor Forum
`
`12-10
`
`October 10-11, 1995
`
`Page 16 of 16
`
`Petitioners HTC & LG - Exhibit 1034, p. 16
`
`Petitioners HTC & LG - Exhibit 1034, p. 16