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`USUOS7‘J7(}28A
`[11] Patent Number:
`5,797,028
`1451 Date of Patent:
`Aug. 18, 1998
`
`
`
`
`ssmoa
`319x202
`.. 36-9489
`
`511993 Kihara el a1.
`S21o.so6
`5.434.913 M995 "lung :21 a1.
`5.5933‘)!
`111997 Muyshondt et al.
`OTHER PUBLICATIONS
`PCI Local Bus~PC1' Multimedia Design Gu:‘dc——Revision
`1.0—Mar. 29. 1994. 43 pages.
`Primary Examfmn-——Iohn E. Hairity
`Aftonae}; Agent. orFirm—-Conley. Rose &'I‘a;1.ron;Iel'fre3' C.
`H09“
`ABSTRACT
`[57]
`A computer system including separate digital and analog
`system chips which provides increased perfonnanoe over
`'=‘"T°'“ °°mP"“=' ‘*‘°m°‘-““‘e-“*- The °°mP““‘-F SW6“ 0‘ "15
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`performs various digital functions.
`including multirnedia
`functions and clfipset functions. and a. separate analog chip
`which performsanalog functions.includingdigitalto analog
`.
`.
`.
`.
`.
`.
`and analog to digital conversions.'I‘I1us the present invention
`optimizes silicon use and design by splitting up digital and
`analog functions on separate chips. The system of the
`present invention also separates digital noise from analog
`5‘°i5°‘a]i‘?‘”i“3 a"igh°’d°g'°““' °““t°gmi°°“'h“““°’°‘“'
`"'3 ‘"‘b““Y‘
`
`32 Claims, 11 Drawing Sheets
`
`-
`United SIEIIZES Patent
`Gulick et al.
`
`_
`
`[191
`
`[75]
`
`[54] COMPUTER SYSTEM HAVING AN
`1M;|>R()vE1) n1(;1'[‘AL AND ANALOG
`CONFIGURATION
`Inventors: Dale E. Gulick: Andy Lambrecht:
`Mike Webb: Larry Hewitt. all of
`Austin: Brian Barnes. Round Rock. all
`or Tex
`[731 Assigncei Advanced Micro Dev-m.s_ lm_.__
`Sunnyvale. Calif.
`
`[21] Appl. No; 526,438
`[221 Filed:
`5°!” no 1995
`G06F 15101»
`[51]
`Int. cif
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`References cued
`US, PATENT DOCUMENTS
`5:19:13 Kupnicki et :11.
`6Ii99l Fujimoii
`2:199:
`Ida et a1.
`511992 Casper ex al.
`
`3:10:14
`.3481'233
`....... 38lf63
`395F807
`
`
`
`
`
`4.742544
`5.027.214
`5.091.951
`5.111.409
`
`Video
`Monitor
`
`§‘__
`
`PCI Bus
`
`J
`120
`
`A‘
`
`Hard
`Disk
`
`122
`
`Network
`Card
`
`124
`
`Page 1 of 20 et1t10ners
`
`X 1 It
`
`Petitioners HTC & LG - Exhibit 1023, p. 1
`
`

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`US. Patent
`
`Aug. 18, 1998
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`Page 2 of 20
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`Petitioners HTC & LG - Exhibit 1023, p. 2
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`Petitioners HTC & LG - Exhibit 1023, p. 2
`
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`

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`US. Patent
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`Aug. 13, 1993
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`Page 3 of 20
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`Petitioners HTC & LG - Exhibit 1023, p. 3
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`Petitioners HTC & LG - Exhibit 1023, p. 3
`
`

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`U.S. Patent
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`Aug. 18, 1993
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`Page 4 of 20
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`Petitioners HTC & LG - Exhibit 1023, p. 4
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`Petitioners HTC & LG - Exhibit 1023, p. 4
`
`

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`Aug. 13, 1993
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`Page 5 of 20
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`Petitioners HTC & LG - Exhibit 1023, p. 5
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`Petitioners HTC & LG - Exhibit 1023, p. 5
`
`
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`

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`U.S. Patent
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`Aug. 13, 1993
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`Page 6 of 20
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`Petitioners HTC & LG - Exhibit 1023, p. 6
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`U.S. Patent
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`Aug.1s, 1993
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`Page 7 of 20
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`Petitioners HTC & LG - Exhibit 1023, p. 7
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`Petitioners HTC & LG - Exhibit 1023, p. 7
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`

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`U.8. Patent
`
`Aug. 18. 1998
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`Sheet 7 of 11
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`Page 8 of 20
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`Petitioners HTC & LG - Exhibit 1023, p. 8
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`Petitioners HTC & LG - Exhibit 1023, p. 8
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`

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`U.S. Patent
`
`Aug. 13, 1993
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`5,797,028
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`Page 9 of 20
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`Petitioners HTC & LG - Exhibit 1023, p. 9
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`Petitioners HTC & LG - Exhibit 1023, p. 9
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`
`

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`U.S. Patent
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`Aug. 13, 1998
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`Page 10 of 20
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`Petitioners HTC & LG - Exhibit 1023, p. 10
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`Petitioners HTC & LG - Exhibit 1023, p. 10
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`

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`U.S. Patent
`
`Aug. 13, 1993
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`Page 11 of 20
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`Petitioners HTC & LG - Exhibit 1023, p. 11
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`Petitioners HTC & LG - Exhibit 1023, p. 11
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`

`
`U.S. Patent
`
`Aug. 13, 1993
`
`Sheet 11 of 11
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`5,797,028
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`Page 12 of 20
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`Petitioners HTC & LG - Exhibit 1023, p. 12
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`Petitioners HTC & LG - Exhibit 1023, p. 12
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`

`
`1
`COMPUTER SYSTEM navmc AN
`IMPROVED DIGITAL AND ANALOG
`CONFIGURATION
`
`FIELD OF THE l'_\TVEN'I‘lON
`
`The present invention relates to a computer system having
`separate digital and analog system chips which is optimized
`for real-tirne multimedia and communications applications.
`wherein the digital chip integrates digital portions of mul-
`timedia and communications processing and the analog chip
`integrates analog portions of multimedia and communica-
`tions processing.
`DESCRIPTION OF THE REI.A'I‘ED ART
`
`Computer architectures generally include a plurality of
`devices interconnected by one or more various buses. For
`example. modern computer systems typically include a CPU
`coupled through bridge logic to main memory. The bridge
`logic also typically couples to a high bandwidth local
`expansion bus. such as the peripheral component intercon-
`nect (PCI) bus or the VESA (Video Electronics Standards
`Association) VL bus. Examples of devices which can be
`coupled to local expansion buses include video accelerator
`cards. audio cards. telephony cards. SCSI adapters. network
`interface cards. etc. An older type expansion bus is generally
`coupled to the local expansion bus. Examples of such
`expansion buses included the industry standard architecture
`(ISA) bus. also referred to as the AT bus.
`the extended
`industry standard architecture (EISA) bus. or the microchan-
`nel architecture (MCA) bus. Various devices may be coupled
`to this second expansion bus. including a faximodem. sound
`card. etc.
`
`Personal computer systems were originally developed for
`business applications such as word processing and
`spreadsheets. among others. However. computer systems are
`currently being used to handle a number of real
`time
`applications.
`including multimedia applications having
`video and audio components. video capture and playback.
`telephony applications. and speech recognition and
`synthesis. among others. These real time applications typi-
`cally require a large amount of system resources and band-
`width.
`
`One problem that has arisen is that computer systems
`originally designed for business applications are not well
`suited for the rea1—t.it't1e requirements of modern multimedia
`and communications applications. For example. modern
`personal computer system architectures still presume that
`the majority of applications executing on the computer
`system are non real~time business applications such as word
`processing andlor spreadsheet applications. which execute
`primarily on the main CPU. In general. computer systems
`have not traditionally been designed with multimedia andfor
`commu nication hardware as part of the system. and thus the
`system is not optimized fax multimedia applications. Rather.
`multimedia nndfor communication hardware is typically
`designed as an add~in card for optional insertion in an
`expansion bus of the computer system
`In many cases. rnultimedia hardware cards situated on an
`expansion bus do not have the required access to system
`memory and other system resotnces for proper operation. In
`addition. since the computer system arcltitecture is not
`optimized for real-time applications. multimedia and com-
`munications hardware cards generally do not Inake efiicient
`use of system resources. As an example. hardware cards
`which perform video. audio andlor comrnurtitzations func-
`tions each typically include a digital portion which processes
`digital data and an analog portion which processes analog
`data.
`
`5.797.028
`
`2
`
`For example. a video card includes digital circuitry which
`performs polygon rendering.
`texture mapping and other
`pixel manipulation operations. and also includes the digital
`memory portion of a RAMDAC (random access memory
`digital to analog converter). A video card also includes
`analog circuitry which performs the digital to analog con-
`version and generates RGB (red. green and blue) analog
`voltages which drive a video monitor. Likewise. a sound
`card includes digital circuitry which performs audio pro-
`cessing functions such as MlDI. wavetable synthesis. etc..
`and also includes analog circuitry to generate the appropriate
`analog audio signals that are provided to the speakers.
`As multimedia and communication applications become
`more prevalent. multimedia and communication hardware
`will correspondingly become essential components in per-
`sonal computer systems. Therefore. an improved computer
`system architecture is desired which is optimized for mul-
`timedia and communication applications as well as for
`uon—realtim.e applications.
`
`SUMMARY OF THE INVENTION
`
`25
`
`35
`
`45
`
`S5
`
`65
`
`invention comprises a computer system
`The present
`which provides increased performance over current com-
`puter architectures. The computer system of the present
`invention includes a digital system chip which performs
`various digital functions. including multimedia and cornmu-
`nication functions. and a separate analog chip which per-
`fonns analog functions. Thus the present invention opti-
`mizes silicon use and design by splitting up digital and
`analog functions on separate chips. The system of the
`present invention also separates digital noise from analog
`noise. allowing a higher degree of integration while increas-
`ing stability.
`the computer system
`In the prefened embodiment.
`includes a CPU coupled through chip set or bridge logic to
`main memory. The bridge logic also couples to a local
`expansion bus such as the PCI bus. Various devices may be
`connected to the PCI bus. including a network interface
`card. as well as other peripherals. The bridge logic and main
`memory also couple to a digital system chip which performs
`various digital functions in the computer system. In one
`embodiment. the digital system chip couples directly to the
`CPU and main memory. and the digital system chip includes
`the PCI bridge logic. the rnain memory controller logic. and
`other chipset logic.
`The digital system chip includes one or more DSP engines
`that perform video. graphics. audio audio: telephony appli-
`cations. The DSP engines may comprise either dedicated
`video. audio antlfor communication engines or general pur-
`pose DSP engines. The digital system chip also performs
`various digital operations in the computer system. including
`one or more of power management functions. floppy con-
`troller functions. serial and parallel U0 port functions. and
`hard disk interface functions. As desired. the digital system
`chip may perforrn other functions. including. EIDE support
`and SCSI support. Thus the digital system chip performs a
`number of real-time digital functions. including audio and
`video functions. as well as others.
`
`An analog system chip is connected directly to the digital
`system chip and performs various analog functions. includ-
`ing analog—to—digital (AID) conversion and digital to analog
`(D.-‘A) conversion for various functions. including video.
`audio. modem functionality. and a telephone handset. among
`others. In one embodiment. the analog system chip only
`includes analog portions of the AID and DEA logic
`functionality. and the digital portion of the A/D and DIA
`
`Page 13 of 20
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`Petitioners HTC & LG - Exhibit 1023, p. 13
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`Petitioners HTC & LG - Exhibit 1023, p. 13
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`

`
`3
`
`4
`
`5.797.028
`
`FIG. Sisa block diagram of a computer system including
`digital and analog system chips coupled to a PCI expansion
`bus according to an alternate embodiment of the present
`invention;
`FIG‘ 9 mustmes me mmpmer 53,5.cm of FIG 3 including
`a plurality of digital and analog system chips. wherein the
`-
`-
`-
`-
`System includes I bus mmpnsed between the digital and
`analog system chips:
`
`10
`
`FIG 10 i5 3 51091‘ diagf3111 Of the digital SYSN‘-H1 Chip Of
`FIGS 3 and 95 am
`FIG. 11 is a block diagram of the analog system chip of
`FIGS. 8 and 9.
`
`logic is comprised in the digital system chip. The analog
`system chip further includes video ports for coupling to a
`“M30 m0flit01"- audio P07“ for ‘-‘OUPHHS *0 3'1 3"di0 DAG Of
`speakers. and one or more communication ports for Irans—
`ferring analog information. In one embodiment. the analog 5
`system chip includes one of mo“: of a radio Haflswiva’
`infrared (IR) transceiver. analog mixer. and it HTS-C
`(National Television Standards Comruittee) converter. The
`analog system chip further includes analog inputs for receiv-
`ing input from various peripherals. such as a microphone.
`CD—ROM. stereo system and TV ulna". among others.
`In an alternate embodiment.
`the digital system chip
`couples to the PCI bus. The digital system chip may be
`comprised on the motherboard or. alternatively. the digital
`DEFAILED DESCRIPTION OF THE
`chip is comprised on a modular expansion card adapted for
`PREFERRED EMBODIMENT
`insertion into a connector slot on the PCI bus. thus allowing 15
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`son and available from Mindshare Press. 2202 Buttercup
`Chin and the analog system chip couplcs to various
`Dr.. Richardson. Tex. 75082 (214) 231-2216. is hereby
`peripherals. including a monitor and speakers.
`.
`'
`d by reference in its entirety.
`.
`In one embodiment.
`the computer system includes a 20 Incorporate
`.
`.
`.
`scpamm imflmcdme bus mupwd bemmn me digital SyS_
`The Intel Peripherals Handbook. 1994 and 1995 editions.
`tern chip and the analog system chip. In this embodiment.
`available [mm mm Corporation‘ an hficby incorporated by
`.
`.
`.
`ference in their entirety. Also. data sheets on the Intel
`one or more digital system chips are coupled to the PCIbus.
`It
`_
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`_
`.
`wherein the one or more digital system chips connect to the
`Siflopx Pcret t:'h1l?"t' also rjfegmd E0 as m‘? Tam."
`intermediate bus. One or more analog system chips are also 25 C met‘ G“! :1? )&‘;" aE° h YA: acne; an
`en
`coupled to the intermediate bus. This configuration allows
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`for improved modularity and upgradeability. This conl'1gu—
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`ration also allows communication between each of the
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`digim system chips and analog system chips as we” as
`and the Intel 824-30FX PCIset Product Brief (Order No.
`wmmunicmon between me mspecfivc digiwl system Chips 30 297559-001). all of which are available from Intel
`.
`.
`.
`Corporation. Literattire Sales. P.0. Box 7641. Mt. Prospect.
`$.‘:J:°‘"‘“""‘°““°" "°“'°“' ‘he ‘°5"°"“"° “"°"°3 "3"‘°"’
`]ll. 150056-7641 (1-soos79~u3s3). and all of which are
`hereby incorporated by reference in th-ei.r entirety.
`Therefore. the present invention comprises a novel com-
`U.S. Pat. No. 4.994.801 titled “Apparatus Adaptable for
`puter system architecttire which increases the performance
`«»~~=«—mm«s:memp 35 §’.f.1’§‘is.‘‘7‘§.‘i;.‘‘l's§.5§2.‘“’“"»...§§‘iL’2.'?u°:Yi’?f.f.§2:‘§’3T°i%s‘«3??§§
`1''°‘“‘‘°‘' ‘“ ‘’‘° 53’5“"'‘ “"1” P°“°°"““‘ "“‘i°"3 “Si” “'1'
`which issued Feb 19 1991 whose inventors are Sa.fAs
`Cortiflguglfigggntogiragioqglimgn mhailog
`John Bartkowiak. and Mikl Moyal. and which is assigned to
`em P I Gimp E
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`ys. mt
`W
`Advanced Micro Devices Corporation. is hereby incorpo-
`Pc wZm.°"'S canspondlng “.3109 .funmclnSITms.sFpa_ no rated by reference in its entirety.
`ration of digital and analog functionality optimizes S1l.lCOI]
`Compmcr System Block Diagram
`of a computer
`us;and reduces noise issues while also providing improved
`Referring now to FIG 1‘ 2 block ch.
`PC °rma'n°e'
`system aocording to the present invention is shown. As
`BRIEF DESCRIPTION OF THE DRAWINGS
`shown. the computer system includes a central processing
`A better understanding of the present invention can be ‘*5 mm (CPU) 1.2 which is coupled In-rough 3 CPU local bus
`obmmcd whcn the following detailed dcscripfion of the
`to a hostlPCllcache bridge 01' chips-at 106. The Cltlpsel
`preferred embodiment is considered in conjunction with the
`includes arb_‘-u"_‘fi°“ l°3i° 197 as 31_"°""n‘ 111° ch’-¥'5°‘ 1.6 is
`following drawings_ in which:
`preferably Sl.l'I1!l3l' to the Triton chipset available from Intel
`-
`.
`.
`.
`Corporation. A second level or L2 cache memory (not
`FIG. 1 is a block d.ta.gra.m of a computer system 1IlCl1.ld.l.Bg
`_
`_
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`the preferred embodiment of the present invention:
`3
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`.
`.
`memory bus 108 to main memory 110. The main memcity
`HgG1: 2 15 3 block dmgmm of the dlglm Systcm chip of
`110 is preferably DRAM (dynamic random access rnemory)
`.
`,
`_
`or EDO (extended data out) rncmcry. as desired.
`FIG. 3 is a block diagram of an altunate embodiment of
`-
`-
`.
`the digital system chip of FIG. 1 according to the presem 55
`The hostiPCIi‘cache budge or chipset 106 also iuteifaces
`_
`_
`_
`to a peripheral component interconnect (PCI) bus 120. In the
`invention._
`‘
`L
`_
`'— preferred embodiment. a PCI local bus is used. However. it
`FIG“ 4 15 3 131091‘ d‘‘‘S1'‘'"n 9‘: the “W93 5Y5t°“fi“P “I
`is noted that other local buses may be used. such as the
`FIG. 1:
`I
`'$ -
`‘VESA (Video Electronics Standards Association) V1. bus.
`‘W31
`FIG- 5 is 3 bloc-kdiagmm 0f 3 ‘3°mP"‘°|' W53
`‘Various types of devices may be connected to the PCI bus
`a digital system chip and an analog cl'i.ip a g n
`129‘
`“lemme °mb°‘“1‘1°'1‘°f the PTCSCI“ l'“'°|1‘i‘3fl3
`In the embodiment shown in FIG. 1. a digital system chip
`FIG. I5 is a block diagram Of the digital system Chip Of
`112 according to the present invention is cotipled to the
`FIG» 5;
`chipset 106. The digital system chip 112 performs various
`FIG. 7 is a block diagram of a computer system including 65 digital functions. including multimedia functions such as
`a digital system chip and an analog chip according to a third
`video and audio. as discussed further below. The digital
`embodiment of the present invention;
`system chip 112 includes a Universal Serial Bus {USE}
`
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`5
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`5.791028
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`10
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`15
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`25
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`interface. The
`interface as well as a parallellserial port
`digital system chip 112 also preferably includes an ISDN
`tlntegrated Services Digital Network) interface. The digital
`system chip 112 also preferably couples to floppy drive 141.
`Various other devices may be coupled to the digital system
`chip 112. such as a hard drive or other digital devices. The
`digital system chip 112 preferably only comprises digital
`circuitry.
`The digital system chip 112 preferably communicates
`with devices on the PCI bus 120 through the chipset 106. In
`one embodiment. the digital system chip 112 includes a PC!
`interface for coupling directly to the PCI bus 120. In this
`embodiment. the digital system chip 112 can arbitrate for the
`PCI bus and can communicate directly with devices on the
`PCI bus with less involvement of the chipset logic 106. The
`digital system chip 112 is also preferably coupled to other
`devices in the computer system to perform power manage-
`ment functions. as well as other functions. as desired.
`An analog system chip 114 is coupled to the digital system
`chip 112. The analog system chip 114 performs various
`analog functions.
`including analog to digital (AID)
`conversion. digital to analog {DIAJ conversion. and modern
`functionality. among others. The analog system chip 114 is
`coupled to provide outputs to various analog devices.
`including a video monitor 132 and speakers 134. The analog
`system chip 114 also includes an analog modem output 136
`for coupling to a telephone line. The analog system chip 114
`also couples to various devices to receive various analog
`inputs. including a microphone 142. a CD-ROM 1414. and a
`TV tuner 146. It is noted that only the analog output of the
`CD-ROM is provided to the analog system chip 114. The
`analog system chip 114 preferably substantially comprises
`analog circuitry. and preferably only includes digital “front-
`end" circuitry for i.nt<:rfaci.ng to the digital system chip 112.
`Various devices may be coupled to the PCI bus 120. For
`example. a hard disk 122 and a network interface controller
`124 are shown coupled to the PCI bus 120. A SCSI (small
`computer systems interface) adapter (not shown} may also
`be coupled to the PCI bus 120. In one embodiment. the
`digital system chip 112 includes a hard disk interface for
`coupling to a hard disk and a SCSI interface for coupling to
`SCSI devices. In addition. the digital system chip 112 may
`also include network interface circuitry such as Ethernet or
`tolren ling circuitry for interfacing to a network. Howeva. in
`the prefen-ed embodiment. the digital system chip 112 does
`not include network circuitry. but rather network functions
`are performed by a modular network card coupled to the PCI
`bus 120. Various other devices may be connected to the PCI
`bus 120. as is well known in the art.
`Expansion bus bridge logic (not shown) is also preferably
`coupled to the PCI bus 120. The expansion bus bridge logic
`interfaces to an expansion bus (not shown). The expansion
`bus may be any of varying types. including the industry
`standard architecttlre (ISA) bus. also referred to as the AT
`bus. the extended industry standard architecture (EISA) bus.
`or the microchannel architecture (MCA) bus. Various
`devices may be coupled to the expansion bus. such as
`expansion b-us memory (not shown).
`Digital System Chip Block Diagram
`Referring now to FIG. 2. a more detailed block diagram
`illustrating the digital system chip 112 is shown. The digital
`system chip 112 includes a connector 201 for connecting to
`analog system chip 114. and also includes a connector 203
`for coupling to the chipset logic 106. Although not shown in
`FIG. 2. the various devices in the digital system chip 112 are
`interconnected through respective data channels or signal
`traces in fonn a functional unit. The digital system chip 112
`
`6
`also preferably includes one or more inputfoutput (U0)
`channels for transmitting data to the analog system chip 114
`and to the chipset logic 106.
`In the preferred ernbotlirnent shown in FIG. 2. the digital
`system chip 112 includes a videolgraphics engine 202 which
`performs video and graphics operations such as polygon
`rendering. texture mapping. and other pixel manipulation
`operations. among others. The videolgraphics engine 202
`performs operations similar to currently available graphics
`accelerators from companies such as S3. Tseng. Weitek. and
`others. The digital system chip 112 may also include a
`dedicated MPEG (Motion Pictures Electronics Group]
`decoder (not shown).
`The digital system chip 112 also includes an audio engine
`204 which performs digital audio processing operations such
`as MIDI and wavetable synthesis. among others. the audio
`engine 204 performs operations similar to currently avail-
`able sound cards such as SoundBla.ster or Soun<lBlaster-
`compatible cards.
`The digital system chip 112 also preferably includes a
`general purpose DSP engine 206 which is programmable to
`perform various functions. such as MPEG decoding. L2
`compression. and other advanced video. audio. andfor com-
`munications functions. A read only memory (ROM) 20? is
`preferably coupled to the DSP Engine 206 which stores
`instructions for use by the DSP Engine 206. Alternatively. a
`nonvolatile RAM or SRAM is used which receives down-
`loadable instructions from the main memory 110. In one
`embodiment. the DSP engine 206 is a dedicated communi-
`cation engine which performs digital communication
`operations. such as ISDN operations andior telephony
`operations. In another embodiment. the digital system chip
`112 includes a dedicated cornrnunication engine (not shown)
`in addition to the general purpose DSP engine 206. and the
`dedicated communication engine performs ISBN andfor
`telephony operations.
`In one embodiment. the digital system chip 112 includes
`multimedia memory (not shown) for storing multimedia
`data. such as video data and audio data. The multimedia
`memory corresponds to video RAM (VRAM} found on
`current video accelerator cards. and is also used for storing
`audio data as well as other multimedia and communications
`data. The multimedia memory preferably comprises VRAM.
`DRAM (dynamic RAM). SRAM (static RAM). or EDO
`(extended data out) RAM. as desired. Alternatively. the
`multimedia memory is located oiif-chip and is coupled
`directly to the digital system chip 112.
`In one embodiment. the digital system chip 112 does not
`include multimedia memory. but rather video data and audio
`data are stored in the system memory 110 according to a
`unified memory architecture. In this embodiment. the digital
`system chip 112 preferably includes a memory buffer 234
`and a direct memory access (DMA) engine 236 for trans-
`ferring data from the main memory 110 to the memory
`buffer 234 in the digital system chip 112.
`In one embodiment. the video engine 202 and audio
`engine 204 couple through one or more U0 channels to
`respective digital U0 ports 232. including video and audio
`ports. The digital video port is included for providing digital
`video data to peripheral devices. such as an MPEG decoder
`or a digital video display. The digital audio port is included
`for providing digital audio data to digital peripheral devices.
`such as for external mixing. as desired. In an embodiment
`which includes a dedicated cornmunication engine.
`the
`digital system chip 112 preferably includes one or more
`digital communication parts 232 for coupling to an ISDN
`line or other digital line.
`
`35
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`45
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`65
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`5397.023
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`3
`store microcode corresponding to video. audio and commu-
`nication processing instructions. or receive downloadable
`microcode from the system memory 11!).
`Analog System Chip
`Referring now to FIG. 4. the analog system chip 114 is
`shown. In the preferred embodiment shown in FIG. 4. the
`analog system chip 114 includes analog to digital (A/DJ
`circuitry 402 and digital to analog (DIAJ circuitry 404. The
`analog system chip 114 preferably includes AID and DIA
`logic for video. audio. modem and telephone handset func-
`tionality. In the preferred embodiment.
`the analog system
`chip 114 include a single AID converter and a single DIA
`converter for all of the above functions. Alternatively. the
`AID circuitry block 402 and the DEA circuitry block 404
`each include a plurality ofAll) converters and a plurality of
`DIA oonverters. respectively. for each of the above func-
`trons.
`
`20
`
`25
`
`In one embodiment. the analog system chip 114 includes
`only the analog circuitry portion of the All) and DIA logic.
`and the digital portion of this logic is comprised in the digital
`system chip 112. ‘Thus. assuming a simple sigma delta
`converter. the digital system chip 112 includes digital noise
`filter circuitry which moves in-band noise to out—of-band
`noise. as well as other digital AID and DEA logic. and the
`analog system chip 114 includes the analog circuitry portion
`of the AID and BIA which receives andtor produces the
`analog signals.
`The analog system chip 114 also includes various input
`ports and input circuitry such as TV tuner input circuitry
`412. CD-ROM input circuitry 414. and microphone input
`circuitry 416. The TV tuner input circuitry 412 includes a
`NTSC (National Television Standards Committee) con-
`verter. The CD-ROM input circuitry 414 is adapted for
`interfacing to a CD—ROM. The microphone input circuitry
`416 is adapted for intafacing to a microphone.
`The analog system chip 114 also includes a radio trans-
`ceiver 442. an infrared (IR) transceiver 444. and a plurality
`of audio system inputs 446 for coupling to the outputs of an
`audio entertainment system. The analog system chip 114
`also may include one or more line level inputs and synthe-
`sizer inputs. among others. The analog system chip 114 also
`includes mixers 406 for performing analog signal mixing
`and a voltage inverter 454. as well as one or more filters and
`digital tone control logic (not shown).
`The analog system chip 114 includes video port circuitry
`422 connected to video port 432 and audio port circuitry 424
`connected to audio port 434. In one embodiment. the video
`channel between the video port circuitry 422 and video port
`432 and the audio channel between the audio port circuitry
`424 and the audio pm 434 are preferably synchronized with
`each other to ensure synchronized audio and video during
`multimedia presentations.
`The analog system chip 114 also includes modern cir-
`cuitry 426 which connects to a modem port 436. The modem
`circuitry 426 preferably includes DAA (data access
`arrangement) logic. which is analog logic that interfaces
`between the modem and the phone line and performs ring
`detect. and two wire to four wire hybrid functions. among
`other functions.
`
`As shown. the digital system chip 112 also preferably
`includes a USB (Universal Serial Bus) interface 222 for
`interfacing to a Universal Serial Bus. The Universal Serial
`Bus is a bus specification proposed by Microsoft and Intel
`which is designed to replace the various peripheral connec-
`tors on current PCs with a single connector for most
`peripherals. such as lreyboar-tls. mice. monitors. and other
`devices. The digital system chip 112 also preferably includes
`serialfparallel port interface logic 224 for providing a serial
`port and a parallel port. The serialfparallel port interface
`logic 224 preferably implements a universal asynchronous
`receiverltransrnitter (l_lART}. The digital system chip 112
`also preferably includes a floppy controller interface 226 for
`interfacing to floppy drive 14!. The digital system chip 112
`may include other functions. including EIDE support and
`SCSI support.
`In the preferred embodiment. the digital system chip 112
`includes video processing circuitry and.r'or firmware com-
`prised in the video engine 202. including the digital portion
`of a random access memory digital to analog converter
`(RAMDAC). including the random access memory (RAM)
`260 of the RAMDAC. As described below.
`the analog
`system chip 114 preferably includes the analog portion of
`the RAMDAC and associated logic circuitry for converting
`video data into appropriate analog signals. preferably red.
`green and blue (RGB) signals. for output directly to video
`monitor 132. as described below.
`The digital system chip 112 may also include various
`peripheral function logic 228. including an interrupt system.
`a real time clock (RFC) and timers. a direct memory access
`(DMA) system. and RO1WFlasl't memory. Other peripherals
`may be comprised in the peripheral function logic 228in the
`digital system chip 112. including communications ports.
`diagnostics ports. comrnandlstatus registers. and non—
`volatile static random access memory (NVSRAM). The
`digital system chip 112 also preferably includes modem
`logic which performs digital modulator and demodulator
`functions.
`Alternate Embodiment
`
`35
`
`Referring now to FIG. 3. in an alternate embodiment.
`digital system chip 112.4 includes one or more general
`purpose DSP engines. preferably three DSP engines 242.
`244. and 246. which preferably perform video. audio and
`communication processing functions. In this embodiment.
`the DSP engine 242 performs video processing functions.
`the DSP engine 244 perfonns audio processing functions.
`and the DSP engine 246 performs communication process-
`ing functions as well as other real-time functions. In one
`embodiment. each DSP engine 242. 244. and 246 includes
`one or more ROMs or RAMs 20‘? which store microcode
`corresponding to video. audio and communications process-
`rng.
`
`In one embodiment. the DSP engines 242. 244. and 246
`are not assigne