Petitioner,
`
`1
`-1 1
`
`1,
`
`Patent Owner.
`
`PR? 016-00825
`
`343,729
`
`-1-1
`
`THOMAS
`
`M . CON'1'_ '
`
`AT
`
`1AY,
`
`LANTA, G
`-1
`
`fiORG A
`
`E
`
`:%RUARY 24, 2017
`
`%Y:
`
`TANYA L. V.
`
`CCR-3-1790
`
`3 NO:
`
`120013
`
`TSG Reporting - Worldwide
`
`877-702-9580
`
`PETITIONER EXHIBIT 1026-0001
`
`

`

`February 24, 2017
`8:57 a~m-
`
`Deposition of
`THOMAS M. CONTE, PH.D., held at the offices
`of Regus, 1170 Peachtree Street, Atlanta,
`Georgia before Tanya L. Verhoven-Page,
`Certified Court Reporter and Notary Public of
`the State of Georgia.
`
`__
`
`APPEARANCES OF COUNSEL
`On behalf ofthe Petitioner:
`KEVIN ANDERSON, ESQ.
`Wlley Rem
`\1,§Zfhff1gStf,‘§°§3%_"§b006
`
`EPPIIEELSIP PR1CSE=ESQ'
`ARM
`Encino Trace
`
`5707 Southwest Parkway
`Building 1
`Austin, Texas 78735
`
`On behalf of the Patent Owner:
`JORDAN MICHAEL ROSSEN, ESQ.
`SEUNG WOO HUR, ESQ.
`Ropes & Gray
`2099 Pennsylvania Avenue, N.W.
`Washington, D.C. 20006
`
`IN D E X
`
`EXHIBITS:
`
`C0113?
`Deposition
`Exhibit
`Exhibit 10
`
`Page
`Description
`Document from the
`
`Exhibit 11
`
`1995 IEEE Inteniational
`Solid State Circuits
`Conference, page 178
`
`148
`
`Excerpt from Computer
`Organization & Design,
`The Hardware/Software
`Interface by
`Patterson and Hennessy
`
`150
`
`Exhibit 12
`
`IS Speeds New
`-
`-
`Media Processing
`
`168
`
`WITNESS: THOMAS M. CONTE, PH.D.
`
`Examination
`BY MR. ANDERSON
`
`page
`
`Come
`Deposition
`Exhibit
`
`EXPHBITS:
`
`Description
`
`Page
`
`Exhibit 1
`
`Exhibit 2
`
`.
`.
`Exhibit 3
`
`Exhibit 4
`Exhibit 5
`Exhibit 6
`Exhibit 7
`Exhibit 8
`
`Exhibit 9
`
`United States Reissued
`Patent 43,729
`9
`Declaration of Thomas
`M. Conte, Ph.D.
`9
`
`.
`United States Patent
`5,734,874
`9
`Drawing/diagram
`Drawing/diagram
`Drawing/diagram
`Appendix 3
`Excerpt from Digital
`Arithmetic by
`146
`Ercegovac and Lang
`Excerpt from Computer
`Arithmetic Algorithms
`and Hardware Design
`by Behrooz Parhami
`
`146
`
`CZO\lO‘\U"|nJ>(.0[\)|—‘©kOCO\lO‘\U'|»J>(.0[\)|—‘
`
`1 2 3 4 5 67 8 9
`
`..O
`
`l—‘
`
`TSG Reporting — Worldwide
`
`877-702-9580
`
`2
`
`(Pages 2 to 5)
`
`PETITIONER EXHIBIT 1026-0002
`
`

`

`©\DCO\lO‘\U'|nJ>(.x)[\)|—‘
`
`T. CONTE
`
`ATLANTA, GEORGIA; FRIDAY, FEBRUARY 24, 2017
`8:57 A.M.
`
`Page 6
`
`Thereupon --
`THOMAS M. CONTE, PH.D.,
`
`called as a witness, having been first duly sworn,
`was examined and testified as follows:
`
`EXAMINATION
`BY MR. ANDERSON:
`
`Good morning, Dr. Conte.
`Good morning.
`Am I pronouncing your name right?
`Conte.
`
`Conte, okay. Thank you.
`How many times have you been deposed?
`A More than 20, less than 30.
`Q Okay. Do you recall when the last time
`you were deposed was?
`A Yes.
`
`Q When was that?
`A Monday.
`Q Monday. And what was the subject matter
`of that deposition?
`
`'oo'\1E5xLnLu='wk:'H'otooo\imm.:>wmH
`
`T. CONTE
`Processor architecture.
`
`And was it related to litigation?
`Yes, it was.
`
`Which litigation?
`That was Future Link Systems -- actually,
`Intel V Future Link Systems and then a countersuit of
`Future Link Systems V Intel, and it's in a district
`of Delaware.
`
`Q And which side did you work, Future Link
`or Intel?
`A Future Link.
`
`Q And when you mentioned processor
`architecture systems. Is there any specific aspect
`of processor architecture systems that that case
`relates to?
`
`MR. ROSSEN: Objection. Scope.
`THE WITNESS: I've cashed it out
`
`right now, so give me a moment. Wow.
`It relates to issues dealing with
`clock gating.
`BY MR. ANDERSON:
`
`Q When you say clock gating, what do you
`mean by that?
`MR. ROSSEN: Objection. Scope.
`
`T. CONTE
`
`THE WITNESS: It's actually a term
`in dispute, so I'd rather not comment.
`BY MR. ANDERSON:
`
`Q Well, you understand that the present IPR
`that you're here to involved with has issues of clock
`cycle timing; is that correct? Do you understand
`that?
`
`A Yes, I do understand that.
`
`Q And are the issues that you are -- that
`you provided testimony in the Future Link case at all
`related to clock cycle timing?
`MR. ROSSEN: Object to the scope.
`THE WITNESS: Inasmuch as clock
`
`gating relates to turning on or off the
`clock in order to save power by disabling
`a unit, it relates, I suppose, to cycle
`time, although I debate that.
`I think,
`actually, the cycle time stays the same
`whether or not you're supplying it to a
`particular unit.
`BY MR. ANDERSON:
`
`Q So, I'm not trying to probe into that
`other case, I'm just trying to find out if it's at
`all related to this.
`
`T. CONTE
`A That's fine.
`
`Q And so, if I understand this, that other
`case involves like turning off and on clocks,
`generally?
`A In part it --
`MR. ROSSEN: Objection. Scope.
`THE WITNESS: In part, yes.
`BY MR. ANDERSON:
`
`Q And what's the other part?
`MR. ROSSEN: Objection. Scope.
`THE WITNESS: Monitoring the power
`dissipation at different spots on an
`integrated circuit.
`(Conte Deposition Exhibit Nos. 1, 2
`and 3 were marked for the record.)
`
`BY MR. ANDERSON:
`
`If you could pull out Exhibit 1, which is
`Q
`the '729 patent at issue in this case.
`A Okay.
`Q Are you familiar with Exhibit 1?
`A Yes.
`
`Q And have you read Exhibit 1 at one time
`or another?
`
`TSG Reporting — Worldwide
`
`877-702-9580
`
`3
`
`(Pages 6 to 9)
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`PETITIONER EXHIBIT 1026-0003
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`

`

`00\lO‘\U‘|uJ>OJ[\)|—‘©kOOO\lO‘\U'|»J>OJ[\)|—‘
`
`mG5G@QNPbmm4mm&mNH
`
`T. CONTE
`
`A Yes.
`
`Q When is the most recent time you've read
`
`it?
`
`A Well, I've consulted it as recently as
`yesterday.
`I think the last time I read it cover to
`cover was in preparation for my declaration.
`Q Okay. Can you turn to claim 21 of
`Exhibit 1, at the back.
`I'm there.
`
`And can you just read that to yourself.
`Okay. Can I read it to myself‘?
`Yeah, to refresh your recollection of it.
`
`Okay?
`A Yes, sir.
`
`I want to ask you questions about your
`Q
`understanding of claim 21.
`If we look at the first element where --
`
`where it says: A detecting unit for detecting
`whether an instruction to be decoded is a
`
`predetermined instruction.
`(Brief discussion off the record.)
`BY MR. ANDERSON:
`
`So do you see the detecting unit?
`Q
`A Yes.
`
`Page 11
`
`T. CONTE
`
`Q In that detecting unit, is there any
`particular components of the detecting unit or does
`it only have to perform the function that is
`described there?
`
`A To my understanding, this is an apparatus
`claim, so there -- it needs to be a unit that, one
`way or another, is detecting whether an instruction
`to be decoded is a predetermined instruction.
`Q Does it have to be any particular -- is
`there any particular fonn that the detecting unit has
`to take?
`A I don't believe that that term has been
`
`construed, so it's up to one of ordinary skill in the
`art. Although, I know there's some debate about
`predetermined. But to one skilled in the art, that
`would be what we'd generally call a decoder.
`Q A decoder. Okay.
`And one that's skilled in the art would
`
`understand, then, when you see -- well, decoder is a
`term of art for one that's skilled iii the art in this
`
`field, right, in the field of processor architecture?
`A It has several different meanings. The
`one I was referring to was an instruction decoder.
`Q And instruction decoder is a term of art
`
`T. CONTE
`
`T. CONTE
`
`Page 12
`
`Page 13
`
`in the processor architecture field, would you say?
`A Yes.
`
`Q And what does an instruction decoder do?
`A Well, it's eponymous. It decodes
`instructions.
`
`Q Okay. And so your understanding is that
`when -- if you look at claim 21 in the first element
`where it says, A detecting unit for detecting whether
`an instruction to be decoded is a predetermined
`instruction, that is an instruction decoder?
`A To one skilled in the art, that would be
`one example.
`Q What would be other examples?
`A Well, there could be -- let's see.
`
`Sitting here today, I would say there could be some
`other ways to detect whether an instruction to be
`decoded is a predetermined instruction, such as
`accessing a structure that indicates this instruction
`at a given address has already been decoded and is a
`particular instruction.
`So, for example, we do this when we
`process branch instructions. So given the program
`counter location instruction and the fact that it's
`
`exactly what the instruction is because you've
`remembered that information in the past.
`And where I'm saying you, I'm
`anthropomorphizing being the processor.
`Q Certainly.
`So would you say all instruction decoders
`are a detecting unit for detecting whether an
`instruction to be decoded is a predetermined
`instruction?
`
`MR. ROSSEN: Objection to form.
`THE WITNESS: No. I'd have to look
`
`at them on a case-by-case basis.
`BY MR. ANDERSON:
`
`Q What would be the distinguishing factor?
`A Well, there's a lot of different
`technology that goes into instruction decoders, so
`sitting here today, I can't think of what features
`would be distinguishing, but I don't want to make an
`absolute statement.
`
`Q Okay. Can you think of any example, at
`all, of an instruction decoder, using your term from
`earlier, that would not be a detecting unit as
`claimed in claim 21?
`
`been decoded in the past, you can then determine
`
`A So different people call different
`
`TSG Reporting — Worldwide
`
`877-702-9580
`
`4
`
`(Pages 10 to 13)
`
`PETITIONER EXHIBIT 1026-0004
`
`

`

`Page 14
`
`Page 15
`
`mQ6G@QNPbmmQmmamNH
`
`T. CONTE
`
`T. CONTE
`
`mQmGEQNP6mm4mmamNH
`
`aspects of the processor core, sometimes, instruction
`decoders. There could be one that just extracts the
`fields out of the instruction register. That might
`be called an instruction decoder, but it doesn't
`
`examine the opcode, for example, so it doesn't detect
`whether or not the instmction in the instruction
`
`register is a predecoded -- predetermined -- sony --
`instruction.
`
`So the part of claim 21 where it talks
`Q
`about detecting whether an instmction to be decoded
`is a predetenmned instmction, is that referencing
`evaluating the opcode of an instruction decoding?
`A Well, I was thinking of a generic
`instmction decoding. There might be other ways to
`do it, like we've talked about before. So I don't
`want to make an absolute statement, but that would be
`
`one example.
`Q Okay. Recently, have you seen -- and you
`said you can't remember.
`Have you seen any examples, recently, of
`instmction decoders that were not a detecting umt
`for detecting whether an instmction to be decoded is
`a predetenmned instmction?
`MR. ROSSEN: Objection. Scope.
`
`THE WITNESS: When I teach this,
`from textbooks such as Patterson, I teach
`multiple stages of instruction decoding
`and one of them is what I said,
`extracting the fields without checking
`the opcode, but another step would have
`to be checking the opcode.
`BY MR. ANDERSON:
`
`Q You have to check the opcode in order for
`the instruction to be processed correctly, is that
`right?
`A Not always.
`Q Give me an example of when that wouldn't
`be the case.
`A You can have an instruction that is what
`
`we call predicated. So, in that situation, you could
`have an instruction -- well, actually, even in that
`case you have to check the opcode. So, yeah.
`Q Okay.
`A But I should -- let me just qualify that.
`Opcode means different things depending on the
`instruction set architecture.
`
`Q Okay. Let's go to the second portion of
`claim 21, if we could.
`
`T. CONTE
`
`T. CONTE
`
`Page 17
`
`A Okay.
`Q And it recites: A rounding umt for
`rounding when the detecting umt is detecting that
`the instmction is the predetenmned instruction. A
`signed m-bit integer stored at an operand designated
`by the predeten11ined instruction to a value expressed
`as an s-bit integer.
`Do you see that portion?
`A Yes.
`
`Q And then it continues on to define
`certain operations that are perfon11ed by the rounding
`umt. Do you see that?
`A Yes.
`
`So is it fair to say that claim 21 has
`Q
`two components, a detecting umt and a rounding umt?
`MR. ROSSEN: Objection. Fon11.
`THE WITNESS:
`I think it has two
`
`aspects. I'm not -- component is
`something that I'm not sure is the right
`phrase for -- for this. And I'm not an
`attorney, so I want to be careful.
`BY MR. ANDERSON:
`
`Q Well, there's two things recited in claim
`21, however you want to call those things. But
`
`there's two things, right, a rounding unit and a
`detecting unit?
`A Well, there's also called out that the
`rounding unit has certain other arithmetic operations
`that it performs.
`Q Okay. So -- and let's talk about those
`arithmetic operations.
`Are you referencing element 2lA, B and C?
`Are those the operations you're referencing?
`A Yes.
`
`Q And let's look at element 2lA that
`recites testing whether the signed m-bit integer is a
`negative number or not.
`Do you see t11at?
`A Yes.
`
`Q And that is a operation that is required
`to be perfon11ed by the rounding unit; is that true?
`A Give me a moment to think about it.
`
`Yes, it's an operation performed by the
`rounding unit.
`Q And does the rounding unit have to
`perfon11 that operation in any particular fashion, in
`your view?
`MR. ROSSEN: Objection. Fon11.
`
`TSG Reporting — Worldwide
`
`877-702-9580
`
`5
`
`(Pages 14 to 17)
`
`PETITIONER EXHIBIT 1026-0005
`
`

`

`'<3o'\1'c7\'U1:J>.'ooR)l—\'C>kooo\1o\Ln.J>.ooN|—‘
`
`'oo'\1'owLnLa>'c>b'H'oLooo\1mmu>c>mH
`
`T. CONTE
`THE WITNESS: Yes.
`BY MR. ANDERSON:
`
`Q Wha -- what fashion?
`A Well, you see a signed integer is an
`expression of the quantity, but it's -- or the value,
`but it's encoded in one of several fon11ats. And so
`
`testing whether the m-bit integer is a negative
`number or not depends on what fon11at the number is.
`Q Does element 28 require any particular
`circuitry?
`MR. ROSSEN: Objection to fon11.
`THE WITNESS: Does it require
`circuitry?
`BY MR. ANDERSON:
`
`Q Any particular circuitry?
`A Okay. Any particular circuitry.
`It depends on the fon11at of the number,
`what that circuitry would be.
`Q Dr. Conte, I'm asking you specifically
`about the meaning of claim 21.
`A I understand.
`
`So when I look at claim 21, does claim 21
`Q
`require any particular circuitry for element 21A, in
`your view?
`
`T. CONTE
`
`operation that's doing that testing.
`BY MR. ANDERSON:
`
`Q Okay. Do you know what I'm talking about
`if I reference a microcode?
`A Yes.
`
`Q Could element 20A -- 2 1A be implemented
`in microcode?
`
`MR. ROSSEN: Objection. Scope.
`THE WITNESS: So maybe I don't know
`what you mean by microcode. So maybe you
`can give me some more detail.
`BY MR. ANDERSON:
`
`Q Well, you've used the ten11 microcode in
`your writings and even in declarations and reports,
`right?
`A It means a lot of different specific
`things.
`Q What does it mean to you?
`A Well, as said, it means a lot of
`
`I could give you a
`different specific things.
`partial list.
`I don't think I could completely
`enumerate it.
`
`Q Okay. But I'm just asking, element 2lA,
`if I implemented that in microcode in any fon11?
`
`Page 19
`
`T. CONTE
`
`MR. ROSSEN: Objection to form.
`THE WITNESS: It requires circuitry
`that perfon11s that operation, and the
`specifics of it are only that A, B and C
`are performed within one cycle.
`BY MR. ANDERSON:
`
`Q Okay. So it's -- it's defined by the
`function; is that fair to say?
`A Well, I know that function is an
`important legal term that has heavy weight, so let's
`say it's defined by the operation.
`Q Okay. That's fine.
`And as long as itperfon11s that
`operation, then, in your view, it falls within claim
`21?
`
`MR. ROSSEN: Objection. Form.
`THE WITNESS: I'll just be precise.
`The -- in order to take this claim to
`
`determine whether or not I'm practicing
`the claim, I would see whether or r1ot
`whatever circuit I have in front of me is
`
`testing whether a signed m-bit integer is
`a negative number or not. That would
`mean that that circuit has some type of
`
`T. CONTE
`
`MR. ROSSEN: Objection.
`BY MR. ANDERSON:
`
`Q Are you just saying it's outside the
`scope or outside the scope of 21A?
`MR. ROSSEN: Objection to form.
`THE WITNESS: The concept of
`microcode, because microcode itself has
`multiple different meanings, it's so
`broad that it renders your question
`almost contentless.
`
`Microcode can mean so many
`different things depending on the
`context, and even in the context of a
`processor implementation, it means
`different things.
`BY MR. ANDERSON:
`
`Q But really what I'm trying to get at is,
`is there anything -- any implementation of a
`processor that performs testing, whether the signed
`m-bit integer is a negative number or not, that you
`would say falls outside of element 21A?
`MR. ROSSEN: Object to the form.
`THE WITNESS:
`I don't quite
`understand your question. So maybe you
`
`6
`
`(Pages 18 to 21)
`
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`877-702-9580
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`PETITIONER EXHIBIT 1026-0006
`
`

`

`'oo'\r'oxLnLu>'o;k>'H'otooo\rmm.a>o;mH
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`'oo'\1'c7\'UI:J>.'ooR)l—\'Okooo\10\LrI.J>-ooNI—\
`
`T. CONTE
`
`can try again and let me see if I can
`answer.
`
`BY MR. ANDERSON:
`
`Q Okay. Does element 21A require the
`specific circuitry, for example, that the '729
`discloses to perform that function?
`A My understanding of patent law is that,
`no, it doesn't.
`
`Q I'm asking you as one of skill in the
`art, do you think it does?
`A Oh, I see what you're asking.
`No, we've already established that
`there's more than one way to perform that testing.
`Q Okay. And if we moved on to element 21B,
`do you see element 21B where it recites testing
`whether the signed m-bit integer exceeds a
`predetermined positive number or not? Do you see
`that?
`A Yes.
`
`Q For element 21B, is there any particular
`type of testing that the processor has to implement
`in order to fall within it or is it also defined by
`the language merely at the operation?
`MR. ROSSEN: Objection. Form.
`
`T. CONTE
`THE WITNESS: So let's break this
`
`down, and I think this works for the
`other one, as well.
`
`We're testing whether the signed
`m-bit integer -- where the signed m-bit
`integer, the antecedent -- and it is up
`here -- that is what was the values
`
`stored at an operand designated by the
`predetermined instruction.
`BY MR. ANDERSON:
`
`Q Okay.
`A That has a specific format. So the
`testing has to be consistent with that format in
`either A or B.
`
`Q Okay.
`A So that's one requirement, right, to be
`consistent with the format that the operand
`designated by the predetermined instruction holds the
`value expressed as an m-bit integer.
`The other is -- and based on that format,
`to determine A calls out whether it's a negative
`number and B calls out whether it exceeds a
`
`predetennined positive number.
`Q Okay. Can you turn to column 14 in
`
`T. CONTE
`
`T. CONTE
`
`Page 24
`
`Page 25
`
`Exhibit 1. And I'm looking at the paragraph that
`goes from line eight to line 27 of column 14. And
`I'll give you a fair chance to read that. When
`you're done, just let me know.
`A Okay.
`Q In fairness, I should let you read the
`paragraph at lines 29 to 35, as well, too.
`A Okay. Thank you. Okay.
`Q The passage at column 14, lines eight to
`35, shows one example of performing the operation in
`element 21B; is that fair to say?
`A Yes, that's called the pre -- the
`preferred embodiment.
`Q Okay. And the testing in element 21B, at
`least as it's shown in the patent, does a
`subtraction; is that true?
`
`A That's what it calls out, yes.
`Q Are you aware of any other form of
`element 21B other than a subtraction that is
`
`disclosed by the '729 patent?
`A Give me a moment.
`
`I would have to, and I imagine you don't
`want me to read the patent cover to cover to see if
`it was or not.
`
`I'm willing to say, sitting here today, I
`cannot find any.
`Q Okay.
`A But there may well be.
`Q Do you think then -- and let's assume
`that that's the case, that I don't need to disclose
`the subtracting for performing element 21B.
`Do you think that element 21B is limited
`to a fonn of testing that only does subtraction?
`MR. ROSSEN: Objection. Form.
`THE WITNESS: Let me explain my
`hesitation. So oftentimes in computer
`arithmetic, one operation that appears to
`be something like subtraction for a
`specific goal actually, when one examines
`the circuits in detail, can be determined
`
`to be doing something simpler. But
`the -- the claim of -- not the claim,
`pardon me.
`The description of it as
`subtraction is one that's easy to
`understand to, as I like to tell
`students, humans. That there's usually
`in dichotom between what's eas
`for us
`
`TSG Reporting — Worldwide
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`'oo|\1|(5\lU‘I:J>'(.oR)l—\'OkoO0\lO\U‘I»J>(.oNI—‘
`
`T. CONTE
`to understand and what's best to
`
`implement hardware.
`So I need to -- I'm not willing --
`I'd need more time to think about whether
`
`or not all potential ways to perform that
`testing are, in essence, equivalent to
`the particular logical operations that
`would occur when you subtract two numbers
`and check for a carry. That would
`require some extra study on that part.
`Does that make sense? Because I'm
`
`under oath I don't want to say something
`absolute here because I'm not quite sure,
`you see.
`BY MR. ANDERSON:
`
`Q Okay. So it's very possible, in your
`view, what I just heard and you just don't know, that
`claim 21 -- element 21B is limited to testing that is
`performed when there is subtraction that occurs as
`described i11 column 14 at li11es 20 to 35?
`
`MR. ROSSEN: Objection. Form.
`THE WITNESS: No, that isn't quite
`what I said. What I said was that the --
`the claim -- this -- in column 1682 --
`
`'oo'\1|(5\lU‘I:J>'(.oK)l—\'OkoOo\10\U‘I»J>(.oNI—‘
`
`T. CONTE
`
`wait. I'm in the wrong.
`BY MR. ANDERSON:
`
`Column 14. I'm sorry.
`Column 14.
`Yes.
`
`I turned the page.
`It's column 14, line eight to 35.
`Thank you.
`There, it doesn't call not just
`subtraction, but it calls out subtraction and then
`
`checking whether a carry has occurred as a result of
`the subtraction.
`
`That operation, that specific subtracting
`something from a constant that has a certain property
`and checking if there's carry, may well actually be a
`much simpler subset ofjust regular subtraction of
`any number by any other number.
`So saying merely subtraction, I think, is
`too -- is asking that it be too complicated --
`require too complicated a test. Does that make sense
`to you?
`I think -- you
`Q Yeah, I'm just trying to.
`keep referencing circuitry and other ways to do
`subtraction.
`
`T. CONTE
`
`T. CONTE
`
`Page 28
`
`Page 29
`
`We can -- we can certainly look to the
`passage in column 14 at lines eight to 35 is
`referencing, I believe, figure 4, and there's no
`circuitry described for subtracting or subtractor in
`this '729 patent, right?
`A One skilled in the art would be familiar
`
`with several different ways of implementing a two's
`complement subtractor and then detecting whether or
`not a carry is generated.
`Q Certainly, and my question is more
`specific.
`Is there any explicit disclosure of such
`subtraction circuitry in the '729 patent?
`A Again, I would need to check and, sitting
`here today, I don't believe so.
`Q Okay.
`A I know that there's a disclosure of an
`
`I don't know if the specification, sitting here
`AOU.
`today, gives certain properties or certain circuits,
`characteristics of that AOU.
`
`Q Okay. If we could just turn back to the
`operation in 21B.
`I mean, what I'm really trying to
`find out here is your opinion after having studied
`this patent.
`Is there any particular limitation on the
`
`type of circuitry that must be used to implement
`operation 21B or, alternatively, is it merely any
`circuitry, as long as it performs the recited
`operation in 21B, would meet that -- would meet that
`claim element?
`
`MR. ROSSEN: Objection to form.
`THE WITNESS: I'm not -- that was a
`
`long question. So maybe you could break
`it down into parts.
`BY MR. ANDERSON:
`
`Q Okay. For operation 21B, does it require
`any particular circuitry?
`A It only requires a certain -- it puts
`restrictions on the input and the output, but I don't
`think it requires a certain circuitry beyond
`circuitry that satisfies those restrictions.
`Q Okay. What is the restriction on the
`input for operation 21B?
`A That the testing be performed on the
`signed m-bit integer that, if you go up to a rounding
`unit clause, is stored at an operand designated by
`the predetermined instruction.
`Q Okay. And --
`A I'm sorry. So the format would have to
`
`TSG Reporting — Worldwide
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`877-702-9580
`
`8
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`Page 31
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`
`T. CONTE
`be consistent with what was stored there as well.
`
`But it's asking a signed m-bit integer. There's
`multiple ways in a computer to store something in a
`given format, but you have to keep the format
`consistent between what is in the operand register
`and what is occurring during the testing.
`Q And you said there were restrictions on
`the output of operation 21B. What are those
`restrictions?
`
`A Well, it's seeing if it exceeds a
`predetermined positive number or not. So, I suppose
`what I meant was there's also a restriction on what
`
`the test is doing. The output is merely a Boolean.
`It's a binary yes or no.
`Q And let's turn to operation 21C, where it
`says: Define the value expressed as the unsigned
`s-bit integer in accordance with the testing results
`of A.
`
`'oo'\i'mLn'u>L»k>'H'c>Looo\1o\owu>o>mH
`
`Do you see that?
`A Yes.
`
`Q Is there any particular circuitry that is
`required for operation 21C?
`A So the only constraints it puts on the
`circuitry is that the output is a value that can be
`
`T. CONTE
`
`expressed as an unsigned s-bit integer, and that that
`value is a result of the testing of A and B.
`Q Okay. But beyond the specific operation
`described in element 21C, there's no further
`restriction on the type of circuitry that would be
`required to meet element 21C in your view?
`MR. ROSSEN: Objection to form.
`THE WITNESS: Let me take a moment.
`
`The only other restriction is that A, B
`and C be performed within one cycle.
`BY MR. ANDERSON:
`
`Q Okay.
`A That I see sitting here today.
`Q Which, again, is a -- I would
`characterize as a function or an operational
`restriction.
`I don't want to use the word function
`
`because you objected to that.
`But that is not -- that does not -- the
`
`word one cycle does not impose any particular
`restriction to the type of circuitry, does it?
`MR. ROSSEN: Objection to form.
`THE WITNESS: First, he's the guy
`that objects. Not me.
`I'm just saying that I don't
`
`T. CONTE
`
`T. CONTE
`
`Page 32
`
`Page 33
`
`want -- I need to be precise and I know
`that the term function has certain legal
`baggage that it carries. So I don't want
`to use that.
`
`Now, getting back to your original
`question. No, I believe that saying,
`within one cycle, does place a certain
`set of restrictions on the circuitry that
`can perform A, B and C.
`BY MR. ANDERSON:
`
`Q And what restrictions, in your view?
`A So it would be that the circuitry is
`designed in such a way as to not force the architect
`of the processor to further extend the cycle time.
`So this is, I think, stated relatively well in the
`specification, column six, where it says: So that
`the effective number of steps taken, the positive
`conversion saturation calculation processing is zero.
`Meaning that it doesn't extend -- it
`doesn't force the designer to compromise the
`performance of the processor.
`Q Just so I understand what you just said.
`A Thank you.
`Q You think the word, one cycle, within one
`
`cycle or in one cycle -- I guess I should be very
`specific here.
`You believe the claim term, within one
`
`cycle, includes the meaning of that whole description
`that you just gave me?
`A No. That was a word salad. My
`apologies.
`I mean, to be precise, the board has
`construed performed within one cycle to be perfonned
`within one oscillation of the CPU clock.
`
`It means that and only that.
`Q And -- so I'm going to go back to my --
`with that defimtion, do you think that the term
`performed within one cycle, using its -- the
`defimtion you just gave me, imposes any particular
`requirements on the type of circuitry that is needed
`for the rounding umt?
`MR. ROSSEN: Objection to fonn.
`THE WITNESS:
`I think that
`
`performed within one oscillation of a CPU
`clock is understood to one of skill in
`the art to exclude certain circuit
`
`implementations.
`
`TSG Reporting — Worldwide
`
`877-702-9580
`
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`

`

`T. CONTE
`BY MR. ANDERSON:
`
`Q What circuit implementations does it
`exclude?
`
`A It would exclude circuit implementations
`that take longer than one oscillation of the CPU
`clock.
`
`Q Okay. That's fine. That's fair.
`But other than that particular
`restriction -- again, we agree it's within one clock
`cycle as construed by the board.
`Other than within that limitation, does
`
`the term performed within one clock -- within one
`cycle impose any restrictions on the type of
`circuitry that the rounding unit has to encompass?
`MR. ROSSEN: Objection to form.
`THE WITNESS:
`I think I've already
`answered this.
`
`CO\lO‘\U"|n-l>(.0[\)|—‘©kOCZO\lO‘\U'|»J>(.0[\)|—‘
`
`So, to one skilled in the art, it
`
`excludes certain circuitry that would
`take longer than one oscillation of the
`CPU clock.
`BY MR. ANDERSON:
`
`Q Okay. Does it exclude any other
`circuitry?
`
`T. CONTE
`BY MR. ANDERSON:
`
`Q Okay. And there's no other limitations
`besides that, right, in your mind?
`MR. ROSSEN: Object to the form.
`THE WITNESS: We already spoke
`about the limitations of the input and
`output on steps A, B and C that I
`discussed.
`BY MR. ANDERSON:
`
`Q Okay. I'm talking about specific
`circuitry. Really what I'm trying to get to is
`there's a rounding unit here in the claim you
`recited. Do you see that?
`A Uh-huh.
`
`Q And does that rounding unit have to have
`any particular circuitry or does it just need to
`perform the operations that are recited in the claim?
`MR. ROSSEN: Objection to form.
`THE WITNESS: So, again, the
`circuitry is going to be constrained by
`the format of the m-bit integer stored at
`the operand designated by the
`predetermined instruction, and the
`testing would be constrained by the --
`
`
`
`OO\l(5\U‘|»J>(.UK)l—‘®kOC1)\lO'\U'|»J>(.Ul\)l—‘U'|nJ>(A)[\)|—‘(D\j)(1)\lO‘\U'|n-l>(A)[\)|—‘©\£)(1)\lO‘\LJ'|n-l>(A)[\)|—‘
`
`T. CONTE
`
`MR. ROSSEN: Objection to form.
`BY MR. ANDERSON:
`
`Q
`
`I guess -- let me clarify this.
`Does it require any particular or
`specific mixture of AND gates, OR gates, multiplexers
`or any other type of circuitry, or does it just mean
`it's performed Within one cycle?
`MR. ROSSEN: Objection to form.
`THE WITNESS: So let's step back.
`By it -- I think I've lost the
`definition.
`BY MR. ANDERSON:
`
`The rounding unit.
`Q
`A The rounding unit.
`Q Does the rounding unit have to be any
`particular circuitry in any particular pattern or OR
`gates or AND gates or multiplexers or anything else,
`or does it just need to operate Within one cycle?
`MR. ROSSEN: Objection to form.
`THE WITNESS: The claim says What
`it says, that the rounding unit has to
`perform those three steps and perform
`them Within one oscillation of the CPU
`
`clock cycle.
`
`T. CONTE
`
`for example, that format and the
`predetermined positive number.
`And the -- defining the value is --
`it's going to constrain the circuitry
`depending on the unsigned s-bit integer
`that's being expressed.
`So each of those places certain
`restrictions to one skilled in the art on
`
`what that circuitry is.
`BY MR. ANDERSON:
`
`Q Okay. Beyond those things, the specific
`things recited in the claim, do you think that the
`rounding unit has any other restrictions?
`MR. ROSSEN: Objection. Form.
`I
`THE WITNESS: It may well be.
`mean, sitting here today, I don't believe
`so.
`
`BY MR. ANDERSON:
`
`Q Okay. When you say it may well be, what
`do you mean by that?
`A Well, again, I talked about how the -- so
`by that, I was thinking back to the restrictions that
`would be placed on the circuitry by the format of the
`m-bit signed integer, the predetermined positive
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`877-702-9580
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`

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`
`T. CONTE
`
`number and the value expressed as an unsigned s-bit
`integer. So inside those, there might be interacting
`restrictions that one skilled in the art, when one
`sat down to create such a device, would become
`
`readily apparent.
`So I'm not willing to close off
`everything and say that those intertwined related
`restrictions depending -- that are a result of the
`input restrictions and the output restriction are not
`present in the claim.
`Q Okay. And you just mentioned the input
`and the output.
`What is the input to the rounding unit?
`A It's called out in the claim as a signed
`m-bit integer stored at an operand designated by the
`predetermined instruction. The other input is a
`predetermined positive number that's called out in
`element B.
`
`Q Okay. What is the output of the rounding
`u11it?
`
`A A value expressed as an unsigned s-bit
`integer.
`Q Okay. So the rounding unit has these two
`inputs that you've identified and one output; is that
`
`CO\lO‘\U‘|nJ>O)[\)|—‘©kOCO\lO‘\U‘|»J>O)[\)|—‘
`
`T. CONTE
`BY MR. ANDERSON:
`
`Q When you say those formats would be
`defined or could be defined by the instruction -- is
`that what you said -- what do you mean by that?
`MR. ROSSEN: Object to the form.
`THE WITNESS: That was perhaps a
`sloppy way of saying it, but they could
`be -- those formats would be
`
`predetermined in one way or another.
`BY MR. ANDERSON:
`
`Q And is one way in the instruction opcode?
`MR. ROSSEN: Objection to form.
`THE WITNESS: Let's say in an
`instruction format, which is larger than
`the opcode, would be one way to perform
`that
`
`It could also be done at design
`time by the instruction set architect.
`It could be at design time by the micro
`architect, for example.
`BY MR. ANDERSON:
`
`But I guess I'm trying to ask what
`Q
`actually claim 21 recites. And does claim 21 recite
`any of those things?
`
`T. CONTE
`
`correct?
`
`MR. ROSSEN: Objection to form.
`THE WITNESS: It has at least
`
`those, yes.
`BY MR. ANDER