UNITED STATES PATENT AND TRADEMARK OFFICE
`______________________
`
`BEFORE THE PATENT TRIAL AND APPEAL BOARD
`______________________
`
`
`
`SAMSUNG ELECTRONICS CO., LTD.
`Petitioner
`
`v.
`
`DSS TECHNOLOGY MANAGEMENT, INC.
`Patent Owner
`
`________________________
`
`Case IPR. No. Unassigned
`U.S. Patent No. 6,784,552
`Title: STRUCTURE HAVING REDUCED LATERAL SPACER EROSION
`________________________
`
`Petition For Inter Partes Review of U.S. Patent No. 6,784,552 Under
`35 U.S.C. §§ 311-319 and 37 C.F.R. §§ 42.1-.80, 42.100-.123
`
`Mail Stop “PATENT BOARD”
`Patent Trial and Appeal Board
`U.S. Patent and Trademark Office
`P.O. Box 1450
`Alexandria, VA 22313-1450
`
`

`
`Petition for Inter Partes Review of U.S. Patent No. 6,784,552
`
`
`TABLE OF CONTENTS
`
`Page
`
`INTRODUCTION ........................................................................................... 1 
`REQUIREMENTS FOR PETITION FOR INTER PARTES REVIEW ........ 1 
`2.1.  Grounds for Standing (37 C.F.R. § 42.104(a)) ..................................... 1 
`2.2.  Notice of Lead and Backup Counsel and Service Information ............. 1 
`2.3.  Notice of Real-Parties-in-Interest (37 C.F.R. § 42.8(b)(1)) .................. 2 
`2.4.  Notice of Related Matters (37 C.F.R. § 42.8(b)(2)) .............................. 2 
`2.5.  Fee for Inter Partes Review .................................................................. 3 
`2.6.  Proof of Service ..................................................................................... 3 
`IDENTIFICATION OF CLAIMS BEING CHALLENGED
`(§ 42.104(B)) ................................................................................................... 3 
`OVERVIEW OF THE 552 PATENT .............................................................. 5 
`552 PATENT PROSECUTION HISTORY .................................................. 10 
`CLAIM CONSTRUCTION .......................................................................... 13 
`6.1.  Applicable Law ................................................................................... 13 
`6.2.  Construction of Claim Terms .............................................................. 13 
`6.2.1. 
`“contact region/opening” (claims 1, 4, 7, 8, and 12) ........... 13 
`PERSON HAVING ORDINARY SKILL IN THE ART ............................. 15 
`DESCRIPTION OF THE PRIOR ART ........................................................ 15 
`8.1. 
`“Self Aligned Bitline Contact For 4 Mbit dRAM” (“Kuesters”) ........ 15 
`8.2.  U.S. Patent No. 5,482,894 (“Havemann”) .......................................... 22 
`8.3.  U.S. Patent No. 4,686,000 (“Heath”) .................................................. 25 
`8.4.  Motivations To Combine: Kuesters in Combination with
`Havemann ............................................................................................ 27 
`8.5.  Motivations To Combine: Kuesters in Combination with Heath ....... 29 
`8.6.  Motivations To Combine: Kuesters in Combination with Heath
`and Havemann ..................................................................................... 30 
`GROUND #1: CLAIMS 1, 2, AND 4-12 OF THE 552 PATENT ARE
`ANTICIPATED BY KUESTERS ................................................................. 31 
`
`-i-
`
`
`1. 
`2. 
`
`3. 
`
`4. 
`5. 
`6. 
`
`7. 
`8. 
`
`9. 
`
`
`
`

`
`Petition for Inter Partes Review of U.S. Patent No. 6,784,552
`
`9.1.7. 
`
`9.1.6. 
`
`9.1.  Claim 1 is anticipated by Kuesters ...................................................... 31 
`9.1.1. 
`[1.0] “A structure, comprising:” .......................................... 31 
`9.1.2. 
`[1.1] “a conductive layer disposed over a substrate”........... 32 
`9.1.3. 
`[1.2] “a first insulating layer on the conductive layer” ....... 34 
`9.1.4. 
`[1.3] “a contact region in said first insulating layer” ........... 35 
`9.1.5. 
`[1.4] “at least one insulating spacer in the contact
`region adjacent to the first insulating layer” ........................ 37 
`[1.5] “an etch stop material over said first insulating
`layer and adjacent to the insulating spacer, the etch
`stop material being a different material from the
`insulating spacer” ................................................................. 38 
`[1.6] “wherein a side of the insulating spacer has an
`angle relative to the substrate surface that is either a
`right angle or an acute angle of more than 85°.” ................. 39 
`9.2.  Claim 2 is anticipated by Kuesters ...................................................... 40 
`9.2.1. 
`[2.0] “The semiconductor apparatus of claim 1
`wherein said etch stop material comprises silicon
`nitride.” ................................................................................ 40 
`9.3.  Claim 4 is anticipated by Kuesters ...................................................... 41 
`9.3.1. 
`[4.0] “The structure of claim 1, wherein the insulating
`spacer has a surface portion in the contact region
`without overlying etch stop material.”................................. 41 
`9.4.  Claim 5 is anticipated by Kuesters ...................................................... 42 
`9.4.1. 
`[5.0] “The structure of claim 4, wherein the insulating
`spacer surface portion without overlying etch stop
`material comprises an
`insulating spacer surface
`portion most distant from said substrate.” ........................... 42 
`9.5.  Claim 6 is anticipated by Kuesters ...................................................... 43 
`9.5.1. 
`[6.0] “The structure of claim 1, further comprising a
`second insulating layer on the etch stop layer and over
`the conductive layer.” .......................................................... 43 
`9.6.  Claim 7 is anticipated by Kuesters ...................................................... 44 
`
`-ii-
`
`
`

`
`9.7.3. 
`
`9.7.4. 
`
`9.7.5. 
`
`Petition for Inter Partes Review of U.S. Patent No. 6,784,552
`
`9.6.1. 
`
`[7.0] “The structure of claim 6, further comprising a
`second conductive material in the contact region.” ............. 44 
`9.7.  Claim 8 is anticipated by Kuesters ...................................................... 45 
`9.7.1. 
`[8.0] “A structure, comprising:” .......................................... 45 
`9.7.2. 
`[8.1] “a first electrically conductive material formed
`in and/or on a surface of a substrate;” ................................. 46 
`[8.2] “a contact opening in a region adjacent to a
`second electrically conductive material formed on the
`substrate” .............................................................................. 47 
`[8.3] “an electrically insulative spacer in the contact
`opening adjacent to the second electrically conductive
`material” ............................................................................... 48 
`[8.4] “an etch stop material over the electrically
`insulative spacer and the first and second electrically
`conductive materials, the etch stop material being a
`different material from the insulative spacer” ..................... 49 
`[8.5] “a blanket layer over the etch stop material; and” ...... 49 
`[8.6] “an opening through a first part of the etch stop
`material to the first electrically conductive material,
`wherein a side of the electrically insulative spacer has
`an angle relative to the substrate surface that is either
`a right angle or an acute angle of more than 85°.” .............. 50 
`9.8.  Claim 9 is anticipated by Kuesters ...................................................... 51 
`9.8.1. 
`[9.0] “The structure of claim 8, wherein
`the
`electrically insulative spacer has a surface portion
`without overlying etch stop material.”................................. 51 
`9.9.  Claim 10 is anticipated by Kuesters .................................................... 51 
`9.9.1. 
`[10.0] “The structure of claim 9, wherein
`the
`electrically insulative spacer surface portion without
`overlying etch stop material comprises a surface
`portion most distant from the substrate.” ............................. 51 
`9.10.  Claim 11 is anticipated by Kuesters .................................................... 52 
`9.10.1. 
`[11.0] “The structure of claim 8, further comprising a
`second insulating layer on the etch stop layer and over
`the conductive layer.” .......................................................... 52 
`
`9.7.6. 
`9.7.7. 
`
`-iii-
`
`
`

`
`Petition for Inter Partes Review of U.S. Patent No. 6,784,552
`
`9.11.  Claim 12 is anticipated by Kuesters .................................................... 52 
`9.11.1. 
`[12.0] “The structure of claim 11, further comprising
`a second conductive material in the contact region.” .......... 52 
`10.  GROUND #2: CLAIM 3 OF THE 552 PATENT IS
`UNPATENTABLE AS OBVIOUS OVER KUESTERS IN VIEW OF
`HAVEMANN ................................................................................................ 52 
`10.1.  Claim 3 is obvious over Kuesters in view of Havemann .................... 52 
`10.1.1. 
`[3.0] “The semiconductor apparatus of claim 1
`wherein said etch stop material comprises silicon
`dioxide” ................................................................................ 53 
`11.  GROUND #3: CLAIMS 1, 2, AND 4-7 OF THE 552 PATENT ARE
`UNPATENTABLE AS OBVIOUS OVER KUESTERS IN VIEW OF
`HEATH .......................................................................................................... 54 
`11.1.  Claim 1 is obvious over Kuesters in view of Heath ............................ 54 
`11.1.1. 
`[1.0] “A structure, comprising:” .......................................... 54 
`11.1.2. 
`[1.1] “a conductive layer disposed over a substrate”........... 54 
`11.1.3. 
`[1.2] “a first insulating layer on the conductive layer;” ...... 55 
`11.1.4. 
`[1.3] “a contact region in said first insulating layer;” ......... 55 
`11.1.5. 
`[1.4] “at least one insulating spacer in the contact
`region adjacent to the first insulating layer; and” ................ 55 
`[1.5] “an etch stop material over said first insulating
`layer and adjacent to the insulating spacer, the etch
`stop material being a different material from the
`insulating spacer” ................................................................. 56 
`[1.6] “wherein a side of the insulating spacer has an
`angle relative to the substrate surface that is either a
`right angle or an acute angle of more than 85°.” ................. 58 
`11.2.  Claim 2 is obvious over Kuesters in view of Heath ............................ 58 
`11.2.1. 
`[2.0] “The semiconductor apparatus of claim 1
`wherein said etch stop material comprises silicon
`nitride.” ................................................................................ 58 
`11.3.  Claim 4 is obvious over Kuesters in view of Heath ............................ 58 
`
`11.1.7. 
`
`11.1.6. 
`
`-iv-
`
`
`

`
`Petition for Inter Partes Review of U.S. Patent No. 6,784,552
`
`11.3.1. 
`
`[4.0] “The structure of claim 1, wherein the insulating
`spacer has a surface portion in the contact region
`without overlying etch stop material.”................................. 58 
`11.4.  Claim 5 is obvious over Kuesters in view of Heath ............................ 59 
`11.4.1. 
`[5.0] “The structure of claim 4, wherein the insulating
`spacer surface portion without overlying etch stop
`material comprises an
`insulating spacer surface
`portion most distant from said substrate.” ........................... 59 
`11.5.  Claim 6 is obvious over Kuesters in view of Heath ............................ 59 
`11.5.1. 
`[6.0] “The structure of claim 1, further comprising a
`second insulating layer on the etch stop layer and over
`the conductive layer.” .......................................................... 59 
`11.6.  Claim 7 is obvious over Kuesters in view of Heath ............................ 59 
`11.6.1. 
`[7.0] “The structure of claim 6, further comprising a
`second conductive material in the contact region.” ............. 59 
`12.  GROUND #4: CLAIM 3 OF THE 552 PATENT IS
`UNPATENTABLE AS OBVIOUS OVER KUESTERS IN VIEW OF
`HEATH AND HAVEMANN ........................................................................ 60 
`12.1.  Claim 3 is obvious over Kuesters in view of Heath and
`Havemann ............................................................................................ 60 
`12.1.1. 
`[3.0] “The semiconductor apparatus of claim 1
`wherein said etch stop material comprises silicon
`dioxide.” ............................................................................... 60 
`13.  CONCLUSION .............................................................................................. 60 
`
`-v-
`
`
`

`
`Petition for Inter Partes Review of U.S. Patent No. 6,784,552
`
`
`
`
`Samsung
`Exhibit #
`
`SAMSUNG-
`1001
`
`SAMSUNG-
`1002
`
`SAMSUNG-
`1003
`
`SAMSUNG-
`1004
`
`SAMSUNG-
`1005
`
`SAMSUNG-
`1006
`
`SAMSUNG-
`1007
`
`SAMSUNG-
`1008
`
`Exhibit List
`
`Description
`
`U.S. Patent No. 6,784,552 (“552 Patent”)
`
`File History for U.S. Patent No. 6,784,552
`
`Declaration of Dr. Richard Fair (“Fair Decl.”)
`
`Curriculum Vitae of Richard Fair
`
`Kuesters et al., “Self Aligned Bitline Contact For 4 Mbit dRAM,”
`Proceedings of the First International Symposium on Ultra Large
`Scale Integration Science and Technology, 1987, pp. 640-649
`(“Kuesters”)
`
`U.S. Patent No. 5,482,894 (“Havemann”)
`
`U.S. Patent No. 4,686,000 (“Heath”)
`
`File History for U.S. Patent No. 6,066,555
`
`SAMSUNG-
`1009
`
`Joint Claim Construction Statement, DSS Tech. Mgmt., Inc. v. Intel
`Corp. et al., 15-cv-130 (E.D. Tex. 2015) (Dkt. No. 165-1)
`
`SAMSUNG-
`1010
`
`Declaration of Mariellen F. Calter
`
`SAMSUNG-
`1011
`
`Sorab K. Ghandhi, VLSI Fabrication Principles Silicon and
`Gallium Arsenide 495-96 (John Wiley & Sons, 1983)
`
`
`
`-vi-
`
`

`
`Petition for Inter Partes Review of U.S. Patent No. 6,784,552
`
`Samsung
`Exhibit #
`
`Description
`
`SAMSUNG-
`1012
`
`Mehrdad M. Moslehi et al., Thermal Nitridation of Si and SiO2 for
`VLSI, Vol. SC-20 IEEE Journal of Solid-State Circuits No. 1, 26
`(1985)
`
`
`
`-vii-
`
`
`

`
`Petition for Inter Partes Review of U.S. Patent No. 6,784,552
`
`
`1.
`
`INTRODUCTION
`
`Pursuant to 35 U.S.C. §§ 311-319 and 37 C.F.R. § 42.100, Samsung
`
`Electronics Co., Ltd. (“Petitioner”) hereby petitions the Patent Trial and Appeal
`
`Board to institute an inter partes review of all claims of U.S. Patent No. 6,784,552,
`
`titled “Structure Having Reduced Lateral Spacer Erosion” (SAMSUNG-1001, the
`
`“552 Patent”), and cancel those claims as unpatentable.
`
`2.
`
`REQUIREMENTS FOR PETITION FOR INTER PARTES REVIEW
`2.1. Grounds for Standing (37 C.F.R. § 42.104(a))
`Petitioner certifies that the 552 Patent is available for inter partes review and
`
`that Petitioner is not barred or estopped from requesting inter partes review of the
`
`challenged claims of the 552 Patent on the grounds identified herein.
`
`2.2. Notice of Lead and Backup Counsel and Service Information
`Pursuant to 37 C.F.R. §§ 42.8(b)(3), 42.8(b)(4), and 42.10(a), Petitioner
`
`provides the following designation of Lead and Back-Up counsel.
`
`Lead Counsel
`Jeremy Jason Lang
`Registration No. 73,604
`(jason.lang@weil.com)
`
`Postal & Hand-Delivery Address:
`Weil, Gotshal & Manges LLP
`201 Redwood Shores Parkway
`Redwood Shores, CA 94065
`T: 650-802-3237; F: 650-802-3100
`
`
`Back-Up Counsel
`Robert S. Magee
`Registration No. 70,227
`(robert.magee@weil.com)
`
`Postal & Hand-Delivery Address:
`Weil, Gotshal & Manges LLP
`201 Redwood Shores Parkway
`Redwood Shores, CA 94065
`T: 650-802-3985; F: 650-802-3100
`
`
`
`

`
`Petition for Inter Partes Review of U.S. Patent No. 6,784,552
`
`Pursuant to 37 C.F.R. § 42.10(b), a Power of Attorney for the Petitioner is
`
`attached.
`
`2.3. Notice of Real-Parties-in-Interest (37 C.F.R. § 42.8(b)(1))
`Petitioner, Samsung Electronics Co., Ltd., is the real-party-in-interest. No
`
`other parties exercised or could have exercised control over this petition; no other
`
`parties funded or directed this petition. See Office Patent Trial Practice Guide, 77
`
`Fed. Reg. 48759-60.
`
`2.4. Notice of Related Matters (37 C.F.R. § 42.8(b)(2))
`DSS Technology Management, Inc. (“Patent Owner”) has asserted the 552
`
`Patent against Samsung in a co-pending litigation, DSS Tech. Mgmt., Inc. v.
`
`Samsung Electronics Co., Ltd. et al., 15-cv-690 (E.D. Tex. 2015). The 552 Patent
`
`has also been asserted by DSS Technology Management, Inc. in the following
`
`cases: DSS Tech. Mgmt., Inc. v. Intel Corp. et al., 15-cv-130 (E.D. Tex. 2015);
`
`DSS Tech. Mgmt., Inc. v. SK hynix, Inc. et al., 15-cv-691 (E.D. Tex. 2015); and
`
`DSS Tech. Mgmt., Inc. v. Qualcomm Inc., 15-cv-692 (E.D. Tex. 2015).
`
`In addition to this Petition, the claims of the 552 Patent are presently the
`
`subject of petitions for inter partes review styled SK hynix Inc. et al. v. DSS Tech.
`
`Mgm’t, Inc., IPR2016-00192, Intel Corp. v. DSS Tech. Mgm’t, Inc., IPR2016-
`
`00287, and Intel Corp. v. DSS Tech. Mgm’t, Inc., IPR2016-00288.
`
`-2-
`
`
`

`
`Petition for Inter Partes Review of U.S. Patent No. 6,784,552
`
`The 552 Patent is a division of U.S. Patent Application No. 08/577,751,
`
`which was filed December 22, 1995 and has issued as U.S. Patent No. 6,066,555
`
`(“555 Patent”). To the best of Petitioner’s knowledge, no U.S. applications or
`
`patents claim priority to the application that lead to the issuance of the 552 Patent.
`
`2.5. Fee for Inter Partes Review
`The Director is authorized to charge the fee specified by 37 C.F.R.
`
`§ 42.15(a), and any other required fees, to Deposit Account No. 506499.
`
`2.6. Proof of Service
`Proof of service of this petition on the Patent Owner at the correspondence
`
`address of record for the 552 Patent is attached.
`
`3.
`
`IDENTIFICATION OF CLAIMS BEING CHALLENGED
`(§ 42.104(B))
`Ground #1: Claims 1, 2, and 4-12 of the 552 Patent are invalid under (pre-
`
`AIA) 35 U.S.C. § 102 on the ground that they are anticipated by Kuesters et al.,
`
`“Self Aligned Bitline Contact For 4 Mbit dRAM,” Proceedings of the First
`
`International Symposium on Ultra Large Scale Integration Science and
`
`Technology, 1987, pp. 640-649 (“Kuesters”). Kuesters was publicly available at
`
`Stanford University Libraries in the United States no later than October 23, 1990.
`
`SAMSUNG-1010, Declaration of Mariellen F. Calter. Kuesters is prior art under
`
`§ 102(b). Kuesters is attached as SAMSUNG-1005. This ground is explained
`
`-3-
`
`
`

`
`Petition for Inter Partes Review of U.S. Patent No. 6,784,552
`
`below and is supported by the Declaration of Dr. Richard Fair (SAMSUNG-1003,
`
`“Fair Decl.”).
`
`Ground # 2: Claim 3 of the 552 Patent is invalid under (pre-AIA) 35 U.S.C.
`
`§ 103 on the ground that it is obvious over Kuesters in view of U.S. Patent No.
`
`5,482,894 to Robert H. Havemann (“Havemann”), entitled “Method of Fabricating
`
`a Self-Aligned Contact Using Organic Dielectric Materials,” which was filed on
`
`August 23, 1994 and which issued on January 9, 1996. Havemann is prior art
`
`under § 102(e). Havemann is attached as SAMSUNG-1006. This ground is
`
`explained below and is supported by the Fair Declaration.
`
`Ground # 3: Claims 1, 2, and 4-7 of the 552 Patent are invalid under (pre-
`
`AIA) 35 U.S.C. § 103 on the ground that they are obvious over Kuesters in view of
`
`U.S. Patent No. 4,686,000 to Barbara A. Heath (“Heath”), entitled “Self-Aligned
`
`Contact Process,” which was filed on February 19, 1986 and which issued on
`
`August 11, 1987. Heath is prior art under § 102(b). Heath is attached as
`
`SAMSUNG-1007. This ground is explained below and is supported by the Fair
`
`Declaration.
`
`Ground # 4: Claim 3 of the 552 Patent is invalid under (pre-AIA) 35 U.S.C.
`
`§ 103 on the ground that it is obvious over Kuesters in view of Heath and
`
`Havemann. This ground is explained below and is supported by the Fair
`
`Declaration.
`
`-4-
`
`
`

`
`Petition for Inter Partes Review of U.S. Patent No. 6,784,552
`
`4. OVERVIEW OF THE 552 PATENT
`The 552 Patent was filed on March 31, 2000 and issued on August 31, 2004.
`
`The 552 Patent is a division of, and claims priority to, application No. 08/577,751,
`
`which was filed on December 22, 1995.
`
`The 552 Patent relates to “improved methods for etching openings in
`
`insulating layers and a semiconductor device with well defined contact openings.”
`
`SAMSUNG-1001, 552 Patent at 1:10-13; SAMSUNG-1003, Fair Decl. ¶¶ 54-65.
`
`The 552 Patent generally describes the alleged state of the art in “the
`
`fabrication of semiconductor devices.” SAMSUNG-1001, 552 Patent at 1:15-65.
`
`In fabricating semiconductor devices, “numerous conductive device regions and
`
`layers are formed in or on a semiconductor substrate.” Id. at 1:15-17. “The
`
`conductive regions and layers of the device are isolated from one another by a
`
`dielectric.” Id. at 1:17-18.
`
`The 552 Patent describes this process in greater detail as illustrated in
`
`Figures 2(A) and (B). To fabricate a semiconductor device, first a gate oxide layer
`
`(210) is formed on a substrate, then a layer of a conducting material, such as a
`
`polysilicon (220), is formed on the gate oxide, and then an insulating layer (230)
`
`encapsulates the polysilicon layer. Id. at 4:34-38. A contact region (270) is
`
`adjacent to the polysilicon layer, and the polysilicon layer is separated from that
`
`region by an insulating spacer (235) to prevent a short circuit to the conducting
`
`-5-
`
`
`

`
`Petition for Inter Partes Review of U.S. Patent No. 6,784,552
`
`material eventually deposited therein. Id. at 4:39-42. Next an etch stop layer (240)
`
`overlies the insulating layer, insulating spacer, and contact region. Id. at 4:42-44.
`
`Finally, a blanket layer (250) overlies the etch stop layer. Id. at 4:44-47.
`
`
`
`The alleged problem that the 552 Patent purports to solve is that the semiconductor
`
`fabrication processes described in the patent as prior art cause the insulating
`
`spacers (235) to become sloped. Id. at 5:4-17. According to the 552 Patent, when
`
`an etch is performed in the contact region (270) to remove the etch stop material
`
`(240), the insulating sidewall spacer (235) is transformed from “substantially
`
`rectangular” to a “sloping or tapered” shape. Id. at 5:4-17. This is allegedly a
`
`result of using an etch chemistry that is selective for silicon nitride as compared to
`
`the insulating material (230). Id. at 5:6-7.
`
`According to the 552 Patent, “[i]n most modern processes a dry etch is then
`
`performed,” id. at 1:54-56, followed by a “non-chemical sputter etch” to remove
`
`“native oxide on top of the conducting layers in the contact region,” id. at 2:57-60.
`
`-6-
`
`
`

`
`Petition for Inter Partes Review of U.S. Patent No. 6,784,552
`
`Sloped spacers are disadvantageous because a sputter etch will further erode the
`
`sloped sidewall spacer, creating an additional risk of a short circuit between the
`
`conductive material in the contact region and the conductive gate region. This
`
`further erosion is illustrated in Figure 3:
`
`
`
`In Figure 3, the sloped sidewall spacer has been eroded from the dotted line to the
`
`solid line. The erosion of the sidewall spacer can cause the gate electrode 320 to
`
`short circuit at its upper right corner to the conductive material later deposited in
`
`contact region 360. Id. at 6:14-21.
`
`The 552 Patent discloses as existing prior-art the use of insulating sidewall
`
`spacers to protect a gate electrode, the use of anisotropic etches to remove material
`
`in a vertical direction, and the use of etchants generally in combination with the
`
`-7-
`
`
`

`
`Petition for Inter Partes Review of U.S. Patent No. 6,784,552
`
`deposition of layers on a substrate to create an integrated circuit device. See id. at
`
`1:10-7:13.
`
`The alleged inventive concept of the 552 Patent is “to etch the spacers …
`
`such that the spacers … have a substantially rectangular profile.” Id. at 11:48-49.
`
`To create this structure, the 552 Patent employs an etch that is “almost completely
`
`anisotropic, meaning that the etchant etches in one direction—in this case,
`
`vertically (or perpendicular relative to the substrate surface) rather than
`
`horizontally.” Id. at 7:45-48. This etch “retains the substantially rectangular
`
`lateral spacer portion of the first insulating layer.” Id. at 7:49-51.
`
`The alleged inventive concept is reflected in the transformation of the
`
`intermediate structure disclosed in Figure 4(H) through the etching process to the
`
`structure disclosed in Figure 4(J):
`
`
`
`-8-
`
`
`

`
`Petition for Inter Partes Review of U.S. Patent No. 6,784,552
`
`
`
`Figures 4(H) and 4(J) illustrate “a cross-sectional planar side view of a series of
`
`gates encapsulated with insulating material, an etch stop layer overlying the
`
`insulating material, a distinct planarized insulating blanket layer overlying the etch
`
`stop layer,” and contact openings 460 to the diffusion regions 405. Id. at 9:27-32,
`
`9:41-45.
`
`The figures disclose a conductive gate electrode 415 encapsulated by an
`
`oxide layer 420. Id. at 10:31-65. The area labeled 405 is a diffusion region formed
`
`in the substrate, such as a source or drain. Id. at 10:35-36. An etch stop layer of
`
`silicon nitride 440 is deposited over oxide layer 420. Id. at 11:63-66. On the etch
`
`stop layer, a second insulating “blanket” layer of silicon oxide 450 is deposited.
`
`Id. at 12:21-23. After the structure of Figure 4(H) has been created, an initial etch
`
`is performed to open the contact regions 460. Id. at 12:35-43. Following this
`
`initial etch, a second etch is performed to remove the horizontal etch stop material
`
`from the base of the contact region. Id. at 12:44-53. This results in Figure 4(J),
`
`-9-
`
`
`

`
`Petition for Inter Partes Review of U.S. Patent No. 6,784,552
`
`with substantially rectangular sidewall spacers. Id. at 13:5-6. This is the structure
`
`claimed in the independent claims of the 552 Patent.
`
`The dependent claims add minor structural details, such as: additional
`
`specificity regarding the materials used for an etch stop (claims 2-3), claims
`
`regarding the topography of the sidewall spacers (claims 4-5, 9-10), and claims for
`
`additional insulating and conductive layers (claims 6-7, 11-12).
`
`The 552 Patent is not directed to the disclosed method, but to all process
`
`conditions “that result in the retention of a boxy spacer. Thus the etch-stop etch
`
`conditions should be regarded in an illustrative rather than restrictive sense.” Id. at
`
`13:14-19. Thus, the 552 Patent purports to claim any semiconductor with a
`
`structure corresponding to the claimed limitations.
`
`5.
`
`552 PATENT PROSECUTION HISTORY
`
`The 552 Patent was filed on March 31, 2000. The 552 Patent is a divisional
`
`of, and claims priority to the 555 Patent, which was filed on December 22, 1995.
`
`The applicants were forced to make numerous amendments and arguments in order
`
`to obtain the patents.
`
`The original claims of the 552 Patent were directed to forming a transistor
`
`structure with a “substantially rectangular” spacer portion adjacent to a contact
`
`opening. SAMSUNG-1002, Mar. 31, 2000 Application at 1002.039-43. In a
`
`preliminary amendment filed the same day, claims 1-24 were canceled and new
`
`-10-
`
`
`

`
`Petition for Inter Partes Review of U.S. Patent No. 6,784,552
`
`claims 27-39 were added. Id., Mar. 31, 2000 Preliminary Amendment at
`
`1002.066-67. The independent claims were generally directed to a prior-art
`
`transistor structure comprising a substrate, a conductive material formed in a
`
`substrate (i.e. a source/drain region), a conductive layer on the substrate (i.e. a
`
`gate), an insulative layer on the conductive layer, a contact region, an insulating
`
`spacer, an etch stop material, and a second insulative blanket layer. See id.
`
`Dependent claims added the limitation that the insulative spacers have “a
`
`substantially rectangular cross-sectional shape that is substantially perpendicular to
`
`the substrate surface.” Id.
`
`On June 1 2001, the Examiner rejected all claims. The primary point of
`
`rejection was that all claims but one were anticipated by Dennison. The Examiner
`
`found that Dennison disclosed all of the claim limitations, including the
`
`substantially rectangular profile of the insulative spacers. Id., May 30, 2001 Office
`
`Action at 1002.079-81. The Examiner further found that claim 26 (current claim
`
`3) was obvious over Dennison in view of Gonzalez. Gonzalez disclosed that “the
`
`etch stop layer is silicon dioxide.” Id. at 1002.081.
`
`In response, the applicants argued that Dennison does not disclose an etch
`
`stop layer separate from and of a different material than the underlying insulative
`
`layer. Id., Oct. 1, 2001 Amendment at 1002.108. On January 4, 2002, the
`
`-11-
`
`
`

`
`Petition for Inter Partes Review of U.S. Patent No. 6,784,552
`
`Examiner rejected the applicants’ arguments in a final rejection. Id., Jan. 4, 2002
`
`Final Office Action at 1002.138-44.
`
`Following an Examiner interview, the applicants amended the claims to
`
`expressly require that the etch stop material be of a different material than the
`
`insulative spacer. Id., April 29, 2002 Amendment and Response at 1002.151-53.
`
`The applicants further argued that the present invention avoids the problem of
`
`sloping spacers that “limit the number of structures that can be included on a
`
`device” by “retaining the substantially rectangular profile of the insulating
`
`spacers.” Id. at 1002.152.
`
`The Examiner again rejected all claims on the grounds that the claims were
`
`obvious over Dennison in view of Figura and Gonzalez. Id., August 14, 2002
`
`Office Action at 1002.170-73. On March 11, 2003, the applicants attempted
`
`unsuccessfully to traverse the rejection, and on May 14, 2003 the rejection was
`
`made final. See id., March 11, 2003 Request for Reconsideration at 1002.182;
`
`May 14, 2003 Final Office Action at 1002.188.
`
`In response, the applicants again filed multiple amendments. The applicants
`
`amended the independent claims to add the limitation that the insulating spacer
`
`“has a substantially rectangular profile in the contact region,” id., Feb. 6, 2004
`
`Amendment at 1002.216, and amended the specification to add “[t]he phrase
`
`‘substantially rectangular’ means that a side of the spacer has an angle relative to
`
`-12-
`
`
`

`
`Petition for Inter Partes Review of U.S. Patent No. 6,784,552
`
`the substrate surface of more than 85°.” Id., Mar. 31, 2004 Corrected Amendment
`
`at 1002.234. The applicants further amended the independent claims to remove the
`
`“substantially rectangular” language and add “wherein a side of the insulating
`
`spacer has an angle relative to the substrate surface of more than 85°.” Id. at
`
`1002.235. Following this amendment, the Examiner allowed the claims. Id., Apr.
`
`7, 2004 Notice of Allowability at 1002.239-42.
`
`6.
`
`CLAIM CONSTRUCTION
`6.1. Applicable Law
`The 552 Patent has expired. Accordingly, Petitioner has applied the claim
`
`construction principles of Phillips rather than the broadest reasonable interpretation
`
`standard applicable to non-expired patents. In re Rambus, Inc., 694 F.3d 42, 46
`
`(Fed. Cir. 2012); see also Phillips v. AWH Corp., 415 F.3d 1303, 1312-13 (Fed.
`
`Cir. 2005) (en banc).
`
`6.2. Construction of Claim Terms
`All claim terms not specifically addressed in this Section have been
`
`accorded their plain and ordinary meaning as understood by a person of ordinary
`
`skill in the art and consistent with the specification of the 552 Patent. Petitioner
`
`respectfully submits that the following terms should be construed for this IPR:
`
`6.2.1.
`The terms “contact region” or “contact opening” are express limitations of
`
`“contact region/opening” (claims 1, 4, 7, 8, and 12)
`
`independent claims 1 and 8 and dependent claims 4, 7, and 12 of the 552 Patent.
`
`-13-
`
`
`

`
`Petition for Inter Partes Review of U.S. Patent No. 6,784,552
`
`Claim 1 requires “a contact region in said first insulating layer.” SAMSUNG-
`
`1001, 552 Patent at Claim 1. Similarly, claim 8 requires “a contact opening in a
`
`region adjacent to a second electrically conductive material formed on the
`
`substrate.” Id at Claim 8. Dependent claims 4, 7, and 12 simply recite the contact
`
`region of the independent claims. A person of ordinary skill in the art would have
`
`understood that the plain and ordinary meaning of “contact region” or “contact
`
`opening” is “contact opening or via” in the context of the 552 Patent. SAMSUNG-
`
`1003, Fair Decl. ¶¶ 77-80.
`
`First and foremost, the 552 Patent expressly defines “contact opening” and
`
`“contact region” as “contact openings and/or vias.” SAMSUNG-1001, 552 Patent
`
`at 1:38-41 (“For purposes of the claimed invention, henceforth ‘contact opening’
`
`or ‘contact region’ will be used to refer to contact openings and/or via[s].”).
`
`Where the patentee has defined a term “clearly, deliberately, and precisely,” there
`
`is no need to look “further for its meaning.” Sinorgchem Co., Shandong v. Int’l
`
`Trade Com