US 20060274843A1
`
`(19) United States
`
`(12) Patent Application Publication (10) Pub. No.: US 2006/0274843 A1
`
`Koo et a1.
`(43) Pub. Date:
`Dec. 7, 2006
`
`(54) APPARATUS AND METHOD FOR
`TRANSMITTING/RECEIVING PREAMBLE
`SIGNAL IN A WIRELESS COMMUNICATION
`SYSTEM
`
`(30)
`
`Foreign Application Priority Data
`
`Jun. 1, 2005
`
`(KR) ................................ .. 0046508-2005
`
`Publication Classification
`
`Inventors:
`
`Jin—Kyu Koo, Suwon-si (KR);
`Chang-Ho Suhl Seongnam-si (KR);
`Sung-Kwon Hong, Seoul (KR);
`Young-Kyun Kim, Seongnam-si (KR);
`Dong-Seek Park, Yongin-si (KR);
`Young-Kwon Cho, Suwon-si (KR)
`
`(51)
`
`Int. (:1.
`H04L 27/06
`(2006.01)
`(2006.01)
`H04L 7/00
`(2006.01)
`H04K 1/10
`(52) u.s.c1.
`...........................375/260;375/343;375/354
`
`(57)
`
`ABSTRACT
`
`Correspondence Address:
`DILVVORTH & BARRESE, LLP
`333 EARLE OVINGTON BLVD.
`UNIONDALE, NY 11553 (US)
`
`Assignee: Samsung Electronics Co., Ltd., Suwon-
`si (KR)
`
`Appl. No:
`
`11/444,782
`
`Filed:
`
`Jun. 1, 2006
`
`302
`
`303
`
`RF
`PROCESSOR
`
`PRIMARY SYNCHRONIZATION ESTIMATOR
`
`SECONDARY SYNCHRONIZATION ESTIMATOR
`
`An apparatus and method for transmitting/receiving a multi-
`fimctional preamble signal
`in a wireless communication
`system are provided. In an apparatus for transmitting a
`preamble signal in a wireless communication system, a first
`generator generates a predetermined ZAC sequence. A cir-
`cular shifter circular-shifts the ZAC sequence according to
`a BS ID. A second generator generates a sequence in which
`samples of the ZAC sequence alternate with samples of the
`circular-shifted sequence. A repeater generates a baseband
`preamble signal by repeating the sequence received from the
`second generator.
`
`CHANNEL ESTIMATOR
`
`PETITIONERS 1063-0001
`IPR2016-00758
`
`

`

`60027,
`
`Sheet 1 of 10
`
`US 2006/0274843 A1
`
`c.eDn0fi3cHbUPn0u"acHD.pAtnetaD:
`
`PETITIONERS 1063-0002
`IPR2016-00758
`
`

`

`c.eD
`
`60027.,
`
`01f02teehS
`
`US 2006/0274843 A1
`
`mOmwwOOEm“E
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`Patent Application Publication
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`wOZmDOmw
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`PETITIONERS 1063-0003
`IPR2016-00758
`
`

`

`Patent Application Publication Dec. 7, 2006 Sheet 3 0f 10
`
`US 2006/0274843 A1
`
`RF
`PROCESSOR
`
`302
`
`>
`
`303
`
`I
`PRIMARY SYNCHRONIZATION ESTIMATOR
`
`SECONDARY SYNCHRONIZATION ESTIMATOR
`
`CALCU LATOR
`
`CONJUGATOR
`'H N
`
`CHANNEL ESTIMATOR
`
`FIGS
`
`400
`
`401
`
`'
`
`COARSE SYNC
`
`.
`
`MAXIMUM
`VALUE
`DETECTOR
`
`ABSOLUTE
`VALUE
`
`PETITIONERS 1063-0004
`IPR2016-00758
`
`

`

`DDRRELATE FIRST N/2 SAMPLES
`I
`WITH LAST N/2 SAMPLES
`
`5
`
`05
`
`507
`
`PEAK DETECTED?
`
`NO
`
`YES
`
`DETERMINE COARSE TIMING
`
`09
`
`Patent Application Publication Dec. 7, 2006 Sheet 4 0f 10
`
`US 2006/0274843 A1
`
`503
`
`EXTRACT N SAMPLES AFTER m
`SAMPLES FROM PREDETERMINED
`POSITION
`
`5 m 511
`
`PETITIONERS 1063-0005
`IPR2016-00758
`
`

`

`US 2006/0274843 A1
`
`COMMON
`SEQUENCE
`GENERATOR
`
`SAMPLE
`EXTRACTOR
`
`DOWNSAMPLER
`
`FINE SYNC
`
`607
`
`MAXIMUM
`VALUE
`DETECTOR
`
`ABSOLUTE
`‘ VALUE
`
`Patent Application Publication Dec. 7, 2006 Sheet 5 0f 10
`
`CALCULATOR
`
`PETITIONERS 1063-0006
`IPR2016-00758
`
`

`

`Patent Application Publication Dec. 7, 2006 Sheet 6 0f 10
`
`US 2006/0274843 A1
`
`ACQUIRED ODD-NUMBERED V
`SAMPLES
`
`CORRELATE ODD-NUMBERED
`SAMPLES WITH COMMON
`
`SEQUENCE
`
`PETITIONERS 1063-0007
`IPR2016-00758
`
`

`

`US 2006/0274843 A1
`
`DOWNSAMPLER
`
`CONJUGATOR
`
`MAXIMUM
`VALUE
`DETECTOR
`
`ABSOLUTE
`VALUE ,
`
`800
`
`SAMPLE
`EXTRACTOR
`
`am
`
`802
`
`IST
`DOWNSAM PLER
`
`SHIFTER
`
`Patent Application Publication Dec. 7, 2006 Sheet 7 0f 10
`
`CALCULATO -T
`
`PETITIONERS 1063-0008
`IPR2016-00758
`
`

`

`Patent Application Publication Dec. 7, 2006 Sheet 8 0f 10
`
`US 2006/0274843 A1
`
`START
`
`EXTRACT N SAMPLES STARTING
`FROM- FINE TIMING
`
`L
`90‘
`
`ACQUIRE ODD-NUMBERED SAMPLES
`AND EVEN-NUMBERED SAMPLES
`
`g 3
`0
`
`CIRCULAR-SHIFT ODD—NUMBERED ‘
`SAMPLES m TIMES
`
`,CORRELATE CIRCULAR-SHIFTED
`SEQUENCE WITH EVEN-NUMBERED
`SAMPLES
`
`913
`
`'
`
`9n
`
`PEAK DETECTED?
`
`‘YES
`
`DETERMINE m AS CelLid
`
`PETITIONERS 1063-0009
`IPR2016-00758
`
`

`

`US 2006/0274843 A1
`
`m(1sm<2*Cell_id.)
`
`1001
`
`PREAMBLE
`SEQUENCE
`
`Patent Application Publication Dec. 7, 2006 Sheet 9 0f 10
`
`GENERATOR
`
`PETITIONERS 1063-0010
`IPR2016-00758
`
`

`

`Patent Application Publication Dec. 7, 2006 Sheet 10 0f 10
`
`US 2006/0274843 A1
`
`CALCULATE CHANNEL-
`
`CIRCULAR-SHIFT KNOWN
`PREAMBLE SEQUENCE m TIMES‘
`
`RESPONSE COEFFICIENT Mm)
`
`PETITIONERS 1063-0011
`IPR2016-00758
`
`

`

`US 2006/0274843 Al
`
`Dec. 7, 2006
`
`_
`
`circularishiffimj)
`
`{ non—zero, m = 0
`0. m .4: 0
`
`I
`
`circular,shift(z(n})
`m
`
`denotes a function of circular—shifting an input sequence
`being a factor In times. Thus. the auto—correlation of a ZAC
`sequence is a non-zero and the correlation between the ZAC
`sequence and its circular-shifted version is zero. For
`example, the ZAC sequence can be created by Fast Fourier
`Transform (FED—processing signals having the same ampli—
`tude. The simplest example is (1,], —l,l).
`
`system,
`
`If each BS uses a different preamble sequence, it is
`[0012]
`idcntificd by the prcamblc. Howcvcr, sincc thc uscr tcrminal
`does not know what sequence is received during synchro—
`nization estimation, it has to detect the sequence by corre-
`lating the sequence with every possible sequence. This is a
`considerable constraint in terms of computation volume.
`Accordingly, there exists a need for a new preamble struc—
`ture for supporting the above three functionalities and fine
`synchronization functionality simultaneously, while reduc-
`ing the computation volume.
`SUMMARY OF TH:
`
`APPARATUS AND IVIETIIOD FOR
`TRANSMITTING/RECEIVING PREAMBLE
`SIGNAL IN A WIRELESS COMMUNICATION
`SYSTEIVI
`
`PRIORITY
`
`[0001] This application claims priority under 35 U.S.C. §
`119 to an application entitled “Apparatus and Method for
`Transmitting/Receiving Preamble Signal in a Wireless Com-
`munication System” filed in the Korean Intellectual Property
`Office on Jun. 1, 2005 and assigned Serial No. 2005-46508,
`the contents of which are incorporated herein by reference.
`
`BACKGROUND OF THE INVENTION
`
`[0002]
`
`1. Field of the Invention
`
`[0003] The present invention relates generally to an appa—
`ratus and method for transmitting/receiving a preamble
`signal in a wireless communication system, and in particular,
`to an apparatus and method for transmitting/receiving a
`multi-purpose preamble signal,
`
`[0004]
`
`2. Description of the Related Art
`
`In a wirclcss communication systcm supporting
`[0005]
`wireless communication service,
`a Base Station (BS)
`exchanges signals with a user terminal in frames. Thus BSs
`have to mutually acquire synchronization for frame trans-
`mission and reception. For synchronization acquisition, the
`BS transmits a synchronization signal such that the user
`terminal can detect the start of a frame. The user terminal
`detects frame timing from the synchronization signal and
`demodulates a received frame based on the frame timing.
`Typically, thc synchronization signal is a prcamblc scqucncc
`preset between the BS and the user terminal.
`
`[0006] The most significant function of the preamble
`sequence is frame synchronization. The preamble can be
`additionally designed for supporting other functions simul-
`taneously. For this, a modification has to be made to the
`structure of the preamble sequence. The functionalities that
`thc prcamblc scqucncc can support and prcamblc scqucncc
`structure requirements for implementing the functionalities
`are presented as follows.
`
`l. Framc synchronization and frequency offsct
`[0007]
`estimation: recursive in time.
`
`2. BS identifier (ID): different preamble sequence
`[0008]
`for diifcrcnt BS.
`
`3. Channel estimation: Zero Auto-Correlation
`[0009]
`(ZAC) property for preamble sequence.
`
`[0010] As described above, the preamble sequence must
`be recursive in time to provide frame synchronization and
`frequency offset estimation. This is a requirement for coarse
`synchronization. For fine synchronization, synchronization
`must be estimated based on the correlation property of a
`sequence.
`
`[0011] The ZAC property is required to estimate an opti—
`mum impulse response coeificient. Equation (1) below is
`shown for a sequence of length N having the ZAC property,
`2(11),
`
`
`
`INVENTION
`
`[0013] An object of the present invention is to substan-
`tially solve at least the above problems and/or disadvantages
`and to providc at least thc advantagcs bclow. Accordingly, an
`object of the present invention is to provide an apparatus and
`method for transmitting/receiving a multi-functional pre-
`amble signal in a wireless communication system.
`
`[0014] Another object of the present invention is to pro—
`vide an apparatus and method for transmitting/receiving a
`preamble signal supporting timing synchronization,
`fre-
`quency offset estimation, BS identification, and channel
`cstimation in a wirclcss commtmication systcm.
`
`invention is to
`[0015] A further object of the present
`provide an apparatus and method for transmitting/receiving
`a preamble signal having the [AC property in a wireless
`communication systcm.
`
`Still another object of the present invention is to
`[0016]
`provide an apparatus and method for reducing computation
`volumc at a receiver when a BS is identified by a prcamblc
`signal in a wireless communication system.
`
`[0017] Yet another object of the present invention is to
`providc an apparatus and method for pcrforming coarsc
`synchronization, fine synchronization, frequency offset esti—
`mation, BS identification, and channel estimation using a
`preamble signal in a wireless commLmication system.
`
`[0018] The above objects are achieved by providing an
`apparatus and method for transmitting/receiving a multi-
`functional preamble signal
`in a wireless communication
`
`PETITIONERS 1063-0012
`IPR2016-00758
`
`

`

`US 2006/0274843 Al
`
`Dec. 7, 2006
`
`[0027: FIG. 4 is a detailed block diagram schematically
`illustrating a primary synchronization estimator illustrated
`in FIG. 3 according to the present invention;
`
`[0028: FIG. 5 is a flowchart illustrating an operational
`algorithm of the primary synchronization estimator accord-
`ing to the present invention;
`
`[0029: FIG. 6 is a detailed block diagram schematically
`illustrating a secondary synchronization estimator illustrated
`in FIG. 3 according to the present invention;
`
`receiver acquires a BS ID by determining how much the
`
`[0022] According to sill another aspect of the present
`invention, there is provided a method of receiving a pre-
`amble signal in the wire ess communication system where
`the preamble signal
`is generated by circular-shifting the
`ZAC sequence according to a BS ID, alternating samples of
`a ZAC sequence with samples of the circular-shifted
`sequence, and repeating the resulting sequence; coarse syn—
`chronization is acquired from received samples using an
`iterative property of the preamble signal in time; fine syn-
`chronization is acquired by extracting received samples
`according to the coarse synchronization and correlating
`samples at first positions in the extracted samples with the
`ZAC sequence; and the first positions are even positions or
`odd positions.
`BRIEF DESCRIPTION OF THE DRAWINGS
`
`[0019] According to one aspect of the present invention,
`there is provided an apparatus for transmitting a preamble
`signal in a wireless communication system, having a first
`generator for generating a predetermined ZAC sequence; a
`circular shifter for circular-shifting the [AC sequence
`according to a BS ID; a second generator for generating a
`sequence in which samples of the ZAC sequence alternate
`with samples of the circular-shifted sequence; and a repeater
`for generating a baseband preamble signal by repeating the
`sequence received from the second generator.
`
`[0020] According to another aspect of the present inven—
`tion, there is provided an apparatus for receiving a preamble
`signal
`in the wireless communication system where the
`preamble signal is generated by circular-shifting the ZAC
`sequence according to a BS ID, alternating samples of a
`ZAC sequence with samples of
`the
`circular-shifted
`sequence, and repeating the resulting sequence; a primary
`synchronization estimator acquires coarse synchronization
`from received samples using an iterative property of the
`preamble signal in time; a secondary synchronization esti—
`mator acquires fine sync ironization by extracting received
`samples according to the coarse synchronization; and cor-
`relating samples at first oositions in the extracted samples
`with the ZAC sequence,
`the first positions being even
`positions or odd positions.
`
`[0021] According to a ilrther aspect of the present inven-
`tion, there is provided a method of transmitting a preamble
`signal in a Wireless communication system where a prede—
`termined ZAC sequence is generated and circular-shifted
`according to a BS ID; a areamble sequence is generated in
`which samples of the ZAC sequence alternate with samples
`of the circular—shifted sequence; and a baseband preamble
`signal is generated by reoeating the preamble sequence.
`
`
`
`[0023] The above and other objects, features and advan-
`tages of the present invention will become more apparent
`from the following detailed description when taken in con-
`junction with the accompanying drawings in which:
`
`[0024] FIG. 1 illustrates the structure of a preamble
`sequence according to the present invention;
`
`[0025] FIG. 2 is a block diagram schematically illustrat—
`ing a transmitter for transmitting a preamble signal in a
`wireless cormnunication system according to the present
`invention;
`
`[0026] FIG. 3 is a block diagram schematically illustrat-
`ing a receiver for receiving a preamble signal in the wireless
`communication system according to the present invention;
`
`
`
`[0030: FIG. 7 is a flowchart illustrating an operational
`algorithm of
`the secondary synchronization estimator
`accorcing to the present invention;
`
`[0031: FIG. 8 is a detailed block diagram schematically
`illustrating a cell identifier illustrated in FIG. 3 according to
`the present invention;
`
`[0032: FIG. 9 is a flowchart illustrating an operational
`algorithm of the cell
`identifier according to the present
`invention;
`
`[0033: FIG. 10 is a detailed block diagram schematically
`illustrating a channel estimator illustrated in FIG. 3 accord-
`ing to the present invention; and
`
`[0034: FIG. 11 is a flowchart illustrating an operational
`algorithm of the channel estimator according to the present
`invention.
`
`
`
`DETAILED DESCRIPTION OF THE
`
`
`PR 4 F 4 RRED EMBODIMENTS
`
`
`[0035] Preferred embodiments of the present invention
`will be described herein below with reference to the accom—
`panying drawings. In the following description, well-known
`fluictions or constructions are not described in detail since
`they would obscure the invention in umieeessary detail.
`
`[0036] The present invention provides a method of per-
`forming coarse synehronization, fine synchronization; fre—
`quency 0 “set estimation, base station (BS) identification and
`channel estimation using a preamble signal.
`
`
`
`
`illustrates the structure of a preamble
`[0037] FIG. 1
`sequence according to the present invention. Referring to
`FIG. 1, it is assumed that the length of a preamble except a
`Cyclic Prefix (CP) is N. A ZAC sequence common to all BSs
`is shaded in a second part 102, and it is mathematically
`expressed as {0t(n)}n=lN/4. As noted from the mathematical
`representation, the length of the ZAC sequence is a fourth of
`the preamble length N. The remainder of the second part 102
`is a circular-shift version of the ZAC sequence. The circular
`shift value is a BS ID. A third part 103 is a copy of the
`second part 102 and a first part 101 is a copy of a prede-
`temiined number of last samples of the third part 103. Thus,
`the first part 101 serves as a CP.
`
`[0038] As described above, the preamble sequence is so
`configured as to be iterative in time. Hence, it enables coarse
`synchronization and frequency offset estimation. Since
`every BS uses the common ZAC sequence, a receiver (i.e.
`a terminal) can acquire fine synchronization by detecting the
`time when the common sequence was received.
`
`[0039] After acquisition of the fine synchronization, the
`
`PETITIONERS 1063-0013
`IPR2016-00758
`
`

`

`[0041] FIG. 2 is a block diagram schematically illustrat—
`ing a transmitter for transmitting a preamble signal in a
`wireless communication system according to the present
`invention. Referring to FIG. 2, the preamble transmitter
`includes a cell ID generator 201, a circular shifter 202, a
`common sequence generator 203, a first oversampler 204, a
`second oversampler 205, a delay 206, an adder 207, a
`repeater 208, a Cyclic Prefix (CP) adder 209, a Digital-to-
`Analog Converter (DAC) 210, and a Radio Frequency (RF)
`processor 211 and an antenna.
`
`delay 400 delays the samples by a predetermined time. The
`
`circular shift version of the ZAC sequence is relatively
`shifted from the ZAC sequence.
`
`If the entire preamble sequence takes the properties
`[0040]
`ofa ZAC sequence, the channel impulse response is as long
`as the preamble sequence length. However, it is not in the
`present invention because the entire preamble does not have
`the ZAC property. Nonetheless, if the BS ID is n1, i.e. the
`circular shift value is m, the [AC property is assumed be at
`most 2 m samples. Thus when 2 In is set to be longer than
`an efiective valid delay spread, chalmel estimation is pos—
`sible.
`
`In operation, the common sequence generator 203
`[0042]
`generates a ZAC sequence of a predetermined length, com-
`mon to all BSs. For example, the ZAC sequence is created
`by FFT—processing signals with the same amplitude. The
`circular shifter 202 circular-shifts the ZAC sequence accord-
`ing to a BS ID or a cell ID,
`
`[0043] The first oversampler 204 performs 2x oversam-
`pling on the ZAC sequence by inserting zeroes into samples.
`The second oversampler 205 performs 2x oversampling on
`the sequence received form the circular shifter 202. The
`delay 206 delays the oversample sequence (i.e. oversample
`data) by one sample.
`
`[0044] The adder 207 adds the oversamples from the first
`oversampler 204 to the delayed oversamples from the delay
`206,
`thereby creating sample data corresponding to the
`second part 102 of FIG. 1. The repeater 208 repeats the
`sample data from the adder 207 once, thereby creating the
`second and third parts 102 and 103 of FIG. 1. The CP adder
`209 adds a copy of a predetermined number of last samples
`of the sample data received from the repeater 208 before the
`sample data.
`
`[0045] The resulting preamble signal can be used in any
`frame-based system, For instance, in an OFDM system, the
`sample data from the CP adder 209 is an Orthogonal
`Frequency Division Multiplexing (OFDM) symbol.
`
`[0046] The DAC 210 converts the CP-added sample data
`to an analog signal. The RF processor 211, including a filter
`and a front—end unit, processes the analog signal
`to a
`wireless signal, such as RF, and transmits it via a transmit
`('l'x) antenna.
`
`[0047] FIG. 3 is a block diagram schematically illustrat—
`ing a receiver for receiving a preamble signal in the wireless
`commLmication system according to the present invention.
`Referring to FIG. 3, the preamble receiver includes an RF
`processor 301, an Analog—to—Digital Converter (ADC) 302,
`a primary synchronization estimator 303, a secondary syn-
`chronization estimator 304, a cell
`identifier 305, and a
`channel estimator 306.
`
`US 2006/0274843 A1
`
`Dec. 7, 2006
`
`including a
`In operation, the RF processor 301,
`[0048]
`front—end unit and a filter, downconverts an RF signal
`received on a wireless channel to a baseband signal. The
`ADC 302 converts the analog baseband signal received from
`the RF processor 301 to a digital signal (i.e. sample data).
`
`[0049] The primary synchronization estimator 303 esti-
`mates a coarse timing, which will be described later in detail
`with reference to FIGS. 4 and 5.
`
`[0050] The secondary synchronization estimator 304
`extracts samples of length N/2 according to the coarse
`timing and correlates the odd-numbered sequence of the
`samples with a known common ZAC sequence,
`thereby
`acquiring fine synchronization. The operation of the second—
`ary synchronization estimator 304 will be described later in
`detail with reference to FIGS. 6 and 7.
`
`[0051] The cell identifier 305 extracts samples of length
`N/2 from the fine timing, detects a relative shift value
`between the odd-numbered and even-numbered sequences
`of the extracted samples, and determines a BS ID according
`to the relative shift value. The cell identification operation
`will be described in more detail below with reference to
`FIGS. 8 and 9.
`
`[0052] The channel estimator 306 extracts the samples of
`N/2 from the fine timing and calculates a channel response
`coefficient by correlating the extracted samples with a pre—
`amble sequence corresponding to the BS ID, while shifting
`the preamble sequence by one each time. The operation of
`the channel estimator 306 will be described later in more
`detail below with reference to FIGS. 10 and 11.
`
`[0053] Before detailing the operations of the above com—
`ponents of the receiver,
`the transmission signal and the
`received signal are expressed in Equation (2) below. If the
`Cl’ length is N/8 and the entire preamble sequence is
`{p(n)}n=_N/8+1N,
`the ZAC sequence
`{p(2n—1)n=lN’/4}=
`[0.(11)n=1N/4] and the received signal r(n) is given as set forth
`in Equation (2).
`r(n)=h(n) *1)(rz)+w(n)
`
`(2)
`
`where h(n) denotes a channel impulse response and w(n)
`denotes Additive White Gaussian Noise (AWGN).
`
`the
`invention,
`In accordance with the present
`[0054]
`coarse synchronization is expressed as set forth in Equation
`(3).
`
`coarseisync :
`
`argmax
`m
`
`N/2e1
`
`Z r(m + n)r(m + n + N / 2)x
`11:0
`
`[0055] The configuration of the primary synchronization
`estimator 303 operating according to Equation (3) is illus—
`trated in detail in FIG. 4.
`
`[0056] Referring to FIG. 4, the primary synchronization
`estimator 303 includes a delay 400, a conjugator 401. a
`multiplier 402, an adder 403, an absolute value calculator
`404, and a maximum value detector 405.
`
`In operation, received samples from the ADC 302
`[0057]
`are provided to the delay 400 and the multiplier 402. "he
`
`PETITIONERS 1063-0014
`IPR2016-00758
`
`

`

`US 2006/0274843 A1
`
`Dec. 7, 2006
`
`[0065] The adder 605 sums values received from the
`multiplier 604. The absolute value calculator 606 calculates
`the absolute value of the sum. The maximum value detector
`607 detects the maximum (i.e. peak) of absolute values
`received from the absolute value calculator 606 and deter-
`mines the time of the maximum value as a fine timing. The
`fine timing is transmitted to the cell identifier 305 and the
`channel estimator 306.
`
`[0066] FIG. 7 is a flowchart illustrating an operational
`algorithm of the secondary synchronization estimator 304
`according to the present invention. Referring to FIG. 7, the
`secondary synchronization estimator 304 sets a variable In to
`an initial value ‘0’ in step 701 and extracts N/2 samples after
`in samples from the coarse timing in step 703. The second-
`ary synchronization estimator 304 acquires odd—numbered
`samples from the N/2 samples in step 705.
`
`[0067] The secondary synchronization estimator 304 cor-
`relates the sequence of odd-numbered samples with the
`common sequence (i.e. ZAC sequence) in step 707 and
`compares the correlation results with a threshold value to
`detect a peak in step 709. If the peak is undetected, the
`secondary synchronization estimator 304 increases In by one
`in step 713 and returns to step 703. If the peak is detected,
`the secondary synchronization estimator 304 determines the
`position of the peak as a fine timing in step 711 and ends the
`algorithm.
`
`invention, a cell D (Ce11_id)
`In the present
`[0068]
`acquired by Equation (5) below.
`
`is
`
`In
`
`N/Zel
`
`E
`rrO
`
`r(fineisync+ 1 + 2n)-
`
`cir’cular‘jliift
`m
`(r(fine7sync+ 2n))*
`
`[0069] The configuration of the cell identifier 305 operat-
`
`ing according to Equation (5) is illustrated in detail in FIG.
`8. Referring to FIG. 8, the cell identifier 305 includes a
`samale extractor 800, a first downsampler 801, a circular
`shifter 802, a second downsampler 803, a conjugator 804, a
`mul iplier 805, an adder 806, an absolute value calculator
`807, and a maximum value detector 808.
`
`
`
`the sample extractor 800 extracts
`In operation,
`[0070]
`samflles of length N/2 starting from the fine timing acquired
`by the secondary synchronization estimator 305. The first
`downsampler 801 outputs odd—numbered samples by down—
`samoling the extracted samples to 1/2. The second downsam-
`pler 803 outputs even-numbered samples by downsampling
`the extracted samples to 1/2.
`[0071] The circular shifter 802 circular-shifts the down-
`samoled sequence received from the first downsampler 801
`In times where m is sequentially increased until the maxi-
`mum value detector 808 detects a maximum value (i.e.
`peak). The conj ugator 804 calculates the complex conjugate
`of tie downsampled sequence received from the second
`downsampler 803. The multiplier 805 multiplies the circu-
`lar—shifted sequence by the complex conjugate.
`[0072] The adder 806 adds values received from the
`multiplier 805. The absolute value calculator 807 calculates
`
`predetermined time delay is set so that two samples to be
`multiplied by the multiplier 402 are spaced apart from each
`other by a distance of N/2.
`
`[0058] The conjugator 401 computes the complex conju-
`gates of the delayed samples. The multiplier 402 multiplies
`the current received samples by the conjugated samples. The
`adder 403 adds the current value received from the multi—
`plier 402 to previous (N/2-1) input values. The absolute
`value calculator 404 calculates the absolute value of the sum
`received from the adder 403. The maximum value detector
`405 detects the maximum (or peak) of absolute values
`received from the absolute value calculator 404. and deter—
`mines the time of the maximum value as the coarse timing.
`The coarse timing is transmitted to the secondary synchro-
`nization estimator 304.
`
`[0059] FIG. 5 is a flowchart illustrating an operational
`algorithm of the primary synchronization estimator accord—
`ing to the present invention. Referring to FIG. 5, the primary
`synchronization estimator 303 sets a variable m to an initial
`value ‘0’ in step 501 and extracts N samples, starting from
`a position 1n samples apart from a predetermined start in step
`503. In step 505, the primary synchronization estimator 303
`correlates the first N/2 samples with the last N/2 samples.
`
`In step 507, the primary synchronization estimator
`[0060]
`303 compares the correlation with a threshold to detect a
`peak. If the peak is not detected, the primary synchroniza—
`tion estimator 303 increases in by one in step 511 and returns
`to step 503. If the peak is detected, the primary synchroni-
`zation estimator 303 determines the position of the peak as
`a coarse timing in step 509 and terminates the algorithm.
`
`In the present invention, the fine synchronization is
`[0061]
`acquired by Equation (4) below.
`
`fine sync =
`
`coarse;ync +
`
`argmax
`m
`
`N/2 7 1
`
`It : 0
`
`rtcoarseisync + m + 2n)a(n + 1:0
`
`[0062] The configuration of the secondary synchroniza-
`tion estimator 304 operating according to Equation (4) is
`illustrated in detail in FIG. 6.
`
`[0063] Referring to FIG. 6. the secondary synchronization
`estimator 304 includes a sample extractor 600, a downsam-
`pler 601, a conjugator 602, a common sequence generator
`603, a multiplier 604, an adder 605, an absolute value
`calculator 606, and a maximum value detector 607.
`
`In the present invention, the sample extractor 600
`[0064]
`in operation, buffers samples of a predetermined period
`starting from the coarse timing acquired by the primary
`synchronization estimator 304 and extracts N/2 samples,
`thereby changing the start position of the buffered samples.
`The downsampler 601 downsamples the extracted samples
`to 1/2, i.e. extracts the odd-numbered samples of the samples
`from the sample extractor 600. The conjugator 602 calcu-
`lates the complex conjugates of the downsamples. The
`common sequence generator 603 generates
`the ZAC
`sequence common to all BSs. The multiplier 604 multiplies
`the [AC sequence by the sequence received from the
`conjugator 602.
`
`PETITIONERS 1063-0015
`IPR2016-00758
`
`

`

`the absolute value of the sum. The maximum value detector
`808 detects the maximum (i.e. peak) of absolute values
`received from the absolute value calculator 807 and deter—
`mines a circular shift value m corresponding to the maxi-
`mum value as a BS ID (Cell_id). The BS ID is provided to
`the charmcl estimator 306.
`
`[0073] FIG. 9 is a flowchart illustrating an operational
`algorithm of the cell identifier 305 according to the present
`invention. Referring to FIG. 9,
`the cell
`identifier 305
`extracts samples of length N/2 starting from the fine timing
`in step 901 and acquires odd-numbered samples and even-
`numbered samples in step 903.
`
`In step 905, the cell identifier 305 sets a variable m
`[0074]
`to an initial value ‘ l ’. The cell identifier 305 circular-shifts
`the sequence of odd—nurnbered samples In times in step 907
`and correlates
`the circular-shifted sequence with the
`sequence of even-numbered samples in step 909.
`
`the chamrel response
`invention,
`In the present
`[0076]
`coefficient h(m) is computed by Equation (6) below.
`
`N/Zrl
`
`circularishift
`m e
`1
`1pm + l))‘
`
`In step 911, the cell identifier 305 compares the
`[0075]
`correlation with a threshold value for detecting a peak. If the
`cell identifier 305 fails to detect the peak, it increases m by
`l in step 915 and returns to step 907. Upon detection of the
`peak, the cell identifier 305 determines a circular shift value
`in corresponding to the peak as a BS ID in step 913 and ends
`the algorithm. While peak detection is carried out, increas-
`ing m by l in the algorithm, it can be further contemplated
`that m is increased by the offset between BSs and the
`position of a peak is detected by fine adjustment.
`
`ZAC sequence;
`
`US 2006/0274843 Al
`
`Dec. 7, 2006
`
`h(m) is calculated with respect to at most twice the BS ID
`(Cell_id) so that the ZAC property of a preamble sequence
`is maintained.
`
`[0081] FIG. 11 is a flowchart illustrating an operational
`algorithm of the channel estimator 306 according to the
`present invention. Referring to FIG. 11. the channel esti—
`mator 306 extracts N/2 samples starting from the fine timing
`in step 1101 and sets a variable m to an initial value ‘1 ’ in
`step 1103. ln step 1105, the channel estimator 306 circular-
`shifts a preamble sequence of length N/2 acquired according
`to the BS ID m—l times.
`
`
`
`
`[0082] The charmel estimator 306 calculates a charmel
`response coe icient h(m) by correlating the N/2 samples
`with the circular- shifted sequence in step 1107 and compares
`m with (2xCelliid) in step 1109. If m is less than (2xCel—
`l_id), the channel estimator 306 increases In by one in step
`1111 and returns to step 1105. If m is at least 2><Cell_id, the
`channel estimator 306 ends the algorithm.
`
`invention as
`In accordance with the present
`[0083]
`described above,
`the preamble structure provides highly
`accurate timing synchronization and chamiel estimation
`performance and enables BS ID estimation with a less
`computation volume. In addition, since a known frequency
`offset estimation algorithm can be applied with the preamble
`structure, a single preamble sequence supports various func-
`tions including timing synchronization.
`
`[0084] While the present invention has been shown and
`described with reference to certain preferred embodiments
`thereof, it will be turderstood by those skilled in the art that
`various changes in form and details may be made therein
`without departing from the spirit and scope of the invention
`as defined by the appended claims.
`What is claimed is:
`1. An apparatus for transmitting a preamble signal in a
`wireless communication system, comprising:
`
`a first generator for generating a Zero Auto—Correlation
`(ZAC) sequence,
`
`a circular shifter for circular-shifting the ZAC sequence
`according to a Base Station (BS) Identifier (ID);
`
`a second generator for generating a sequence in which
`samples of the ZAC sequence alternate with samples of
`the circular-shifted sequence; and
`
`a repeater for generating a baseband preamble signal by
`repeating the sequence received from the second gen-
`erator.
`
`2. The apparatus of claim 1, further comprising:
`
`a guard interval adder for adding a guard interval to the
`baseband preamble signal;
`
`a digital-to-analog converter for converting sample data
`received from the guard interval adder to a baseband
`analog signal; and
`Radio Frequency (RF) processor for processing the
`baseband analog signal to an RF signal and transmitting
`the RF signal.
`3. The apparatus of claim 1. wherein the second generator
`comprises:
`
`a first oversampler for performing 2x oversampling on the
`
`Z r(fine,sync+ n)-
`n70
`mail
`2 r(flne,sync + ")2
`n:0
`
`h(m) :
`
`where l §m<2><CelLid
`
`[0077] The configuration of the channel estimator 306
`operating according to Equation (6) is illustrated in detail in
`FIG. 10.
`
`[0078] Referring to FIG. 10, the channel estimator 306
`includes a sample extractor 1000, a preamble seque