Europiilsches Petentamt
`
`European Patent Office
`
`Oflloe européen des brevets
`
` |l|||||ilillilillllllIlilllllliillillillllllililllllllillililllillillll
`
`® Publication number:
`
`0166 441 B1
`
`EUROPEAN PATENT SPECIFICATION
`
`Q Q
`
`?)
`
`@ Date oi publication oi patent specification: 04.03.92 ED Int. Cl.5 H04-L 12/28. GOBF 13/42,
`G06F ‘l5i16
`
`@ Application number: 351079513
`
`(9 Dale of filing: 27.06.35
`
`@ computer network.
`
`Priority: 29.03.34 us 625944
`
`Date oi publication of application;
`02.01.86 Bulletin BEIO1
`
`Publication oi the grant of the patent:
`04.03.92 Bulletin 92!10
`
`Designated Contracting States:
`DE FR GB IT NI.
`
`Fieierences cited:
`FH-A- 2 214 335
`US-§- 3 552 993
`US-Ar 4 322 349
`
`PATENT ABSTRACTS OF JAPAN. vol. 7. no.
`80 (E-16B}[1225], 2nd Aprli 1983; 8. JP-A-58
`7949 (OK! DENKI KOGYO K.i(.] 17-01-1933
`
`® Proprietor: Hewlett-Packard Company
`Mail Stop 20 B-O. 3000 Hanover Street
`Palo Alto. California B4304{US}
`
`@ Inventor: Caine. Nathanael T.
`777 South Mathilda Ave
`
`Sunnyvale California 94iJ87{US)
`lrwenlor: Simon. Jean-Jacques
`6 Rue du Fournet
`
`F-38120 Saint-Egreve{FR)
`
`Representative: Liesegang. Roland. Dr. et ai
`BOEHMEFIT 8: BOEHMERT Widenn1ayer-
`strassa 4!!
`
`W-8000 Illliinchen 22(DE}
`
`EP0166441B1
`
`Note: Within nine months from the publication oi the mention of the grant oi the European patent. any person
`may give notice to the European Patent Office of opposition to the European patent granted. Notice of opposition
`shall be filed in a written reasoned statement. it shall not be deemed to have been filed until the opposition fee
`has been paid (Ari. 99(1) European patent convention).
`
`PMC Exhibit 2087
`PMC Exhibit 2087
`Apple v. PMC
`Apple v. PMC
`IPR2016-00753
`|PR2016—00753
`Page 1
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`EP 0166 441 B1
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`Description
`
`Prior art networks are shown in Figures 1-3. Figure 1 shows a star network where a plurality of network
`devices 11 through 16 are coupled as shown to a central device 10. Figure 2 shows a bus network where
`centrai device 10 and network devices 11 through 16 are all coupled as shown to a bus 20. In figure 3.
`central device 10 and network devices 11 through 16 are coupled in a loop network wherein information
`flows around the loop in a specified direction.
`US-A-4.322.849 describes a data relay system for accessing large quantities of data. In the said system
`the data relays serve to receive data and to transmit these data to the host device. The host device gives
`addresses to the data relays.
`is known to set a plurality oi terminals to a loop transmission mode by a
`From JP-A-56-105129 it
`detecting signal and a loop pole command. According to the said system a so-called poling telegramm is
`transmitted between different terminals.
`
`The obiect underlying the invention is to provide a network according to the pre-characterizing clause of
`the main claim. all the elements ol the network can communicate with one another by not only transmitting
`data from the network devices to the central device. but also from the central device to any network device.
`According to the invention the above object is aimed by a network according to ciaim 1.
`Preferred embodiments of the invention are claimed in the subclaims.
`
`In accordance with claim 1. a network is presented having substantial advantages over each of the
`above-mentioned networks. According to an underlying concept of the invention. each network device of the
`network is provided with a send path comprising a send input and a send output for receiving data signals
`from the preceding device in the chain and for transmitting data signals to the succeeding device in the
`chain as well as with a return path comprising a return input and a return output for receiving data signals
`from the succeeding device and for transmitting data signals to the preceding device. Each network device
`comprises means lor seiectively connecting its send path to its return path such that data signals coming
`from a preceding device can be directed to the return path of the device. thus providing a transmission path
`for the data signals back through all preceding devices of the network and finally into the central device.
`In the network according to the invention. the network devices are coupled serially, thus forming a chain
`of devices. Data signals are transferred from the central device through each network device until a last
`network device in the chain is reached. The last network device returns the data signals to the central
`device back through the network devices.
`It a new device is to be added to the chain. the send input and the return output of the new device are
`connected to the send output and the return input. respectively. of the last device in the chain. and the
`connection between the send output and the return input of the last device is opened and a connection
`between the send output and the return input of the added device is established. Thus. a new device can
`simply be attached just by connecting the send output and the return input of the last device with the send
`input and the return output of the new device. respectively.
`Relative to the star and the bus networks. the network according to claim 1 has the advantage that there
`need not exist an information path for every network device directly to the central device and that the
`addition of network devices to the network is not limited by the number of available connection ports to the
`centrai device or to the bus.
`
`Relative to the loop network. the network according to claim 1 has the advantage that network devices
`can be added without requiring to break prior connections and that the network device to be added has to
`be coupled only to a single device.
`According to claim 2. data signals between the network devices can be transmitted in a bit serial
`manner. so that the interconnection between devices requires only two lines. one for the send path and one
`lor the return path.
`According to claim 4. the power lines for the various devices and the two data transmission lines can be
`combined in one cable.
`In this case. each device comprises a first receptacle for accepting the two data
`lines and the power lines from the preceding device and a second receptacle for accepting the two data
`lines and the power lines extending to the succeeding device. Thus. a new device can be added to the
`network and power can be supplied to the new device simply by plugging one end of a cable into the
`device to be added and the other end into the last device in the chain of network devices.
`
`Subsequentiy. an embodiment of the invention is explained in detail with reference to the drawings.
`Figure 1, Figure 2, and Figure 3 show prior art networks.
`Figure 4 shows a network in accordance with the preferred embodiment of the present invention.
`Figure 5 shows a network in accordance with the preferred embodiment of the present invention
`incorporated in user oriented devices.
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`PMC Exhibit 2087
`PMC Exhibit 2087
`Apple v. PMC
`Apple v. PMC
`IPR2016-00753
`|PFt2016—00753
`Page 2
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`EP 0166 441 B1
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`Figure 6A and Figure 68 show a network device in accordance with the preferred embodiment of the
`present invention.
`Figure 7 shows a 15-bit data frame used with the network shown in Figure 5.
`Figure 4 shows a network architecture in accordance with a preferred embodiment of the present
`invention. A central device 41 is coupled serially to network devices 42. 43. 44. and 45. Information from
`central device 41 flows through data paths 51. 52. 53. and 54. Network device 45 receives information from
`data path 54 and returns information through network devices 44. 43. and 42 to central device 41. by way of
`data paths 64. 63, 62. and 61.
`Figure 5 shows how the network architecture shown in Figure 4 may be incorporated in a network for
`user oriented devices. A network interface device 71 may form part of a computer system. Within network
`interface device 71 may reside. for instance. a microprocessor 111 such as a 8086 manufactured by Intel
`Corporation of Santa Clara. California. and a central processor 81. Central processor 81 may be any
`processor or series of processors capable of handling the protocol described below. Through a send data
`path 91 and a return data path 101. central processor 81 is coupled to a network processor 82. Network
`processor 82 is coupled to a network processor 83 through a send data path 92 and a return data path 102.
`Network processor 83 is coupled to a network processor 84 through a send data path 93 and a return data
`path 103. Network processors 32. 33. and 84 may each be any processor or series of processor capable of
`handling the protocol described below.
`Network processor 82 is coupled to a microcontroller 112 within a user oriented device (touchscreen
`circuit} 72. network processor 83 is coupled to a microcontroller 113 within a user oriented device {keyboard
`circuit} 73. and network processor 84 is coupled to a microcontroller 114 within a user oriented device
`(mouse circuit) 74. Microcontrollers 112-114 may each be. for instance. a COP 420. a COP 440 or a GOP
`2440. all of which are manufactured by National Semiconductor Corporation of Santa Clara. California.
`Microcontroller 112 is shown coupled to a touchscreen 122 through a touchscreen interface 122a.
`Microcontroller 113 is shown coupled to a keyboard 123. and microcontroller is shown coupled to a ball 124
`through encoders 124a and 124b.
`Additional network devices can be added to the network shown in Figure 5 through a port 134a and a
`port t34b. Port 134a is coupted to network processor 84 through a send data path 94. and port t34b is
`coupled to network processor 84 through a return data path 104. Network processors 82-84 along with any
`other processors added are collectively referred to as a (the) link. A power line 109 and a ground line 99
`may also be coupled from network interface device 71 to each user oriented device 72-74 so that user
`oriented devices 72 - 74 do not need a separate power Supply.
`Figure 6A shows how information flows through network processor 83. Information from send data path
`92 flows in into network processor 83. is processed by an information processor 83a and flows out to send
`data path 93. Information from return data path 103 flows directly through network processor 83 to return
`data path 102. Because network processor 83 sends information it receives to data path 93. it is said to be
`in passthrough mode.
`Figure 6B shows how information flows through network processor 84. Information from send data path
`93 flows into network processor 84, is processed by an information processor 84a and is directed to flow
`out to return data path 103.
`If another network processor were added to ports 134a and 134-b (shown in
`Figure 5}.
`then information paths within network processor 84 would be configured to be similar to the
`information paths within network processor 83 (as shown in Figure 6A). Because network processor 34
`sends information back on return data path 103 it is said to be in loop back mode.
`Many different protocols may be used by the network architecture. One embodiment. given as an
`example. sends data serially in fifteen bit data “frames”. A frame 140 is shown in Figure 7. Bit 141 is a start
`bit indicating that a frame follows. In this embodiment. start bit 141 is always a "0".
`Bits 142-144 are address bits. Address bits 142-144 may be used to address up to seven user oriented
`devices. leaving an address (000) to be used as a universal address.
`A bit 145 is a "1" if frame 140 contains data and a "0" if frame 140 contains an encoded command.
`
`Bits 146 - 153 contain a byte of data or an encoded command as indicated by bit 145. Bit 154 is a parity bit
`used for error detection. Bit 155 is a stop bit. in this embodiment always a "1
`Upon initial activation, or whenever user oriented devices are added or subtracted from the network
`shown in Figure 5. each user oriented device needs to be assigned an address. The process of assigning
`addresses to each user oriented device in the network is called configuration. Configuration may be
`performed as follows.
`Central processor 31 first sends out a Device Hard Reset command (FEM... see below for a table of
`commands and their hexadecimal representation). The Device Hard Reset command is sent with the
`universal address (000). Network processor 82 receives the Device Hard Reset command. resets microcon-
`PMC Exhibit 2087
`PMC Exhibit 2087
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`Apple v. PMC
`IPR2016-00753
`|PR2016—00753
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`EP 0166 441 B1
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`troller 112. and retransmits the Device Hard Reset Command to Network processor 83. Network processor
`83 resets microcontroller 113 and retransmits the Device Hard Fteset Command to Network processor 84.
`and so on. Upon receipt of the Device Hard Reset Command each network processor 82-84 goes into loop
`back mode.
`
`Central processor 81 then individually assigns each network processor 82-84 an address. Central
`processor 81 sends an Interface Clear (IFC) Command (DOM) with a universal address. Upon receipt and
`after performing a self test operation to assure its interface with microcontrofler 112. network processor 82
`loops the IFC command directly back to central processor 81.
`Central processor 81 then sends an Auto Configure command (09...,..).using the universal address.
`Network processor 82 receives the Auto Configure command. notes that it is device #1. increments the Auto
`Configure command from 09...,“ to 0A.,..,.. and loops the Auto Configure command directly back to central
`processor 81.
`At
`this point central processor is done configuring network processor 82. so it sends to network
`processor 82 an Enter Passthrough Mode command (01) with an address {in address bits 142-144) of 1,..,,..
`Network processor 82 then goes into passthrough mode {meaning it will then pass through all messages it
`receives to Network processor 83). The Passthrough Mode command is torwarded to network processor 83.
`which loops the message back to centrai processor 81 through network processor 82.
`Central processor 81 is now ready to configure network processor 83. Central processor 81 sends an
`IFC command to network processor 82. Since network processor is already configured it
`ignores this
`command and forwards the IFC command to network processor 83. Network processor loops the IFC
`command back to central processor 81.
`Central processor 81 then sends an Auto Configure command (09). Network processor 82 receives the
`command. increments the D9,.” to DAM. and retransmits the command to network processor 83. Network
`processor 83 receives the Auto Configure command. notes that it is device #2.
`Network processor 33 then increments the Auto Configure command from DAM»: to 0Bm and loops the
`command back to central processor 81.
`At
`this point central processor is done configuring network processor 83. so it sends to network
`processor 83 an Enter Passthrough Mode command (01) with an address (in address bits 142-144) of 2...“.
`Network processor 32 receives this command. notes that it is not addressed to Device #1. and so merely
`passes the message on to Network processor 83. Network processor 83 sees that the Enter Passthrough
`Mode command is addressed to it {Device #2). so it goes into passthrough mode (meaning it will then pass
`through all messages it receives to Network processor 84).
`Central processor repeats the above configuring sequence with network processor 84. and with as
`many other network processors as are coupled to the network. The Auto Configure command is incre-
`mented by each network processor before sending it to the next network processor {if it is in passthrough
`mode) or back to the central processor (If
`it
`is in Ioopback mode). The Auto Configure command is
`incremented in the following sequence as it travets through each network processor:
`09 -> DA -> DB -> 00 -> 0D -> GE -> OF -> 08
`
`If a network processor receives an Auto Configure command which has been incremented to (08). then
`it knows that there are more than seven devices on the line. The network processor receiving a 08,.“ in bits
`146-153 would generate a Configure Error command (FD...,,.) and sends it back to central processor 81.
`Presumably. at this point an error message is sent to a user who would remove some user oriented device
`from the network. limiting the number to 7.
`If in the course of configuring the network. central processor 81 sends out an Enter Passthrough Mode
`command to a network processor. which is device #n (where n is a positive integer less than or equal to 7}.
`and does not get a command back. then that means that device #n is the last device on the chain. So. after
`waiting for a specified length of time (eg. U60 of a second). central processor 81 sends out an Enter
`Loopback Mode command (02) with addressed to device fin. At this point the network has been configured.
`Now central processor can send an Identify and Describe command (03) to each network processor 32-84.
`to find out what kind of device it
`is and what
`information it provides. The device will respond with a
`descriptor in an agreed upon format.
`Once central processor 81 is ready to receive data from the link, it sends a Poll command (1 Om) with
`the universal address field. Network processor 82 receives this command. and if it has no data for central
`processor 81. it immediately forwards the Poll command to network processor 83. If network processor 82
`does have information to return it performs the following sequence:
`(1) transmits a poll response header frame with an address of the, indicating the data is from device #1.
`The frame would include 8 bits of data in bits 146 - 153 which would inform central processor 81 andror
`microprocessor 111 the format of the data bits to follow.
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`(21 transmits data frames (with an address of 1m}.
`(3) adds a number equal to the number of data frames {the number of data frames would include the pot!
`response frame} transmitted to the low nibble (bits 150-153) oi the original Poll command. and then
`forwards the modified Poll command to network processor 83. For instance. it network processor 82 sent
`out 8 frames. it would increment bits 146-153 to be 18m.
`Network processor 83 performs in a manner similar to network processor 32. However. no more than
`fifteen frames may be sent in response to a Poll command. So.
`if network processor 83 sees that
`its
`response to the Poll command would require it
`to increment bits 150-153 to be greater than 15 (9.-.g..
`it
`network processor 32 sent out 8 frames. network processor 33 could send out 7 or fewer frames). then it
`will send the Poll command on to network processor 84 unmodified. and wait for the next Poll command.
`Central processor 81 receives this data and forwards it
`to microprocessor 111. Central processor 81
`may be prompted by microprocessor 111 to issue additional Poll commands. or central processor 81 may
`do so automatically.
`The following table gives a summary oi the commands listed with the hexadecimal encoded values
`within bits 146-153.
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`Cunnand {hex value):
`00
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`Interface Clear (IFCI
`
`Table 1
`
`Name:
`
`01
`
`02
`
`03
`
`04
`
`D5
`
`06
`
`D7
`
`09 [08 --> OF}
`
`t—>1Fl
`
`{-> 2F}
`
`1 U
`
`20
`
`30
`
`3']
`
`32
`
`30
`
`3E
`
`3F
`
`40
`
`-> 4?
`
`48
`
`-> 4+-
`
`50
`
`—=» FA
`
`F3
`
`F8
`
`FD
`
`FE
`
`FF
`
`Enter Passthrough Mode
`
`Enter Loopback Mode
`
`Identify 6 Describe
`Device Soft Reset
`
`Perfonn Self Test
`
`Cmnnand Trailer
`
`Data Trailer
`
`Auto Configure
`Poll
`
`Repoll
`
`Report Home
`
`Report Status
`not used I reserved
`
`Disable Autorepeat
`
`Enable Autorepeat,
`
`Cursor Rate = 1/30 second
`
`Enable Autorepeat.
`
`Cursor Rate
`
`1/60 second
`
`Prompt 0 -3' 7'
`
`Acknowledge 0 -> ?
`
`not used I reserved
`
`Master Hard Reset
`
`Data Error
`
`Configure Error
`Device Hard Reset
`
`not used I prohibited
`
`PMC Exhibit 2087
`PMC Exhibit 2087
`Apple v. PMC
`Apple v. PMC
`IPR2016-00753
`lPR2016—00753
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`EP 0166 441 B1
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`Claims
`
`1.
`
`the transmission of data signals between serially connected network devices
`A network for
`(42.43.-44.45) and at least one central device (41) for controlling the network devices and for processing
`data signals received from the network devices (42.43.44,45). said central device (41) being coupled to
`the first one (42) of said network devices (-612.43.44.45). each of the network devices (42.43.44,45)
`comprising:
`-
`a sand input being directly or indirectly ccnnectable to a send output of the central device (41).
`-
`a send output having a transmission path from the send input of the network device (42) and
`being connectahle to the send input of a further network device (43).
`a return output being directly or indirectly connectable to a return input of the central device (41)
`for transmitting data signals thereto. and
`a return input having a transmission path to the return output of the network device (42) and being
`connectable to the return output of the further network device (43) tor receiving data signals
`therefrom.
`
`-
`
`-
`
`characterized in that
`
`-
`
`-
`
`-
`
`each network device (42.43.44.45) is capable of receiving data signals from the central device
`(41) via its send input.
`each network device (42,43,44,45) is capable of transmitting data signals to any further network
`device (43.44.45) via its send output.
`each network device (42.43.44.45) is provided with a switching means (8233.84) lor selectively
`interconnecting the send output oi the network device (42.43. 44.45) with its own return input in
`such a manner that
`-
`an interconnection is established only between the send output and the return input of the last
`network device (45) in the network and
`- data signals transmitted to the last network device (45) lrom the preceding device (44) of the
`network are transmitted back to the return input of the preceding device (44).
`
`2.
`
`A network according to claim 1.
`characterized in that the data signals are transmitted bit-serially between the devices (41 .42.43.44.45)
`of the network.
`
`3. A network according to claims 1 or 2.
`characterized in that the central device (41) and each network device (42.43.44.45) comprise means
`to supply power to the subsequent device in the network.
`
`4. A network according to any of the preceding claims.
`characterized in that for supplying power from one device of the network to a subsequent device. a
`pair (99,109) of power lines is connectable with its one end to an output of the device and with its other
`end to an input of the subsequent device. one power line (99) providing a reference potential and the
`other power line (109) providing a supply voltage.
`
`5.
`
`A network according to any of the preceding claims.
`characterized in that each network device comprises an information processor (83a) tor processing
`data signals. the information processor having an input coupled to the send input of the network device
`and an output coupled to the send output of the network device.
`
`Ftevendications
`
`1. Un réseau pour la transmission de signaux de données entre des dispositifs de réseau (42. 43: 44. 45)
`reliés en série et au moins un dispositil central (41) pour commander les dispositifs du réseau et pour
`traiter des signaux de données recus en provenance des dispositifs de réseau (42. 43. 44. 45). [edit
`dispositii central (41) étant relié au premier (42) desdits dispositifs de réseau (42. 43. 44. 45). chacun
`des dispositifs de réseau (42. 43. 44. 45) comprenant :
`— une entrée d‘envoi qui peut étre reliée directement ou indirectement
`
`5: une sortie d'envoi du
`PMC Exhibit 2087
`PMC Exhibit 2087
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`EP 0166 441 B1
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`dispositif central £41}.
`- une sortie ci'envoi comportant une piste do transmission partant oe Fentrée tfenvoi do ciispositif
`do réseau (42) ot poovant étre reliée a |'entrée d‘envoi d'un aotre dispositii {43} do réseau.
`- one sortie do retour pouvant étre reiiée directernent ou indirectement 2 one entree do retour do
`dispositif central {41} poor transmettre des signaox do donnéos it ceiui-ci. el
`- une entrée de retcur cornportant une piste de transmission reliéo A la sortie de retour du
`dispositif do réseao (42) et pouvanl étro reiiéo a la sortie do reioor do |'autre dispositil do réseao
`(43) poor reeevoir dos signeuii de données provenent de celui-ci.
`caractérisé en ce qoe :
`- cheque dispositif de réseau {42. 43, 44. 45} est capable de recevoir dos signaux de données
`provenant do dispositif central {41} par i'interr‘rIédiaire de son entree d'orwoi.
`cheque dispositif de réseau (42. 43, 44. 45) est capable do transmettre des signauai de données ‘a
`tout autro dispositii do résoao {-$3. 44. 45} par |‘intern1édiaire do sa sortie d'envoi.
`cheque dispositif do réseau (42, 43. 44, 45) est pourvu d'on moyen do commutation (82. 33. 84)
`poor intorconnocter séloctivement Ia sortie d‘envoi do dispositil do résoau (42. 43. 44. 45} avoo sa
`propre entree do retour d'une maniére teile que :
`- une interconnoxion soil établio seoiemont entre la sortie d'onvoi et l'entrée do rotour do dornier
`
`-
`
`-
`
`dispositii (45) du réseau et
`- dos signaux do données transmis au domier dispositif {-15} do réseao é partir do dispositif
`precedent (44) sent renvoyés a I'ontrée do retoor du dispositif précédent (44).
`
`Un réseeu selon ia revendication 1. caractérisé en ce que res signaux do données sent transmis aver:
`bits on série entre les dispositifs (41. 42. 43. 44. 45) do résoao.
`
`Un réseao solon tes rovendications 1 co 2. caractérisé on so qoo to dispositif central (411 et cheque
`dispcsitit do réseau (42. 43. 44. 45) oomprennont des moyens pour aiirnentor en coo.-‘ant Ie dispositit
`suivant dans lo réseau.
`
`Un réseao solon one qoelconquo dos rovendications précédentos. caractérisé en ce que. pour qo'orI
`dispositit do réseau alimonto en courant un dispositif suivant, une paire (99. 109} do Iignos d‘aIirnenta-
`tion on courant peuvent étre reliées par une extrérniié .’a one sortie do disoositif et per Ieor aotre
`extrérnité 21 one entrée du dispositif suivant. une ligne d'atimentation (991 ioornissant un potential do
`référertco at |‘au1re ligne d‘alimentation (109) ioornissant une tension d'alirnentation.
`
`Un réseau selon one quelconque des revendications précédentes. caractérisé en ce que cheque
`dispositif do résoao comprend on processour d'information (833) pour trailer dos signaux do données.
`Ie processeur d'inforrnation cornportant une entree reliéo 2-1 1'ontrée d'envoi do dispositii do réseau at
`one sortie reliée a la sortie d'onvoi do ciispositif do réseau.
`
`Patentansprilcho
`
`1. Notzwerk Iiir die Uoertragung von Datonsignalen zwischen sorieli verounclenon Netzwerkeinrichtungen
`i42,-33.44.45) und mindestens einer Zentraleinrichtung (41) zum flberwachen der Netzwerkeinriohtungen
`und zom Vorarbeiton von Datensignalen. die von den Netzworkeinrichlungen (42.-63.44.45) ompfangen
`warden sind. wobei die Zentraieinrichtung (41) mit der ersten (42) der Netzwerkeinrichtungen
`(42.43.-114.45) verbonden ist. wobei jedo der Neizworlreinrichtungen (42.4-3.44,-15) umfafit:
`-
`einen Sendeeingang. der direki odor indirekt mit einem Sendeausgang der Zentraleinrichtung (41)
`i.rerbi'ndbar ist.
`
`-
`
`-
`
`-
`
`einen Sendeausgang. der einen Uoertragungspiad von dem Sendeeingang der Ne!zwerkainricl'I-
`tong (42) urnfafli und mit dem Sondeoingang einer weiteren Notzworkoinrichtung {43} verbindbar
`ist.
`einon Fiiicklaofausgang. der direkt odor indirekt mil oinern Hiicklaufeingang der Zentraioinrichtong
`(41) verhindbar ist. om daran Datensignale zo iibertragen. und
`einen Fiiicklaufeingang. der einen Ubertragungspiad zo dem Rfickiaulaosgang der Notzwerkeiw
`richtung (421 autweist und mit dem Fiijcklaofausgang der weiteren Netzwerlreinrichtung (43)
`verbindbar ist. urn Datensignale davon zu ompfangen.
`dadurch gekennzolchnet. dais
`-
`jedo Netzworkeinrichtung (42.43.-64.45} Datonsignale von der Zentraloinrichtung (41) Liber ihren
`PMC Exhibit 2087
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`Sendeeingang empfangen kann.
`jade Netzwerkeinrichtung
`(42.43.4435) Datansignale an iede waiters Netzwarkeinrichtung
`(43.44.-45) fiber ihren Sendeausgang Ubertragen kann.
`jade Netzwarkainrichtung (42.-43.44.45) aina Schalteinrlchlung (8283.84) zum selektiven Verbin-
`clan des Sendeausgangsdsr Natzwerkeinrichtung (42.43.-84.45) mi! ihrem eigenen Hiicklaufein-
`gang aufwaisl und zwar derart. dafi
`—
`sine Verbinclung nur Zwischen dern Sands-ausgang und darn Hiicklaufeingang der Ietzten
`Nelzwarkainrichtung (45) in darn Netzwark hergestellt ist und
`- Date-nsignale. die an die lame Netzwarkainrichlung (45) VOI'1 d6!‘ vorhergehencien Enrichtung
`{44} des Netzwerks Libertragen warden. zurflck zu dam Flflcklaufeingang der vorhergehenclen
`Einrichtung (44) Ubertragen warden.
`
`2. Netzwerk nach Anspruch 1. dadurch gekennzalchnat. dafi die Dalensignale bitseriell zwischen den
`Einrichtungen {4I,42.43.44.45} des Netzwerks Ubertragen werden.
`
`Netzwerk nach Anspruch 1 oder 2. dadurch gekennzelchnet. dafl die Zenlraleinrichtung {41} und jade
`Natzwerkeinrllchtung (-12.43.44.451 eine Einrichtung zurn Versorgan der nachfolgenden Einrichtung in
`dam Netzwerk mit Enargie aufweisen.
`
`Netzwerk nach einem der vorangehandan Ansprflche. dadurch gakennzaichnet, dafl zum Abgeben
`von Energle von ainer Einrichlung des Netzwarks an eine nachfo1gande Einrichlung ein Paar (99,109)
`Energieversorgungsleitungen rnit seinarn einen Ende an einen Ausgangsanschlufl der Einrichtung und
`rnit seinern anderen Ends an einen Eingangsanschlufl der nachiolgenden Einrichtung anschlieflbar isl.
`wobei eine Energieversorgungslaitung {Q9} ein Bazugspotenlial zm Verfligung slellt und die andere
`Energieversorgungsleitung (109) eina Energievarsorgungsspannung zur Verlflgung stellt.
`
`Netzwerk nach einam der vorangehanden Ansprfiche. dadutch gekennzaichnel, dafi jade NBlzwerk-
`einrichtung einen Datenprozessor {Baa} zum Verarbaiten van Datensignalen umfafit, wobai der Damn-
`prazassor einen Elngangsanschlufl. dar rnit darn Sandeeingang cler Nelzwarkeinrlchtung verbunden isl.
`und einen Ausgangsanschlufl aufweist dar mit dem Sendeausgang der Netzwerkeinrichtung verbunden
`ist.
`
`L‘!
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`FIG 3 (PRIOR ART)
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`.,______...—-u-————
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