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`
`LCOMPUTING
`SYSTEM
`
`FUNDAMENTALS/
`
`An Approach
`Based on Microcomputers
`
`KENNETH J. QANHOF
`CAROL L. SMITH
`
`Southern Illinois University at Carbondale
`
`L V
`
`7 ADDISON-WESLEY PUBLISHING COMPANY
`
`
`
`Reading, Massachusetts 0 Menlo Park, California
`
`London - Amsterdam - Don Mills, Ontario o Sydney
`
`f r".
`
`.I_
`
`_; "f-
`
`PMC Exhibit2141
`Apple v. PMC
`|PR2016-00754
`
`Page 1
`
`PMC Exhibit 2141
`Apple v. PMC
`IPR2016-00754
`Page 1
`
`

`

`
`
`This book is in the
`
`ADDISON-WESLEY SERIES IN COMPUTER SCIENCE
`
`Consulting Editor: Michael A. Harrison
`
`Library of Congress Cataloging in Publication Data
`
`Danhof, Kenneth J
`Computing system fundamentals.
`
`Includes bibliographical references and index.
`1. Electronic digital computers.
`2. Microcomputers.
`l. Smith, Carol 1.... joint author.
`11. Title.
`QA?6.5.D252
`001.6'4
`79-14933
`lSBN 0-201-01298-7
`
`
`
`COpyright e 1981 by Addison-Wesley Publishing Company, inc. Philippines copyright 1981 by
`Addison-Wesley Publishing Company, Inc.
`
`All rights reserved. No part of this publication may be reproduced. stored in a retrieval system, or
`transmitted, in any form or by any means, electronic, mechanial. photocopying, recording, or
`otherwise, without the prior written permission of the publisher. Printed in the United States of
`America. Published simultaneously in Canada. Library of Coopers Catalog Card No. 79-14933.
`ISBN 0-201-01293-7
`ABCDEFGH-MA-smssmto
`
`PMC Exhibit 2141
`
`Apple v. PMC
`|PR2016-00754
`
`Page 2
`
`PMC Exhibit 2141
`Apple v. PMC
`IPR2016-00754
`Page 2
`
`

`

`102
`
`Introduction to Microcomputer Architecture
`
`5.2
`
`5.2 MICROPROCESSORS AND ASSOCIATED COMPONENTS
`
`We now consider the structure of the microcomputer in somewhat greater
`
`detail and examine some specific products.
`As indicated earlier, the heart of any microcomputer system is the micro-
`processor. The microprocessor is a central processing unit, which, through the
`use of the latest techniques in electronic circuit miniaturization, is typically
`contained on a 40-pin package known as a DIP (dual inline pins). The “chip”
`or portion of the DIP that contains the circuitry may be less than one square
`centimeter in size and contain more than 20,000 transistors (the building
`
`blocks from which gates are formed).
`We shall consider both the M6800 and [8085 microprocessors noting com-
`mon elements as well as some of the differences.
`
`5.2.1 The M6800 System
`
`The Motorola M6800 microprocessor is described in the block diagram in Fig.
`5.5. The various buffers indicated in the diagram can be viewed as registers for
`holding data until it can be read by the appropriate source. Lines Ao—Als are
`address lines by which the microprocessor addresses memory and other exter-
`nal devices. Lines Do-D7 are bidirectional data lines. The remaining lines are
`for processor and bus control. In particular, the read/write (R/W) line indi-
`cates whether the microprocessor is in a Read or Write state and the Valid
`Memory Address line (VMA) signals to memory (and peripherals) that the
`
`address lines contain a valid address. A bar over the label on a line (e.g.,
`HALT in Fig. 5.5) indicates that the line is low (or 0) active as opposed to the
`normal high (or 1) active.
`The microprocessor operates in a synchronous manner; its operations are
`synchronized by the cycles of a clock (actually two phases of the clock are
`required). The minimal clock-cycle time for the M6800 is one microsecond (1
`,us). As we shall see, relative to the execution of a given instruction, the proces-
`sor must perform a specific series of subinstructions or microinstmctions,
`which consist of the most basic acts the processor can perform. (This is exactly
`the passage from Level 2 to Level 1 in Fig. 1.1.) One or more microinstructions
`can be performed per clock cycle, and thus each instruction involves a number
`of cycles.
`Before considering the details of instruction execution, we must regard
`the microprocessor as a component in a larger system. A typical small micro-
`computer system is displayed in Fig. 5.6.
`In Fig. 5.6, the RAM is a Random Access Memory—a memory unit that
`can be both written into and read from. RAMs are constructed from basic
`memory elements (flip—flops), as indicated in Sec. 5.1, and are volatile, so that
`when the power to a RAM is turned off, its contents are lost. A RAM might
`typically be organized as 128 (K/S) eight-bit words and be placed on a single
`PMC Exhibit 2141
`
`Apple v. PMC
`|PR2016-00754
`
`Page 3
`
`PMC Exhibit 2141
`Apple v. PMC
`IPR2016-00754
`Page 3
`
`

`

`5.2
`
`Microprocessors and Associated Components
`
`103
`
`Al 5
`
`Al A0
`
`
`
`OUTPUT BUFFERS
`
`
`Program
`Program
`Instruction _ - counter L
`
`decode
`
`and
`
`comm] - _ pointer L
`(CU)
`
`Stack
`
`Stack
`
`
`
`Cloakl
`Clock2
`Reset
`NM]
`
`Halt
`
`IRQ
`
`Three-state control
`Data bus enable
`Bus available
`
`R/W
`
`
`
`WA - — ,egm, L
`
`index
`
`Index
`
`- Accurgulator
`
`“mm”— “WWW— A
`
`
`
`Condition
`code
`
`register
`I
`
`DATA
`BUFFERS
`
`D?
`
`Po
`
`Fig. 5.5 Block diagram for M6800.
`
`24-pin DIP (or it might occur as one of several components on a DIP). The
`individual storage cells of a RAM may be either static or dynamic. If static, the
`device need only be addressed when data is read or written. However,
`in
`dynamic RAMs the data must constantly be refreshed (read out and written
`back in) to preserve the quality of the data.
`In the M6800-based system, lines A14, A15 are used as RAM—select lines.
`Lines A0,
`.
`.
`.
`, A6 select a particular word within the RAM and lines
`A7,
`.
`.
`.
`, A13 select one from among several RAMs. The R/W control line
`selects the Read or Write mode within the RAM.
`
`The ROM of Fig. 5.6 is a Read Only Memory. A ROM is essentially a
`combinational circuit that is written into once and may then be repeatedly read
`from. ROMS are nonvolatile and are consequently used to hold programs that
`are needed repeatedly in a c0mputing system. For example, monitor programs
`
`PMC Exhibit 2141
`
`Apple v. PMC
`|PR2016-00754
`
`Page 4
`
`PMC Exhibit 2141
`Apple v. PMC
`IPR2016-00754
`Page 4
`
`

`

`104
`
`Introduction to Microcomputer Architecture
`
`5.2
`
`DEVICE
`
`U!
`3
`.D
`“IIn
`2'U
`1:
`<
`
`Databus
`
`MICROPROCESSOR
`
`INPUTI'OUTPUT
`INTERFACE
`
`Fig. 5.6 Typical small system.
`
`To peripheral devices
`
`for microcomputers are generally stored in ROMS. Although ROMS are often
`“mask-programmed" at
`the factory, Programmable ROMS (PROMs) are
`somewhat easier and less expensive to pragram on a low-volume basis. Some
`PROMs are erasable: EPROMs can be erased by exposure to ultraviolet light.
`In the M6800-based system, lines A14, A15 are again used as ROM—select
`lines. A“), .
`.
`.
`, A13 select one of several ROMS and A0,
`.
`.
`.
`, A9 select apar-
`ticuiar word within a ROM.
`In general, the instructions of a program are stored in consecutive loca-
`tions in a RAM or ROM. Prior to execution of the program, the address of the
`first instruction of the program is loaded into the microcomputer’s program
`counter (PC).
`
`PMC Exhibit 2141
`
`Apple v. PMC
`|PR2016-00754
`
`Page 5
`
`PMC Exhibit 2141
`Apple v. PMC
`IPR2016-00754
`Page 5
`
`

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