United States Patent [19J
`Takahashi et al.
`
`111111111111111111111111111111111111111111111111111111111111111111111111111
`US005347154A
`[11] Patent Number:
`[ 45] Date of Patent:
`
`5,347,154
`Sep. 13, 1994
`
`[75]
`
`[54] LIGHT VALVE DEVICE USING
`SEMICONDUCTIVE COMPOSITE
`SUBSTRATE
`Inventors: Kunihiro Takahashi; Yoshikazu
`Kojima; Hiroaki Takasu; Nobuyoshi
`Matsuyama; Hitoshi Niwa; Tomoyuki
`Yoshino; Tsuneo Yamazaki, all of
`Tokyo, Japan
`[73] Assignee: Seiko Instruments Inc., Japan
`[21] Appl. No.: 791,912
`[22] Filed:
`Nov. 13, 1991
`[30]
`Foreign Application Priority Data
`Nov. 15, 1990 [JP]
`Japan .................................. 2-309437
`Jan. 23, 1991 [JP]
`Japan .................................. 3-006561
`Feb. 16, 1991 [JP]
`Japan .................................. 3-022420
`Apr. 11, 1991 [JP]
`Japan .................................. 3-079330
`Apr. 11, 1991 [JP]
`Japan .................................. 3-079337
`[51]
`Int. CI.s ...................... H01L 27/01; HOlL 27/13
`[52] U.S. CI ..................................... 257/347; 257/353;
`359/59; 359/87
`[58] Field of Search .............. 357/4, 23.7; 340/784 C;
`359/54,59,62,82,87, 88;257/347, 352,353
`References Cited
`U.S. PATENT DOCUMENTS
`4,024,626 5/1977 Leupp et al ........................... 29/571
`4,759,610 7/1988 Yanagisawa ....................... 357/23.7
`4,885,616 12/1989 Ohta ...................................... 359/59
`4,906,587 3/1990 Blake ................................... 257/347
`4,968,638 11/1990 Wright et al ....................... 357/23.7
`Ishizu et al ............................. 357/2
`4,984,033 1/1991
`
`[56]
`
`FOREIGN PATENT DOCUMENTS
`0164646 12/1985 European Pat. Off ............ 357/23.7
`0211402 2/1987 European Pat. Off ............... 359/59
`2715446 10/1978 Fed. Rep. of Germany .
`134283 2/1979 Fed. Rep. of Germany .
`57-167655 10/1982 Japan .
`59-126639 7/1984 Japan .................................. 357/23.7
`59-224165 12/1984 Japan .................................. 357/23.7
`60-143666 7/1985 Japan ..................................... 359/59
`62-5661 1/1987 Japan ...................................... 357/4
`63-90859 4/1988 Japan ................................... 257/347
`63-101831 5/1988 Japan ............................... 3401784 C
`1-38727 2/1989 Japan ..................................... 359/59
`1-49257 2/1989 Japan ................................... 257/347
`
`2-154232 6/1990 Japan ................................... 257/347
`3-19370 1/1991 Japan .................................. 357/23.7
`2206445 1/1989 United Kingdom .
`
`OTHER PUBLICATIONS
`IEEE Transactions On Electron Devices, vol. 37, No.
`1, Jan. 1990, pp. 121-127, "A Laser-Recrystallization.
`.. Matrix LCD's".
`Japanese Journal of Applied Physics, vol. 29, No. 4,
`part 2, Apr. 1990, pp. L521-L523, "Experimental Fabri(cid:173)
`cation . . . CVD Silicon Films".
`Fujitsu Scientific and Technical Journal, vol. 24, No. 4
`& index, Dec. 1988, pp. 408-417, "sol Device on
`Bonded Wafer".
`Journal of the Electromechanical Society, vol. 120, No.
`11, Nov. 1973, pp. 1563-1566, "Thin Silicon Film on
`Insulating Substrate".
`Primary Examiner-Rolf Hille
`Assistant Examiner-Minhloan Tran
`Attorney, Agent, or Firm-Bruce L. Adams; Van C.
`Wilks
`[57]
`ABSTRACT
`A semiconductor device having a double-side wiring
`structure, in which a single crystal semiconductor thin
`film is formed integrally with transistor elements and is
`laminated on an insulating thin ftlm. The single crystal
`semiconductor thin ftlm is formed with through-holes
`and the insulating thin fllm is formed on its back side
`with electrodes and a shielding fJ.lm. A light valve de(cid:173)
`vice using the semiconductor device is also disclosed.
`Over the single crystal semiconductor thin ftlm, there
`are formed switching elements of transistors, pixel elec(cid:173)
`trodes connected electrically with the switching ele(cid:173)
`ments, and drive circuits for scanning and driving the
`switching elements. Also disclosed is a miniature highly
`dense light valve device. In this light valve device, an
`electrooptical substance is arranged between a multi(cid:173)
`layer substrate. The multi-layer substrate is formed with
`electrodes and a shielding film at the opposed side of the
`insulating fllm to the side formed with the grouped
`elements through the insulating film. A transparent
`opposite substrate is also formed so that the optical
`transparency of the electrooptical substance is con(cid:173)
`trolled by the switching elements.
`
`25 Claims, 19 Drawing Sheets
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`6 3
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`4
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`5
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`7
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`13
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`2
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`11
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`8 10 9
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`12
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`Petitioner Samsung - SAM1005
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`1
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`U.S. Patent
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`Sep. 13, 1994
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`Sheet 1 of 19
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`5,347,154
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`FIG. 1
`5
`4
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`7
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`6 3
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`13
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`2
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`14
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`15
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`11
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`8 10 9
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`12
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`FIG. 2 PRIOR ART
`102
`109 108 107 106
`110
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`102
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`103
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`105
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`104
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`101
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`2
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`U.S. Patent
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`Sep. 13, 1994
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`Sheet 2 of 19
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`5,347,154
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`FIG. 3
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`17
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`16
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`13
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`13
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`14
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`15
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`14
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`15
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`11
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`8 10 9
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`12
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`FIG. 4 (a)
`5
`18
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`11
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`8 10 9
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`12
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`3
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`U.S. Patent
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`Sep. 13, 1994
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`Sheet 3 of 19
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`5,347,154
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`13
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`2
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`13
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`FIG. 4(b)
`4
`5 9
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`7
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`6 3
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`14
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`15
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`11
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`8 10 20
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`12
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`FIG. 5
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`19
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`11
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`8 10
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`9
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`12
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`4
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`U.S. Patent
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`Sep. 13, 1994
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`Sheet 4 of 19
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`5,347,154
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`13
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`13
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`FIG. 6
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`31
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`6 3
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`4 5 7
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`32
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`14
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`15
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`11
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`8 10 9
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`FIG. 7
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`6 3
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`4
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`5
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`7
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`11
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`8 10 9
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`12
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`5
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`U.S. Patent
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`Sep. 13, 1994
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`Sheet 5 of 19
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`5,347,154
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`FIG. 9
`ION IMPLANTATION
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`l
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`FIG. 8
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`12
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`53
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`6 4
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`5
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`3
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`7
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`6
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`

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`U.S. Patent
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`Sep. 13, 1994
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`Sheet 6 of 19
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`5,347,154
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`F I G. 10
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`INCIDENT LIGHT
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`

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`U.S. Patent
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`Sep. 13, 1994
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`Sheet 7 of 19
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`5,347,154
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`F I G. 11
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`

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`U.S. Patent
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`Sep. 13, 1994
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`Sheet 8 of 19
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`5,347,154
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`F I G. 13
`9 10 8
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`12
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`11
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`6 4
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`F I G. 14
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`9
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`U.S. Patent
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`Sep. 13, 1994
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`Sheet 9 of 19
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`5,347,154
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`23
`FIG. 15 (a) \
`
`FIG. 15(b)
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`10
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`

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`U.S. Patent
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`Sep. 13, 1994
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`Sheet 10 of 19
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`5,347,154
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`FIG. 16
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`120
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`131
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`130
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`116 117 128 114 113
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`112 126 136
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`11
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`

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`U.S. Patent
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`Sep. 13, 1994
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`Sheet 11 of 19
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`5,347,154
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`FIG. 19(a) 1----------l=t~~~
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`L___ _____ ___JJ151
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`FIG. 19(b) ~~I...L-......-~~L.....j 111
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`
`FIG. 19( f)
`
`FIG. 19(g)
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`113
`
`12
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`

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`U.S. Patent
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`Sep. 13, 1994
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`Sheet 12 of 19
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`5,347,154
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`F I G. 20
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`124
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`111
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`125
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`FIG. 21 (a)
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`FIG. 21 (c)
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`169
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`167
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`FIG. 21 (d)
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`FIG. 21 (b)
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`13
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`

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`U.S. Patent
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`Sep. 13, 1994
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`Sheet 13 of 19
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`5,347,154
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`F I G. 22(a)
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`

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`U.S. Patent
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`Sep. 13, 1994
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`Sheet 14 of 19
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`5,347,154
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`F 1 G. 23(a )I~ ====~r~::
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`163
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`180 190
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`175
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`F I G. 23(b)
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`FIG. 23(c)
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`185
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`FIG. 23(e)
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`15
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`Sep. 13, 1994
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`Sheet 15 of 19
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`5,347,154
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`F I G. 24
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`171
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`186
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`161
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`169
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`176
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`172
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`16
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`U.S. Patent
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`Sep. 13, 1994
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`Sheet 16 of 19
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`5,347,154
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`FIG. 25 (a)
`195 193
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`196
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`FIG. 25(b)
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`194
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`197
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`192
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`192
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`194
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`211
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`196
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`212
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`204
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`195
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`17
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`

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`U.S. Patent
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`Sep. 13, 1994
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`Sheet 17 of 19
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`5,347,154
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`210 209
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`204
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`FIG. 26(b)
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`215
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`F I G. 26 ( c )
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`196
`
`18
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`

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`U.S. Patent
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`Sep. 13, 1994
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`Sheet 18 of 19
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`5,347,154
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`F I G. 27
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`r-------------------~192
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`197
`199
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`206
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`205
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`208
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`!===:=::::;t==============CL 193
`195
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`19
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`U.S. Patent
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`Sheet 19 of 19
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`5,347,154
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`F I G. 28
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`236
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`231
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`233 C3
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`235
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`20
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`

`
`LIGHT VALVE DEVICE USING
`SEMICONDUCTIVE COMPOSITE SUBSTRATE
`
`BACKGROUND OF THE INVENTION
`1. Field of the Invention
`The present invention relates to a semiconductor
`device and a process for manufacturing the same and,
`more particularly, to a semiconductor substrate having
`a structure composed of a thin film laminated layer 10
`intensively formed with transistor elements and a light
`valve device having said semiconductor substrate, a
`liquid crystal layer and an opposed substrate integrated
`with one another.
`2. Description of the Prior Art
`In an active matrix device of the prior art, thin film
`transistors are formed on the surface of an amorphous
`silicon thin film or a polycrystalline silicon thin film
`deposited over a glass substrate. The amorphous silicon
`thin film and the polycrystalline silicon thin film can be 20
`easily deposited over the glass substrate by the chemical
`vapor deposition so that the structure is suited for man(cid:173)
`ufacturing an active matrix liquid crystal display device
`having a relatively large frame. The transistor elements
`formed over the amorphous or polycrystalline silicon 25
`thin fllm are generally of the fleld effect insulated gate
`type. At present, an active matrix liquid crystal display
`device using an amorphous silicon having an area of
`about 3 inches to 10 inches is commercially produced.
`The amorphous silicon thin film is suited for a liquid 30
`crystal panel having a large area because it can be
`formed at a low temperature equal to or less than 350°
`C. On the other hand, the active matrix liquid crystal
`display device using the polycrystalline silicon film
`having a small-sized liquid crystal display panel as wide 35
`as about 2 inches is commercially produced at present.
`However, the active matrix liquid crystal display
`device using the amorphous silicon thin film or the
`polycrystalline silicon thin film of the prior art is suited
`for a direct view type display device requiring a rela- 40
`tively large frame image plane but but not always suited
`for miniaturizing the device size and increasing the
`density of the pixels. In recent years, there has been a
`growing demand for a microminiature display device or
`a light valve device having fme and highly dense pixels. 45
`The microminiaturized light valve device is utilized as
`the primary image forming plane of a projection type
`image device, for example, so that it can be applied to a
`projection type high-definition TV system. The fme
`semiconductor manufacturing technology can be used 50
`to manufacture a microminiature light valve device
`which has a pixel size or the order of 10 J.Lm and a total
`size of about several em.
`However, when the amorphous or polycrystalline
`silicon thin film of the prior art is used, the transistor 55
`elements or the order of sub-microns cannot be formed
`by applying the flne semiconductor processing technol(cid:173)
`ogy. Since the amorphous silicon thin film, for example,
`has a mobility of about 1 cm2/Vsec, a driver circuit
`having required the high speed operation cannot be 60
`formed over a common substrate. In case of the poly(cid:173)
`crystalline silicon thin film, on the other hand, the crys-
`tal particle has a size of about several J.Lm, thus creating
`a problem with regards to the miniaturization of active
`elements.
`On the other hand, the semiconductor device widely
`utilized has its transistor elements formed on the surface
`of a single crystal substrate. FIG. 2 is a section showing
`
`65
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`1
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`5,347,154
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`2
`a semiconductor substrate. Generally speaking, the
`semiconductor substrate is formed of a single crystal
`semiconductor substrate 101 made of silicon.
`Specifically, the single crystal semiconductor sub-
`s strate 101 has its surface formed integrally and highly
`densely with the transistor elements or the like by the
`impurity diffusion and the film forming process. In the
`example shown in FIG. 2, the single crystal semicon-
`ductor substrate 101 is formed thereover with an insu(cid:173)
`lated gate fleld effect transistor. The element region to
`be formed with the transistor is enclosed by a fleld
`insulated film 102. The element region is formed with a
`source region 103 and a drain region 104 by the impu(cid:173)
`rity doping process. Between these source region 103
`15 and drain region 104, there is formed a region 105 for
`forming the channel of the transistor. This channel
`forming region 105 is arranged thereover through a
`gate oxide film 106 with a gate electrode 107. The tran-
`sistor element composed of those gate electrode 107, the
`source region 103, the drain region 104 and so on is
`covered with an
`inter-layer insulating fllm 108.
`Through contract holes formed in the inter-layer insu(cid:173)
`lating film 108, there are arranged a source electrode
`109 and a drain electrode 110 for wiring the individual
`transistors.
`The semiconductor substrate made of the silicon sin(cid:173)
`gle crystal of the prior art, as described above, is supe(cid:173)
`rior, having a high speed operation and high density of
`the transistor elements and so on, to the aforementioned
`amorphous silicon thin film and polycrystalline silicon
`thin film.
`Since, however, the silicon single crystal substrate is
`opaque, it cannot be applied as it is to a device such as
`a light valve device requiring transparency of the sub(cid:173)
`strate.
`In recent years, on the other hand, an image projec-
`tion system has been developed using the light valve
`device of that· kind. This image projection system is
`desired to have a smaller size, less weight and a fmer
`projection image. To accomplish this a very high den-
`sity integrated circuit of the semiconductor device used
`in the light valve device is required.
`Incidentally, the semiconductor device of the prior
`art is formed with the transistor elements by subjecting
`one face of the single crystal semiconductor substrate
`101 sequentially to the impurity doping process and the
`film forming process. These processes are always car(cid:173)
`ried out from one face only so that the films are sequen-
`tially laminated. As a result, once the lower layer is
`processed and laminated by an upper layer, it cannot be
`subjected to an additional treatment any more, thus
`raising a problem that the step design is restricted in
`various points.
`Although the semiconductor substrate 101 has a sur(cid:173)
`face and back opposed to each other, the semiconductor
`device is formed by making use of the surface of the
`semiconductor substrate 101 only. Thus, the wiring of
`an integrated circuit is concentrated only at the surface
`while leaving the back unused. As a result, the useable
`area restricts the wiring density raising a problem in
`that a far higher density of the integrated circuit cannot
`be obtained. If the back of the semiconductor substrate
`could be utilized as the wiring face, the integration
`density could be effectively doubled. Nevertheless, this
`two-face wiring has been impossible in the structure of
`the prior art. In order to raise the integration density, it
`has also been proposed to wire multiple layers on one
`
`21
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`

`
`5,347,154
`
`3
`face of the semiconductor substrate. With these multi(cid:173)
`wiring operations, however, the flatness of the semicon(cid:173)
`ductor substrate surface is degraded resulting in an open
`defect in step portions or other short-circuit defect.
`In the structure of the prior art, the transistor ele- 5
`ments are directly integrated on the surface of the single
`crystal semiconductor substrate. As a result, this single
`crystal semiconductor substrate is in an integral relation
`with the transistor elements formed thereover. In other
`words, the integrated circuit is always supported by the 10
`single crystal semiconductor substrate. Depending
`upon the intended use of the semiconductor device,
`however, the use of the single crystal semiconductor
`substrate as the support substrate is frequently im(cid:173)
`proper. Since this support substrate cannot be freely set, 15
`the existing structure restrictively limits the flexibility is
`available in the application of the semiconductor de-
`vice.
`
`4
`BRIEF DESCRIPTION OF THE DRAWINGS
`FIG. 1 is a schematic section showing a portion of a
`basic structure of a semiconductor device according to
`the present invention;
`FIG. 2 is a schematic section showing a portion of
`one example of the semiconductor device of the prior
`art·
`FIG. 3 is a schematic section showing a portion of a
`first embodiment of the semiconductor device accord(cid:173)
`ing to the present invention, in which a pad electrode is
`formed on the face opposed to a wiring pattern;
`FIG. 4(a) is a schematic section showing a portion of
`a second embodiment of the semiconductor deice ac(cid:173)
`cording the present invention, in which gate electrodes
`are arranged at the two sides of a channel forming re(cid:173)
`gion;
`FIG. 4(b) is a schematic section showing a portion of
`a third embodiment of semiconductor device according
`20 to the present invention, in which a shielding layer is
`formed on a gate electrode at the side of a support
`substrate;
`FIG. 5 is a schematic section showing a portion of a
`fourth embodiment of the semiconductor deice accord(cid:173)
`ing to the present invention and shows an example of a
`DRAM structure;
`FIG. 6 is a schematic section showing a portion of a
`fifth embodiment of the semiconductor deice according
`to the present invention, in which a wiring pattern of a
`semiconductor integrated circuit is divided into those of
`two upper and lower faces;
`FIG. 7 is a schematic section showing a portion of a
`sixth embodiment of the semiconductor deice according
`to the present invention, in which a support substrate
`has a single-layer structure;
`FIG. 8 is a schematic section showing a portion of a
`seventh embodiment of the semiconductor deice ac(cid:173)
`cording to the present invention, in which a support
`substrate is formed with degasifying holes;
`FIG. 9 is a schematic section showing a portion of a
`eighth embodiment of the semiconductor deice accord(cid:173)
`ing to the present invention and shows an MROM
`structure;
`FIG. 10 is a schematic section showing a portion of a
`ninth embodiment of the semiconductor deice accord(cid:173)
`ing to the present invention and shows an example of a
`semiconductor device used as a light valve driving
`substrate;
`FIG. 11 is a process diagram for explaining a first step
`of a process for manufacturing a semiconductor device
`according to the present invention;
`FIG. 12 is a process diagram for explaining a second
`step of the process for manufacturing the semiconduc(cid:173)
`tor device according to the present invention;
`FIG. 13 is a process diagram for explaining a third
`step of a process for manufacturing a semiconductor
`device according to the present invention;
`FIG. 14 is a process diagram for explaining third and
`fourth steps of the process for manufacturing the semi(cid:173)
`conductor device according to the present invention;
`FIGS. 15(a) to 15(c) are process diagrams for explain(cid:173)
`ing a process for manufacturing a semiconductor device
`of a tenth embodiment according to the present inven(cid:173)
`tion;
`FIG. 16 shows a eleventh embodiment of the semi(cid:173)
`conductor device according to the present invention
`and is a top plan view showing a light valve substrate;
`FIG. 17 is a section taken along line A-A' of FIG. 16;
`
`25
`
`SUMMARY OF THE INVENTION
`In view of the aforementioned various prior art, the
`present invention has an object to provide a semicon(cid:173)
`ductor device, in which a single crystal semiconductor
`thin film has its two faces processed to make a double-
`side wiring possible. In accordance with the present
`invention, the single crystal semiconductor thin film is
`adhered through an insulating film to a support sub(cid:173)
`strate made of the same material as that of said semicon(cid:173)
`ductor single crystal to form electrodes and various 30
`elements over said single crystal semiconductor thin
`film and by subsequently removing said support sub(cid:173)
`strate to also form electrodes and so on over said insu(cid:173)
`lating film.
`Another object of the present invention is to provide 35
`a highly densified semiconductor device which is en(cid:173)
`abled to perform stable operations without any influ(cid:173)
`ence from light by forming an insulating film internally
`in the depthwise direction of a single crystal semicon(cid:173)
`ductor substrate, by forming a group of various ele- 40
`ments on the surface of said single crystal semiconduc(cid:173)
`tor substrate, by subsequently removing the ground of
`said single crystal semiconductor substrate to expose
`said insulating film to the outside and by forming elec(cid:173)
`trodes and a shielding film over said exposed insulating 45
`film.
`Another object of the present invention is to enable
`the kind of the support substrate to be freely selected by
`laminating a substrate either of an adhesive or through
`an adhesive layer fixedly onto the surface of the single 50
`crystal semiconductor formed with the aforementioned
`element group.
`Still another object of the present invention is to
`provide a light valve device which is enabled to display
`a very fme image of large capacity by forming a trans- 55
`parent insulating support substrate as a substrate over a
`single crystal semiconductor surface formed with said
`elements.
`A further object of the present invention is to provide
`a light valve device which is enabled to prevent any 60
`optical leakage of the transistor element on said single
`crystal semiconductor thin film by forming a shielding
`film on that surface of an insulating film, which is op(cid:173)
`posed with respect to a channel region to the side of said
`transistor element formed with a gate electrode.
`The other objects and features of the present inven(cid:173)
`tion will be described in detail in the following in con(cid:173)
`nection with the embodiments thereof.
`
`65
`
`22
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`5,347,154
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`25
`
`5
`FIG. 18 is a section showing a light valve device
`using a semiconductor device using a substrate;
`FIGS. 19(a) to 19(g) are diagrams for explaining the
`steps of manufacturing a semiconductor substrate for
`the light valve device and shows a twelfth embodiment 5
`of the present invention;
`FIG. 20 is a diagram for explaining a pad lead-out
`portion of the semiconductor substrate for the light
`valve device of the present invention;
`FIGS. 21(a) to 21(d) show a thirteenth embodiment 10
`according to the present invention and explaining a
`process for constructing a semiconductor device as a
`light valve device: FIG. 21(a) is a top plan view show(cid:173)
`ing a layout of a semiconductor substrate; FIG. 21(b) is
`a section showing a composite substrate using said semi- 15
`conductor substrate; FIG. 21(c) is an enlarged explana(cid:173)
`tory view showing a portion of a pixel region; and FIG.
`21(d) is a section showing the light valve device;
`FIGS. 22(a) and 22(b) are an enlarged top plan view
`and a section showing a pixel region showing a light 20
`valve device according to the present invention;
`FIGS. 23(a) to 23(e) show a fourteenth embodiment
`according to the present invention and are process dia(cid:173)
`grams showing steps of manufacturing a pixel portion of
`a light valve device semiconductor device;
`FIG. 24 shows a fifteenth embodiment according to
`the present invention and is an exploded perspective
`view for explaining a light valve device;
`FIGS. 25(a) and 25(b) are sections showing a six(cid:173)
`teenth embodiment according to the present invention, 30
`in which the semiconductor device is constructed as a
`light valve device.
`FIGS. 26(a) to 26(e) show a seventeenth embodiment
`according to the present invention and are process dia(cid:173)
`grams showing a process for manufacturing a light 35
`valve device;
`FIG. 27 shows an eighteenth embodiment according
`to the present invention and is an exploded perspective
`view for explaining a light valve device; and
`FIG. 28 shows a nineteenth embodiment according to 40
`the present invention and is a section for explaining an
`image projection system using a light valve device.
`
`6
`source electrode 11 and drain electrode 12 are wired all
`over one face of the back layer film 10. Incidentally, this
`back layer film 10 is composed of a field insulating layer
`13 surrounding an element region to be formed with the
`transistor element and an insulating layer covering the
`gate electrode 9. The thin film laminated layer 1 thus far
`described is supported by the support layer 2. In other
`words, this support layer 2 is fixedly adhered face-to(cid:173)
`face to the back layer film 10.
`Preferably, said support layer 2 has a two-layer struc(cid:173)
`ture composed of an adhesive fiJ.m 14 applied to the
`back layer fiJ.m 10 and a support substrate 15 fixedly
`adhered face-to-face by the adhesive fiJ.m 14. Alterna(cid:173)
`tively, the support layer 2 may have a single-layer struc(cid:173)
`ture molded of an adhesive. The adhesive to be used for
`this fixed face adhesion can be a fluid material com(cid:173)
`posed mainly of silicon dioxide, for example. The sup(cid:173)
`port substrate 15 may be formed in advance with
`through holes for releasing the gas which is generated
`during a heat treatment of the adhesive. Moreover, the
`material for the support substrate 15 may be freely se(cid:173)
`lected from an optically transparent material such as
`quartz in addition to the semiconductor such as silicon.
`Each of the transistor elements formed integrally in
`the thin film laminated layer 1 has the source region 6
`and the drain region 7, which are formed in the single
`crystal semiconductor thin film 4 in self-alignment with
`the gate electrode 9. The surface insulating film 3 posi(cid:173)
`tioned over the single crystal semiconductor thin film 4
`and formed with the channel forming region 5, the
`source region 6 and the drain region 7 has a flat face so
`that it can be freely formed, if necessary, with a variety
`of electrodes. For example, a capacity element can be
`formed in the surface insulating film 3, by forming an
`opposed electrode over the surface insulating film 3
`such that it is opposed to the drain region 7. Then, it is
`possible to manufacture a semiconductor device having
`a DRAM structure. Alternatively, a transparent elec(cid:173)
`trode can be so formed over said surface insulating fiJ.m
`3 that it is electrically connected with the drain region
`7 to form a pixel. The semiconductor device having
`such structure can be applied as a drive substrate for a
`light valve. Through the contact holes formed to extend
`DETAILED DESCRIPTION OF THE
`45 through the surface insulating film 3, furthermore, there
`PREFERRED EMBODIMENTS
`may be formed over the surface insulating film 3 a wir-
`FIG. 1 is a section showing a portion of a basic struc-
`ing electrode which is connected with the terminal
`ture of a semiconductor device according to the present
`portion of each transistor element. Then, the wiring of
`invention. As shown, a semiconductor device accord-
`the integrated circuit can be accomplished on the two
`ing to the present invention is composed of a thin film
`laminated layer 1 formed integrally with transistor ele- 50 faces of the thin film laminated layer 1 to improve the
`ments and a support layer 2 for supporting the thin film
`effective wiring density. Alternatively, a optical leak-
`laminated layer 1. This thin film laminated layer 1 has a
`age preventing shielding film can be formed over said
`surface insulating film 3 having a flat face to be formed
`surface insulating film 3 so as to cover at least the chan-
`with electrodes. Below this surface insulating ftlm 3,
`nel forming region 5 of each transistor element formed
`there is arranged a single crystal semiconductor Thin 55 in the single crystal semiconductor thin film 4. More-
`film 4. This single crystal semiconductor thin ftlm 4 is
`over, an additional gate electrode can be formed over
`said surface insulating film 3 such that it is aligned with
`formed not only with a channel forming region 5 for
`the channel forming region 5 of each transistor element
`each transistor element but also with a source region 6
`formed in the single crystal semiconductor thin film 4.
`and a drain region 7 which merge into the channel
`forming region 5. Below the single crystal semiconduc- 60 The performance of the transistor can be improved by
`tor thin film 4, there is arranged through a gate oxide
`controlling the channel forming region 5 by a pair of
`layer 8 an intermediate electrode film which forms a
`opposed gate electrodes. Furthermore, a pad electrode
`gate electrode 9 of the transistor element. Below said
`for external connection can be formed over the surface
`intermediate electrode film, moreover, there is arranged
`insulating ftlm 3. Since this pad electrode has a rela-
`a back layer film 10. This back layer ftlm 10 is formed 65 tively large area, the packaging density of the inte-
`grated circuit can be substantially improved by separat-
`with contact holes which extend to the source region 6
`and the drain region 7 so that a source electrode 11 and
`ing it from the wiring line of the integrated circuit at the
`a drain electrode 12 are arranged therethrough. These
`back and arranging it on the surface.
`
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`5,347,154
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`8
`7
`Through this surface insulating film, there can be ac-
`The channel forming region 5 formed in the single
`crystal semiconductor thin f!.lm 4 can be processed from
`complished additional processes upon the single crystal
`semiconductor thin film. The so-called "double side
`the side of the surface insulating film 3. By doping the
`treatment" can be accomplished to increase the degree
`channel forming region 5 selectively with an impurity
`through the surface insulating film 3, for example, the 5 of freedom for step designing of the semiconductor
`conductivity of the channel forming region 5 can be set
`manufacture process. To the back of the thin film lami-
`nated layer, the support substrate is fixedly adhered in
`individually and selectively. Thus, it is possible to pro-
`vide the semiconductor device having an MROM struc-
`face-to-face relation through the adhesive film. As a
`ture.
`result, the material for and the shape of the support
`Next, a process for manufacturing the semiconductor 10 substrate can be freely selected in accordance with the
`design specifications.
`device having the basic structure shown in FIG. 1 will
`be described with reference to FIGS. 15(a) to 15(c).
`The semiconductor device having such many advan-
`First of all, a first step is performed (as shown in FIG.
`tages can be manufactured by making use of the SOl
`15(a)) for forming an SOl substrate 23 which has a
`substrate. First of all, the ordinary semiconductor man-
`single crystal semiconductor thin film 22laminated over 15 ufacturing process is applied to the SOl substrate to
`form a group of thin film transistor elements. The sup-
`a tentative substrate 20 through an insulating film 21.
`port substrate is fixedly adhered in face-to"face relation
`Next, a second step is performed for forming a semicon-
`ductor integrated circuit with respect to said single
`by an adhesive to that surface of the SOl substrate,
`crystal semiconductor thin film 22. Subsequently, a
`which is formed with such element group. After this,
`third step is perf