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`MICRON ET AL. EXHIBIT 1053
`Page 1 of 3
`
`

`
`. . Mi£25
`
`Markets & the Technology
`a
`iMffWfitt"Nfif!&£22
`a perspective from Dataquest DB acompall)'ol
`The Dim& BradstiTtl Corporatoon
`
`' I &&
`
`Japan's Push into
`Creative Semiconductor Research:
`3-DimensionaiiCs
`, Since the early 1980s, Japanese semiconductor companies have made
`a concerted push into creative research programs under the auspices
`of the Japanese government. Dataquest has identified 30 of these joint
`R&D projects-projects that will have a m·ajor
`impact on the global semiconductor industry by
`the early 1990s (Table 1). They are patterned
`after the highly successful VLSI Project of
`1976-1980, which was organized by the Japan(cid:173)
`ese Ministry of International Trade and Industry
`(MITI) to develop the 64K DRAM and photoli(cid:173)
`thography equipment. This month we will exam(cid:173)
`ine one of these elforts-MITI's Future Elec(cid:173)
`tron Devices Project-which may be consid(cid:173)
`ered to be Japan's "VLSI Project of the 1980s".
`
`Agency•
`
`tial use in megabit memories, "smart" MPUs
`(MPUs with lasers), high-speed logic, and com(cid:173)
`plex image sensors with higher densities, faster
`speeds, and multiple functions. MITI's ultimate
`goal is to create devices having 8 to 9 layers,
`but 4 to 51 ayers may be more realistic, given in(cid:173)
`terconnect and heat build-up problems. For ex(cid:173)
`ample, four 1Mb DRAMs could be stacked to
`develop a faster 4Mb device than could be
`realized in a one-level 4Mb structure.
`
`Project
`
`Duration
`1979-86
`1979·91
`1981-86
`1981·86
`1981-90
`1981-90
`1981-90
`1982-87
`1983-88
`1983-88
`1983-90
`1984-90
`1985-90
`1985·91
`. 19Bs-90
`1985-93
`1985-88
`1985-N/A
`1986-96
`1986-96
`1986-96
`1986·88
`1986-88
`1986-N/A
`1986-N/A
`1987-N/A
`1987-89
`1987-92
`1987-96
`
`Table !-Japanese Govemment Semiconduci.or-Re!ated Joint R&D ?rojects
`Budget
`($M)
`---
`112.5
`MIT!
`Optical Measurement and Control Systems
`375.0
`MIT I
`Fifth Generation Computer
`11.0
`STA
`Perfect GaAs Crystals
`11.0
`STA
`Nanomechanisms
`143.7 MIT I
`Scientific Supercomputer
`114.0 MIT I
`Future Electron Devices
`50.0 MIT!
`Fine Ceramics
`10.0
`STA
`Bioholonics Systems
`10.0
`STA
`Bioinformation Transfer
`N/A
`STA
`Speech Synthesis and Recognition
`125.0 MITi
`Advanced Robotics (Jupiter)
`730.0 NTI
`Information Network System (INS) Computer
`NIA
`STA
`Solid State Surfaces
`..
`156.3 MIT I
`Sigma Automated Software Development
`40.0 MIT I
`Biochips/Biocomputer.
`N/A
`MIT!
`Next:Generation IC Equipment
`NIA
`Tokyo U.
`TRON Project (32-bit MPUY
`23.5
`Kyoto U.
`Supercomputer (with Matsushita)
`93.6 MIT!
`Synchrotron Orbital Radiation (SOR)
`62.5
`MITJ
`Optoelectronic !Cs (OEICs) for Optocomputers
`625.0 MPT/MITI
`Automated Translation Telephone
`N/A
`JIRA
`Robot Sensors
`N/A
`High Resolution TV System
`MPT
`1.9 MPT/MITI
`Electronic Dictionary
`NIA
`Tohoku U. Automotive Electronics and Materials
`N/A
`MIT!
`New Diamond Substrates
`NIA
`9 firms
`Mirai IC Card Project (1200 users in Tokyo)
`26.8
`STA
`Optical Measurements Technology Development
`62.5 MITI/MPT} Next-Generation Telecommunication Systems
`NTI/KDD/
`(solid state power amplifiers & transceivers)
`NHKl
`94.0 MIT!·
`
`Future Electron Devices Project
`In October 1981, MITI's Agency for Industrial
`Science and Technology (AIST) organized the
`Future Electron Devices Project to develop
`three types of next-generation devices and in(cid:173)
`tegrated circuits: 3-D ICs, superlattice devices,
`and hardened ICs. Budgeted at $114 million,
`the 8-year project has assigned to it (on a
`rotating basis) 300 corporate researchers from
`14 company members of the Future Electron
`Devices R&D Association. A committee of
`university professors advises AIST on basic
`research goals. In 1984, the companies were
`assigned the following research areas:
`
`• 3-D ICs: Matsushita, Mitsubishi, NEC, Oki,
`Sanyo, Sharp, Toshiba
`• Superlattices: Fujitsu, Hitachi, Sony,
`Sumitomo Electric
`• Hardened ICs: Hitachi, Toshiba, Mitsubishi
`• Fab & Testing Equipment: Canon, Mitsubishi,
`Seiko Instrument and Electronics
`
`The project is divided into 3 phases:
`Phase 1 (1981-1984)-multilayer structure
`and basic process technology,
`Phase 2 (1985-1987)-test element and de(cid:173)
`vice design,
`Phase 3 (1988-1990)-'-functional 3-D ICs
`and system design.
`Currently, hall of the researchers are assigned
`to the 3-D ICs area where MITI believes Japan
`has a two-year lead. By March 1985, the project
`had generated 373 technical papers (60% in
`3-D ICs) and 282 patents (78% in 3-D ICs).
`
`3-DimensionaiiCs
`Three-dimensionaiiCs are a major attraction
`to Japanese companies because of their poten-
`
`1987-96
`
`Optical Materials for High-Output Lasers and
`Optical. Fibers
`
`• MITI = Ministry of lnternatiopal Trade and Industry
`MPT = Ministry of Posts and Telecommunications
`STA = Science and Technology Agency
`NTI = Nippon Telegraph & Telephone (privatized in 1985)
`JIRA = Japan Industrial Robot Association
`NHK. =Japan Broadcasting Company
`KDD = Kokusal Denshin Denwa
`
`Source: Dataquest
`
`Solid State Technology/March 1987
`
`29
`
`MICRON ET AL. EXHIBIT 1053
`Page 2 of 3
`
`

`
`What's
`•
`new1n
`Hermetic
`Package
`Sealing?
`The
`Model
`1000
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`liltil~l.'
`:ihl
`d1
`llf
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`Seals square, rectangular, circular and irregular packages to 6.5 inches.
`Higher thruput because of increased sealing speeds.
`99+% yields using SSEC UNILIDS.
`All sealing parameters are programmable by keyboard, self teaching or
`optional Data Collection/Program Storage Computer.
`Storage of up to 400 sealing programs within the system, unlimited
`storage when used with the optional computer.
`User friendly human interface via keyboard and 40 character alpha/
`numeric display.
`Keyboard inside drybox with tactile feedback and spacing optimized
`for use with drybox gloves.
`All drybox system parameters such as moisture level, oxygen level,
`vacuum oven temperature and pressure, etc. are continuously
`monitored by microprocessor with audio and display alarm when
`preset limits are exceeded.
`RS-232-C with all handshaking signals is standard.
`Optional Data Collection/Program Storage Computer for vacuum
`bake/sealing documentation and SECS II interface.
`Direct digital operation increases reliability due to reduced number of
`electronic and mechanical components required.
`Onboard diagnostics facilitate troubleshooting through keyboard and
`display.
`
`Let SSEC's unequaled sealing application experience guide
`you into the next generation of hermetic sealing equipment ...
`The Model 1000.
`f"
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`SSEC
`(-\,~)-·)
`Solid State
`Equipment Corporation
`1015 Virginia Drive, Fort Washington Industrial Park
`Fort Washington, PA 19034
`(215) 643-7900 TWX: 510-661-0197
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`\
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`Fabrication Equipment and Supplies for the Integrated Circuit Industry
`
`WESTERN OFFICE: Sunnyvale, California
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`INDIA: SMS Associates, New Delhi • Telephone: 670346
`
`During Phase 1, the project explored three
`basic 3-D process technologies:
`
`• Multilayered silicon-on-insulator (SOl) pre(cid:173)
`pared using either beam annealed recrystalli
`zation (electron and laser beam), or low tem(cid:173)
`perature epitaxial growth (CVD, MOCVD
`MBE, and ionized beam deposition)
`'
`• Multilayered processing using
`intralayer i
`processes (lithography, etching, doping, de- \
`position, and intraconnection) as well as out(cid:173)
`layer processes (planarization, through-hole
`shield layers)
`• Two- and three-layer basic device feasibility
`
`To date, the Future Electron Devices Project
`has achieved moderate success. In 1985, Mii(cid:173)
`subishi announced a 2-layer 256 x 1-bit SRAM
`and a 11 00-gate array using laser-activated
`polysilicon. Concurrently, NEC fabricated a
`two-layer 53-stage ring oscillator and a 32-bit
`dynamic shift register using SOl. Sharp, a lead(cid:173)
`ing optoelectronics vendor, has introduced a
`prototype 5-level video signal processor by
`planarizing a polyimide-like resin. Matsushita
`has developed a 3-layer device featuring a
`CMOS SRAM, a level detector, and an 8-bit
`photosensor. Perhaps the most significant de(cid:173)
`velopment, because of its potential for dramati(cid:173)
`cally increasing density levels to 64Mb and
`beyond, was Toshjpa's 3-D IC technology for
`future 4Mb and 16Mb DRAMs.
`At MITI's annual project symposium in 1985,
`researchers presented a wide variety of
`papers. Some of these addressed GaAs-on-IC
`processes, electron beam recrystallized stack(cid:173)
`ed SOl CMOS devices, etch back planarization,
`and dual laser beam irradiation techniques.
`Japanese companies are being encouraged to
`pursue different processes and to develop a
`variety of 3-D devices.
`Mitsubishi Electric became in industry leader
`in mid-1986 when it announced prototype, large
`surface, 3-D devices for 16Mb and larger
`DRAMs. The devices are processed in laser(cid:173)
`recrystallized SOl material. Both a three-layer,
`256K SRAM and an image processor were test(cid:173)
`manufactured using SOl. The recrystallization
`process on four-inch diameter wafers was ac(cid:173)
`complished within 20 minutes. Mitsubishi plans
`to use recrystallized SOl on six-inch wafers in
`order to develop 16Mb DRAMs and 1 0,000-gate
`arrays on 10 mm x 9 mm chips.
`
`Where are the Japanese Headed?
`Pressured by competition from South Korea,
`Taiwan, and other emerging Asian countries,
`Japanese companies are rapidly shifting to cre(cid:173)
`ative research. MITI's Future Electron Devices
`Project shows promise in terms of making
`significant breakthroughs but, as only one proj(cid:173)
`ect, it represents just the tip of the iceberg. By
`the late 1980s, we will see a deluge of Japanese
`semiconductor patents and technical papers
`flowing from the 30 joint R&D projects, and this
`will be followed, in the 1990s, by a variety of in(cid:173)
`novative ICs such as video RAMs, AI process(cid:173)
`ors, and speech chips, etc. For U.S. and Euro(cid:173)
`pean companies seeking to be major players in
`the future, the challenge is obvious!
`
`-Sheridan Tatsuno
`Senior Industry Analyst
`
`i
`
`I
`1
`
`'1
`
`l -~
`
`MICRON ET AL. EXHIBIT 1053
`Page 3 of 3