MICRON ET AL. EXHIBIT 1007
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`(19) Japan Patent Office (JP)
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`(11) JPA Laid-open No.
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`(12) JAPANESE UNEXAMINED PATENT
`APPLICATION PUBLICATION (A)
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`H3-151637
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` (51) Int. Cl. 5
` H 01 L 21/318
`3)
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`21/205
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`Ident. Code
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`M
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`Internal Ref. No.
`6940-5F
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`7739-5F
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`(43) Publication Date: June 27, 1991
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`(Heisei
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`Examination Request: Yes
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`Total No. of Claims: 2 (Total 5 pages)
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`(54) Title of Invention
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`MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE AND
`PLASMA CVD DEVICE
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`(72) Inventor
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`(71) Applicant
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`(74) Agent
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`(21) Application No.
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`JPA H1-289957
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`(22) Date of Filing
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`November 9, 1989 (Heisei 1)
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`Isao Serita
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`Sakashita-cho 3-27-11, Hatogaya-shi, Saitama
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`Kowa Creator K.K.
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`Yoshinodai 2-8-36, Kawagoe-shi, Saitama
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`Kiyoko Inoue, Patent Attorney (and 1 other)
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`MICRON ET AL. EXHIBIT 1007
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`JPA Laid-open No. H3-151637
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`SPECIFICATION
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`1. Title of Invention MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE AND
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`PLASMA CVD DEVICE
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`2. Scope of Patent Claims
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`What is claimed is:
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`1. A manufacturing method of a semiconductor device, comprising:
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`supplying discharge frequency electric power of different frequencies using a plasma CVD method;
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`forming thin films having different stress directions on a semiconductor substrate; and
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`alternately stacking the thin films to control the overall stress.
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`2. A plasma CVD device, comprising
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`means to supply discharge frequency electric power of different frequencies to electrodes of a reactor so as
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`to generate tensile stress and compressive stress respectively on a semiconductor substrate.
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`3. Detailed Description of the Invention
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`[Industrial Field of Application]
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`The present invention relates to a manufacturing method of a semiconductor device and a plasma CVD
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`device, and especially relates to a method for forming a thin film such as an insulating film, a protective film,
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`and the like on the wiring surface of a semiconductor substrate, and also to a device thereof.
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`[Related Art]
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`Various CVD methods have been used to form a thin film on a semiconductor substrate, however it has
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`been known that, among those, a plasma CVD method generally forms a thin film (silicon nitride film) having
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`large stress. This may warp the substrate, disconnect the wiring on the substrate, and make wires to contact
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`with each other.
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`To solve these types of problems, using different types of CVD methods, a method for forming a silicon
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`nitride film having compressive stress and a silicon nitride film having tensile stress respectively, and
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`alternately stacking them on a substrate, has been proposed.
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`A conventional method focuses on the fact that a completely different CVD method forms thin films
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`having different stress directions, thus a plurality of different types of CVD devices are prepared and used in
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`combination, therefore it results in complication of the device, inconvenience in terms of maintenance,
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`operation, and the like, and also being uneconomical.
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`[Problem To be Solved by the Invention]
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`An object of the present invention is to solve these types of problems and provide an excellent
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`semiconductor device having a controlled stress direction without using different types of CVD methods.
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`MICRON ET AL. EXHIBIT 1007
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`In addition, an object of the present invention is to provide a plasma CVD device that can control the stress
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`JPA Laid-open No. H3-151637
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`direction in an easy manner.
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`[Means for Solving Problem]
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`The present invention achieves the above objects by a manufacturing method of a semiconductor device,
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`wherein, a plasma CVD method is used to form thin films having different stress directions by changing the
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`discharge frequency and alternately stacking a thin film having compressive stress and a thin film having
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`tensile stress to control the stress.
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`[Operation]
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`Using a plasma CVD method, a thin film having tensile stress and a thin film having compressive stress are
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`formed to be stacked on one another on a semiconductor substrate. Either of the films may be placed on top of
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`or underneath the other film, and each of these films may be stacked in a plurality of layers. Note that the thin
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`films are formed in an appropriate thickness corresponding to the value of reciprocal stress.
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`The above thin films are formed by a plasma CVD device that can convert discharge frequency electrical
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`power, or a plasma CVD device having a discharge frequency electrical power of different frequencies.
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`[Embodiments]
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`It has been discovered that, while forming a silicon nitride film on a semiconductor substrate using a
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`plasma CVD device, a different discharge frequency of the device may generate tensile stress or compressive
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`stress. With respect to such a change in stress of a thin film, a discharge frequency of approximately 1 MHz or
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`lower tends to generate compressive stress while a discharge frequency of approximately 10 MHz or higher
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`tends to generate tensile stress, and in case of such compressive stress, the substrate is curved so as to be
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`convex outward, while, in case of tensile stress, it is curved so as to be convex inward.
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`Consequently, the combination of a film having tensile stress and a film having compressive stress enables
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`no external force to be applied to the semiconductor substrate described above by cancelling out such stresses.
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`FIG. 1 illustrates a plasma CVD device configured of a reactor 1; an upper electrode 2; a lower electrode 3;
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`a reactant gas introduction part 4; an exhaust port 5; and a heater 6. It is configured to enable discharge electric
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`power of different frequencies to be supplied to both electrodes of the device, and the embodiment in the
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`drawing is configured of a high frequency power supply 7 of 200 KHz and a high frequency power supply 8 of
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`13.56 MHz, being connected in parallel and being switched by a switch 9, however one high frequency power
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`supply may be configured to be variable.
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`A silicon nitride film 11 (HP-SiN) is formed by mounting a semiconductor substrate 10 on top of the lower
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`electrode 3 described above and applying the one high frequency power supply of 13.56 MHz to the substrate.
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`This forms a thin film having tensile stress. Next, a silicon nitride film 12 (LP-SiN) is formed on
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`JPA Laid-open No. H3-151637
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`top of the former thin film by switching the power supply with the switch 9 described above and applying the
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`other high frequency power supply of 200 KHz (FIG. 2).
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`FIG. 3 illustrates the relationship of the thicknesses and the stress of these thin films so as to show the
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`overall stress state generated by stacking the silicon nitride film 11 and the silicon nitride film 12, and this case
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`shows the stress state of the thin films, wherein the thickness of the silicon nitride film 12 is maintained
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`constant at 500 Å while that of the silicon nitride film 11 is varied. This indicates that, for only the silicon
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`nitride film 12, the compressive stress is approximately 10.5x109dyne/cm2, however, in the event the thickness
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`of the silicon nitride film 11 described above reaches 2500Å, the stresses of both silicon nitride films are
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`cancelled out, thus resulting in an overall stress of 0. The embodiment in FIG. 4, wherein a wiring 13 is
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`provided on a semiconductor substrate, the silicon nitride film 11 described above being formed on the wiring,
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`and further the silicon nitride film 12 being formed on the top thereof, prevents the wires from being
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`disconnected, touching each other, and the like.
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`Note that the combination of the above silicon nitride film 11 and the above silicon nitride film 12 may be
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`also configured by layering a plurality of the films.
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`[Effect of the Invention]
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`The present invention can control a thin film formed on a substrate by the above configuration by changing
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`the discharge frequency of a plasma CVD, therefore it easily prevents warping of the semiconductor substrate,
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`disconnection, contact and the like of the wires, while enabling a uniform substrate without distortion, and it
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`may improve the yield and the reliability, thus resulting in an efficient and economical manufacturing thereof.
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`4. Brief Description of the Drawings
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`The drawings illustrate an embodiment of the present invention, FIG. 1 is a schematic diagram; FIG. 2
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`is an enlarged sectional view of a part showing a state in which a thin film is formed on a semiconductor
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`substrate; FIG. 3 is a chart illustrating the relationship between the stress applied to a thin film and the
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`thickness of the thin film; and FIG. 4 is an enlarged sectional view of a part showing a state in which a thin film
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`is formed on the wiring of a semiconductor substrate.
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`Description of the Reference Numerals
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`2, 3: Electrodes
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`7, 8: High frequency power supplies
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`9:
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`Switch
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`10:
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`Semiconductor substrate
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`11, 12: Silicon nitride films
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`13: Wiring
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`MICRON ET AL. EXHIBIT 1007
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`Applicant:
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`Agent:
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`Agent:
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`Kowa Creator K.K.
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`Kiyoko Inoue, Patent Attorney
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`Yoshiji Kamekawa, Patent Attomey
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`[Saul Kiyob Inoue, PatentAttorney]
`[Seal Yoshiji Karndnwa, Pat¢ntAttorney]
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`JPA Laid-open No. H3-151637
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`MICRON ET AL. EXHIBIT 1007
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`JPA Laid-open No. H3-151637
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`I-lF‘— S i NThin Fi|m(A)
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`To: Mr. Fumitake Yoshida, Commissioner of The Patent Office
`1.
`Indication of the Case
`JPA H1-289957
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`Procedural Amendment
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`December 5, 1989 (Heisei 1)
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`2.
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`3.
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`Title of Invention
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`MANUFACTURING METHOD OF SEMICONDUCTOR
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`DEVICE AND PLASMA CVD DEVICE
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`Person Requesting the Amendment
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`Relationship to the case
`Name
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`Applicant
`Kowa Creator K.K.
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`Agent
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`Address
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`Ginza 7-14-3, Matsu [illegible] Building, Chuo-ku, Tokyo
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`Phone ([illegible]) 177[illegible] flvlain)
`45 72
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`(4235) Name
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`Kiyoko Inoue, Patent Attorney 5.
`(and 1 other)
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`.
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`
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`a]: Kiyoko Inoue,
`nt Attorney]
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`Date of Order for Amendment
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`(voluntary)
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`Month Date ,Year
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`(Heisei
`
`)
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`(Dispatch Date Month Date ,Year
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`(Heisei
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`))
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`Object for Amendment
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`FIG. 1 of the drawings
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`Contents Of Amendment
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`Fonnality Examination
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`[Sea]: Taker]
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`
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`As Shown in the Attached Paper
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`[Seal: Patent Oflice, 12/5/I989, [illegible]
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`MICRON ET AL. EXHIBIT 1007
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`JPA Laid-open No. H3-151637
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`FIG. 1
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`power supply
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`Eifllfiflta
`High freque.n-cy
`- power supply
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`High fr;x_1-ue.n.cy
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`MICRON ET AL. EXHIBIT 1007
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`DECLARATION UNDER 8 U.S.C.
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`1746
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`I have reviewed and
`I, David Baldwin, am fluent in both the Japanese and English languages.
`translated Japanese Laid-Open Patent Publication No. H3-151637 from Japanese to English.
`I
`hereby certify that the translation is accurate and complete.
`I understand that willful false statements
`and the like are punishable by fine or imprisonment, or both. pursuant to 18 U.S.C. § 1001.
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`I certify under penalty of perjury under the laws of the United States that the foregoing is true and
`correct.
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`
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`Signature
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`Executed on this fday of December, 2015.
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`MICRON ET AL. EXHIBIT 100
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