111111
`
`1111111111111111111111111111111111111111111111111111111111111
`US007542045B2
`
`c12) United States Patent
`Owen et al.
`
`(10) Patent No.:
`(45) Date of Patent:
`
`US 7,542,045 B2
`*Jun. 2, 2009
`
`(54) ELECTRONIC SYSTEM AND METHOD FOR
`DISPLAY USING A DECODER AND ARBITER
`TO SELECTIVELY ALLOW ACCESS TO A
`SHARED MEMORY
`
`(75)
`
`Inventors: Jefferson Eugene Owen, Freemont, CA
`(US); Raul Zegers Diaz, Palo Alto, CA
`(US); Osvaldo Colavin, Tucker, GA
`(US)
`
`(73) Assignee: STMicroelectronics, Inc., Carrollton,
`TX (US)
`
`( *) Notice:
`
`Subject to any disclaimer, the term of this
`patent is extended or adjusted under 35
`U.S.C. 154(b) by 0 days.
`
`This patent is subject to a terminal dis(cid:173)
`claimer.
`
`(21) Appl. No.: 11/956,165
`
`(22) Filed:
`
`Dec. 13, 2007
`
`(65)
`
`Prior Publication Data
`
`(56)
`
`References Cited
`
`U.S. PATENT DOCUMENTS
`
`4,257,095 A
`
`3/1981 Nadir ......................... 710/119
`
`(Continued)
`
`FOREIGN PATENT DOCUMENTS
`
`CA
`
`2100700
`
`111995
`
`(Continued)
`
`OTHER PUBLICATIONS
`
`U.S. District Court, Eastern District of Texas Live (Sherman), Civil
`Docket For Case #: 4:03-cv-00276-LED, STMicroelectronics, Inc.,
`Plaintiffv. Motorola, Inc., andFreescale Semiconductor, Inc., Defen(cid:173)
`dants, Counterclaim Plaintiffs v. STMicroelectronics NV., and
`STMicroelectronics, Inc., Counterclaim Defendants, date filed Jul.
`18, 2003, 47 pages.
`
`(Continued)
`
`Primary Examiner-Hau H Nguyen
`(74) Attorney, Agent, or Firm-Lisa K. Jorgenson; David V.
`Carlson
`
`US 2008/0088637 Al
`
`Apr. 17, 2008
`
`(57)
`
`ABSTRACT
`
`Related U.S. Application Data
`
`(63) Continuation of application No. 10/174,918, filed on
`Jun. 19, 2002, now Pat. No. 7,321,368, which is a
`continuation of application No. 09/539,729, filed on
`Mar. 30, 2000, now Pat. No. 6,427,194, which is a
`continuation of application No. 08/702,910, filed on
`Aug. 26, 1996, now Pat. No. 6,058,459.
`
`(51)
`
`Int. Cl.
`G06F 151167
`(2006.01)
`G09G 5139
`(2006.01)
`G09G 5136
`(2006.01)
`(52) U.S. Cl. ....................... 345/541; 345/542; 345/531;
`345/547
`(58) Field of Classification Search ................. 345/541,
`345/531,542,547,555,501,519,545
`See application file for complete search history.
`
`An electronic system, an integrated circuit and a method for
`display are disclosed. The electronic system contains a first
`device, a memory and a video/audio compression/decom(cid:173)
`pression device such as a decoder/encoder. The electronic
`system is configured to allow the first device and the video/
`audio compression/decompression device to share the
`memory. The electronic system may be included in a com(cid:173)
`puter in which case the memory is a main memory. Memory
`access is accomplished by one or more memory interfaces,
`direct coupling of the memory to a bus, or direct coupling of
`the first device and decoder/encoder to a bus. An arbiter
`selectively provides access for the first device and/or the
`decoder/encoder to the memory. The arbiter may be mono(cid:173)
`lithically integrated into a memory interface. The decoder
`may be a video decoder configured to comply with the
`MPEG-2 standard. The memory may store predicted images
`obtained from a preceding image.
`
`17 Claims, 6 Drawing Sheets
`
`FIRST DEVICE
`.12
`
`60
`
`OW. ENGINE_]
`
`I
`
`y
`
`MEMORY INTERFACE
`56
`~
`
`I MEMORY CONTROLLER I
`
`II
`
`FAST BUS
`
`/
`40
`
`-~VIDEO I I VIDEO ~,----
`I I AUDIO ~ INTERFACE
`
`REGISTER
`
`.2Jl
`'------
`ENCODER
`
`DECODING
`REGISTER
`CIRCUIT
`INT£RFACE ~ AUDIO
`.2Jl
`DECODING
`_
`CIRCUIT
`
`DECODER
`
`ENCODING
`CIRCUIT
`
`ENCODING
`CIRCUIT
`
`4~
`
`52
`
`l
`l
`I ow. ENGINE
`~
`l LlEUORY INTERFACE
`~REFRESlLOGIC
`
`~6
`
`58
`
`v76
`
`MEMORY CONTROLLER
`
`I
`
`ill)
`
`82
`
`56
`
`!.t'-70
`
`MEMORY
`~
`
`I
`
` ZTE EXHIBIT 1001
`
`Page 1 of 19
`
`

`
`US 7,542,045 B2
`Page 2
`
`U.S. PATENT DOCUMENTS
`
`4,774,660 A
`4,894,565 A
`5,027,400 A
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`5,450,542 A
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`Stand-Alone and Hierarchical MPEG2 HDTV-Decoders with Syn(cid:173)
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`
`Page 4 of 19
`
`

`
`U.S. Patent
`
`Jun.2,2009
`
`Sheet 1 of 6
`
`US 7,542,045 B2
`
`MEMORY
`INTERFACE
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`Page 5 of 19
`
`

`
`U.S. Patent
`
`Jun.2,2009
`
`Sheet 2 of 6
`
`US 7,542,045 B2
`
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`Page 6 of 19
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`Page 7 of 19
`
`

`
`U.S. Patent
`
`Jun.2,2009
`
`Sheet 4 of 6
`
`US 7,542,045 B2
`
`17
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`Page 8 of 19
`
`

`
`U.S. Patent
`
`Jun.2,2009
`
`Sheet 5 of 6
`
`US 7,542,045 B2
`
`168
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`Page 9 of 19
`
`

`
`U.S. Patent
`
`Jun.2,2009
`
`Sheet 6 of 6
`
`US 7,542,045 B2
`
`80,
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`Page 10 of 19
`
`

`
`US 7,542,045 B2
`
`1
`ELECTRONIC SYSTEM AND METHOD FOR
`DISPLAY USING A DECODER AND ARBITER
`TO SELECTIVELY ALLOW ACCESS TO A
`SHARED MEMORY
`
`CROSS-REFERENCE TO RELATED
`APPLICATIONS
`
`2
`sequence is displayed. However, a bitstream can only be
`decoded by a decoder if it complies with the standard used by
`the decoder. To be able to decode the bitstream on a large
`number of systems, it is advantageous to encode the video
`5 and/or audio sequences in compliance with a well accepted
`decompression standard. The MPEG standards are currently
`well accepted standards for one-way communication. H-261,
`and H.263 are currently well accepted standards for video
`telephony.
`Once decoded, the images can be displayed on an elec-
`tronic system dedicated to displaying video and audio, such
`as television or a Digital Video Disk (DVD) player, or on
`electronic systems