111111
`
`1111111111111111111111111111111111111111111111111111111111111
`US007321368B2
`
`c12) United States Patent
`Owen et al.
`
`(10) Patent No.:
`(45) Date of Patent:
`
`US 7,321,368 B2
`Jan.22,2008
`
`(54) ELECTRONIC SYSTEM AND METHOD FOR
`DISPLAY USING A DECODER AND ARBITER
`TO SELECTIVELY ALLOW ACCESS TO A
`SHARED MEMORY
`
`(75)
`
`Inventors: Jefferson Eugene Owen, Freemont, CA
`(US); Raul Zegers Diaz, Palo Alto, CA
`(US); Osvaldo Colavin, Tucker, GA
`(US)
`
`(56)
`
`References Cited
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`(Continued)
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`FOREIGN PATENT DOCUMENTS
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`CA
`
`2100700
`
`111995
`
`(73) Assignee: STMicroelectronics, Inc., Carrollton,
`TX (US)
`
`( *) Notice:
`
`Subject to any disclaimer, the term of this
`patent is extended or adjusted under 35
`U.S.C. 154(b) by 16 days.
`
`(21) Appl. No.: 10/174,918
`
`(22) Filed:
`
`Jun. 19, 2002
`
`(65)
`
`Prior Publication Data
`
`US 2002/0180743 Al
`
`Dec. 5, 2002
`
`(63)
`
`(51)
`
`(52)
`
`(58)
`
`Related U.S. Application Data
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`Continuation of application No. 09/539,729, filed on
`Mar. 30, 2000, now Pat. No. 6,427,194, which is a
`continuation of application No. 08/702,910, filed on
`Aug. 26, 1996, now Pat. No. 6,058,459.
`
`Int. Cl.
`G06F 151167
`(2006.01)
`G09G 5136
`(2006.01)
`G09G 5139
`(2006.01)
`U.S. Cl. ...................... 345/541; 345/542; 345/531;
`345/547
`Field of Classification Search ................ 345/555,
`345/547, 501, 519, 531, 545, 541, 542; 382/232,
`382/233, 236, 244-246, 248, 250; 375/240.15
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`(Continued)
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`OTHER PUBLICATIONS
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`Bhed, H. and P. Srinivasan, "A High-Performance Cross-Platform
`MPEG Decoder," Digital Video Compression on Personal Comput(cid:173)
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`
`(Continued)
`
`Primary Examiner-Kee M. Tung
`Assistant Examiner-Hau H Nguyen
`(74) Attorney, Agent, or Firm-David V. Carlson; LisaK.
`Jorgenson
`
`(57)
`
`ABSTRACT
`
`An electronic system, an integrated circuit and a method for
`display are disclosed. The electronic system contains a first
`device, a memory and a video/audio compression/decom(cid:173)
`pression device such as a decoder/encoder. The electronic
`system is configured to allow the first device and the
`video/audio compression/decompression device to share the
`memory. The electronic system may be included in a com(cid:173)
`puter in which case the memory is a main memory. Memory
`access is accomplished by one or more memory interfaces,
`direct coupling of the memory to a bus, or direct coupling of
`the first device and decoder/encoder to a bus. An arbiter
`selectively provides access for the first device and/or the
`decoder/encoder to the memory. The arbiter may be mono(cid:173)
`lithically integrated into a memory interface. The decoder
`may be a video decoder configured to comply with the
`MPEG-2 standard. The memory may store predicted images
`obtained from a preceding image.
`
`25 Claims, 6 Drawing Sheets
`
`FIRST DEVICE
`
`~
`
`72
`
`UEUOR'f INTERFACE
`5~
`I UEUORr CONTROUER I
`
`,_...,
`40
`
` ZTE EXHIBIT 1001
`
`Page 1 of 20
`
`

`
`US 7,321,368 B2
`Page 2
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`U.S. PATENT DOCUMENTS
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`4,774,660 A
`4,894,565 A
`5,027,400 A
`5,212,742 A
`5,250,940 A
`5,363,500 A *
`5,371,893 A
`5,450,542 A *
`5,459,519 A
`5,461,679 A
`5,522,080 A
`5,557,538 A
`5,576,765 A *
`5,579,052 A
`5,590,252 A
`5,598,525 A
`5,621,893 A
`5,623,672 A
`5,682,484 A
`5,748,203 A *
`5,774,206 A *
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`5,797,028 A *
`5,809,245 A
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`1995, Conference Publication No. 410, pp. 6-10.
`Herbert Plansky, "Variable Block-Size Vector Quantization in the
`Transform Domain," Signal Processing VI Theories and Applica(cid:173)
`tions, vol. III, 1992, pp. 1243-1246.
`P. Venkat Rangan et a!., "Designing an On-Demand Multimedia
`Service," IEEE Communications Magazine, Jul. 1992, vol. 30, No.
`7, pp. 56-64.
`S.F. Reddaway, "Fractal Graphics and Image Compression on a
`DAP," The Design and Application of Parallel Digital Processors,
`Apr. 11-15, 1988, p. 201.
`William D. Richard eta!., "The Washington University Broadband
`Terminal," IEEE Journal on Selected Areas in Communications,
`Feb. 1993, vol. 11, No. 2, pp. 276-282.
`William D. Richard et al., "The Washington University Multimedia
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`Reza Rooholamini and Vladimir Cherkassky, "ATM-Based Multi(cid:173)
`media Servers," Multimedia, Spring 1995, vol. 2, No. 1, pp. 39-52.
`Arnr Sabaa et a!., "Design and Modelling of a Nonblocking Input
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`1997, pp. 87-93.
`
`N.L. Seed eta!., "An Enhanced Transputer Module for Real-Time
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`cessing, 1989, pp. 131-135.
`Pallavi Shah, "Multimedia on the Internet," The Twentieth Annual
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`Doug Shepherd et al., "Quality-of-Service Support for Multimedia
`Applications," Multimedia, Fall 1996, vol. 3, No. 3, pp. 78-82.
`N. Sriskanthan et al., "A Real-Time PC-Based Video Phone System
`on ISDN/Lan," IEEE Transactions on Consumer Electronics, May
`1995, vol. 41, No. 2, pp. 332-342.
`Paul A. Stirpe and Dinesh C. Verma, "Application Migration to
`Reserved Bandwidth Networks," Multimedia Computing and Net(cid:173)
`working 1995, Feb. 1995, vol. 2417, pp. 428-434.
`Ichiro Tamitani eta!., "An Encoder/Decoder Chip Set for the MPEG
`Video Standard," IEEE International Conference on Acoustics,
`Speech and Signal Processing, Mar. 23-26, 1992, pp. 661-664.
`Prasoon Tiwari and Eric Viscito, "A Parallel MPEG-2 Video
`Encoder with Look-Ahead Rate Control," The 1996 IEEE Interna(cid:173)
`tional Conference on Acoustics, Speech, and signal Processing
`Conference, May 7-10, 1996, pp. 1994-1997.
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`ment System for Video Files," ACM Multimedia 93, Aug. 1-6, 1993,
`pp. 393-400.
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`Stand-Alone and Hierarchical MPEGHDTV-Decoders with Syn(cid:173)
`chronous DRAMs," IEEE International Symposium on Circuits and
`Systems, Apr. 30-May 3, 1995, pp. 609-612.
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`vation in Advance," Multimedia Tools and Applications, 1997, pp.
`255-278.
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`for Multimedia Networks with a Deterministic Service," IEEE
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`Chip for MPEG Video Image Coding," IEEE Transactions on
`Consumer Electronics, Nov. 1995, vol. 41, No.4, pp. 1127-1137.
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`Circuits and Systems for Video Technology, Jun. 1993, vol. 3, No.
`3, pp. 175-181.
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`and
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`("MCD212")(as described in the Advance Information manual,
`published in the U.S. Aug. 1995, at MOT-S 723153-723240).
`
`the
`Apple Macintosh Quadra 840A V when executing
`"Fusionrecorder 1.0" application as described in the 1993 Devel(cid:173)
`oper Note entitled Macintosh Quadra 840A V and Macintosh
`Centris 660A V Computers.
`C-Cube CL450 MPEG Video Decoder ("CL450") as described in
`"CL450 MPEG Decoder User's Manual" C-Cube
`the
`Microsystems, Milpitas, CA 1992 (MOT-S 721789-721874).
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`chip set," IEEE Micro, vol. 14, No. 2, Apr. 1994, pp. 10-22.
`
`* cited by examiner
`
`Page 5 of 20
`
`

`
`U.S. Patent
`
`Jan.22,2008
`
`Sheet 1 of 6
`
`US 7,321,368 B2
`
`MEMORY
`INTERfACE
`
`~
`
`MICRO-
`CONTROLLER
`
`.1§
`
`VIDEO DECODING
`CIRCUIT
`1.2
`
`AUDIO DECODING
`CIRCUIT
`ll
`jl ~
`
`) 1
`~
`
`MEMORY
`22
`
`Fig. la
`(Prior Art)
`
`MICRO-
`CONTROLLER
`
`~
`
`~
`
`~
`
`~ ....
`~--~
`
`REGISTER
`INTERFACE
`
`lQ
`
`VIDEO DECODING
`CIRCUIT
`12
`
`AUDIO DECODING
`CIRCUIT
`H
`
`~
`MEMORY
`INTERFACE
`
`~
`
`10-'
`
`~
`
`1
`
`MEMORY
`22
`
`Fig. Jb
`(Prior Art)
`
`Page 6 of 20
`
`

`
`U.S. Patent
`
`Jan.22,2008
`
`Sheet 2 of 6
`
`US 7,321,368 B2
`
`152'-. CPU
`
`146
`~
`~ 1/F
`
`168 ' MAIN
`MEM
`,zo
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`122
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`DECODER
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`CTLR
`'YW}
`...... _,.,
`
`./121
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`R
`G
`B
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`' CD l
`..... _,.,
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`Fig. Jc
`(Prior Art)
`
`DECODING I 10
`
`I Pt
`
`DISPLAY
`
`82
`
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`
`P4
`
`83
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`(Prior Art)
`
`Page 7 of 20
`
`

`
`FIRST DEVICE
`.!2
`
`60
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`MEMORY INTERFACE
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`20
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`DECODING
`CIRCUIT
`
`AUDIO
`DECODING
`CIRCUIT
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`VIDEO
`ENCODING
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`AUDIO
`ENCODING
`CIRCUIT
`
`DECODER
`
`7
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`t
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`ARBITER 1
`r
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`.....
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`
`Page 8 of 20
`
`

`
`U.S. Patent
`
`Jan.22,2008
`
`Sheet 4 of 6
`
`US 7,321,368 B2
`
`17
`4
`
`INTERFACE
`
`182
`?
`DISPLAY
`
`184
`/
`FRAME
`BUFFER
`f-'-185
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`
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`2"'\
`
`LAN
`CONTROLLER
`
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`
`GRAPHICS
`ACCELERATOR
`(WITH VIDEO SCALER AND
`COLOR SPACE CONVERTER)
`
`t--
`
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`COOEC
`
`v-1
`80
`
`PCI BUS
`
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`
`PCI
`
`v160
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`PROCESSOR
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`DEVICE
`154
`158
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`EIDE
`J.B§
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`1
`l
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`58
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`MEMORY INTERFACE
`()
`I
`1\..167
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`MAIN
`168./ MEMORY
`
`Page 9 of 20
`
`

`
`U.S. Patent
`
`Jan.22,2008
`
`Sheet 5 of 6
`
`US 7,321,368 B2
`
`MEM
`
`121
`
`R
`G
`8
`
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`....
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`I B2
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`Fig. 5
`VARIABLE
`RUN
`LENGTH
`LENGTH
`DECODER DECODER
`
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`
`30
`
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`
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`
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`
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`
`35
`
`37
`
`PCI 1/F
`
`70
`
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`Fig. 6
`
`Page 10 of 20
`
`

`
`U.S. Patent
`
`Jan.22,2008
`
`Sheet 6 of 6
`
`US 7,321,368 B2
`
`ao,
`
`..
`
`DECODER
`4~
`52
`
`ENCODER I
`\
`46
`DMA ENGINE I
`76
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`REFRESH LOGIC I
`· 1 ARBITER
`t ~8
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`5~ MEMORY INTERFACE
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`BUFF~R -
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`
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`_; 30 ACCELERATOR
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`Fig. 7
`
`Page 11 of 20
`
`

`
`US 7,321,368 B2
`
`1
`ELECTRONIC SYSTEM AND METHOD FOR
`DISPLAY USING A DECODER AND ARBITER
`TO SELECTIVELY ALLOW ACCESS TO A
`SHARED MEMORY
`
`CROSS-REFERENCE TO RELATED
`APPLICATIONS
`
`This application is a continuation of U.S. patent applica(cid:173)
`tion Ser. No. 09/539,729, filed Mar. 30, 2000 now U.S. Pat
`No. 6,427,194, and allowed Mar. 4, 2002, entitled "ELEC(cid:173)
`TRONIC SYSTEM AND METHOD FOR DISPLAY
`USING A DECODER AND ARBITER TO SELECTIVELY
`ALLOW ACCESS TO A SHARED MEMORY", which is a
`continuation of U.S. patent application Ser. No. 08/702,910,
`filed Aug. 26, 1996, and issued May 2, 2000 as U.S. Pat. No.
`6,058,459, entitled: "VIDEO/AUDIO DECOMPRESSION/
`COMPRESSION DEVICE INCLUDING AN ARBITER
`AND METHOD FOR ACCESSING A SHARED
`MEMORY." All of the U.S. patents, U.S. patent application
`publications, U.S. patent applications, foreign patents, for(cid:173)
`eign patent applications and non-patent publications referred
`to in this specification and/or listed in the Application Data
`Sheet, are incorporated herein by reference, in their entirety.
`
`2
`decoded. The encoding can be done in any manner, as long
`as the resulting bitstream complies with the standard.
`Video and