11.1111111111111
`
`US005797028A
`Patent Number:
`Date of Patent:
`
`5,797,028
`Aug. 18, 1998
`
`United States Patent
`Gulick et al.
`
`[ 191
`
`[11]
`
`l451
`
`[54] COMP UTER SYSTEM liAVING AN
`IMPROVED DIGITAL AND ANALOG
`CONFIGURATION
`
`[75)
`
`Inve ntors: Dale E. G uHck; Andy Lambrecht;
`Mib W~bb; Larry Hfwitt. all of
`Austin: Brian Barnes. Round Rock. all
`of Tex.
`
`[73] Assignee: Advanced Micro ~vices, Inc..
`Sunnyvale. Calif.
`
`[21] Appl. No.: 526,488
`
`Sep. 11, 1995
`
`[22] Filed:
`[51) Int. CL 6
`••.•••.••••..••••.•.••••••••••••..••.•.••..•••....••.• G06F lS/tO
`[52] U.S. Cl. --............................... 3~18041.32; 364/228.6;
`364/DIG. l
`(58) Field of Search ............................... 395/800. 800.32.
`395/800.35. 800.01: 364/489. 228.6. DIG. 1
`
`{56]
`
`References Cited
`
`U.S. PATENT DOCUMENTS
`
`5119&8 Kupnicki et aJ. ......................... 380114
`4.7 42.544
`611991 Fujimori ................................. 3481233
`5.027.214
`2/1992 Ida et al . ................................... 381/63
`5.091.951
`5, 111,409 511992 Gaspez et al .
`.......................... 3951807
`
`52 10.806
`5.43-!.90
`5592.391
`
`S/1993 Kihara et al . ........................... 3811103
`711995 Tung e1 al. . ............................ 379n02
`111997 Muyshondt et al ..................... 3W 489
`
`OTHER PUBLICATIONS
`
`PCI Local Bus-PC/ Multimedia Design Guide-Revision
`LG-Mar. 29. 1994. 43 pages.
`
`PrifiUJry Examiner-John E. Harrity
`Attome>; Agenr. or Firm-Conley. Rose & Tayon: Jeffrey C.
`Hood
`
`[57)
`
`ABSTRACT
`
`A computer system including separate digital and analog
`system chips which provides increased performance over
`current computer architectures. The computer system of the
`present invention includes a digital system chip wltich
`performs various digital functions. including multimedia
`functions and chipset functions. and a separate analog chip
`whlcb perfoons analog function s. including digital to analog
`and analog to digital conversions. Thus the present invention
`optimizes silicon use a nd design by splitting up digital and
`analog functioo5 on separate chips. The system of the
`present invention also separates digital noise from analog
`noise. allowing a ltigher degree of integration while increas(cid:173)
`ing stability.
`
`32 Claims, 11 Drawing Sheets
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`Page 1 of 20
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`ZTE Exhibit 1023
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`

`
`5.797.028
`
`2
`1
`For example. a video card includes digital circuitry which
`COMPUTER SYSTEM HAVING AN
`performs polygon rendering. texture mapping and other
`IMPROVED DIGITAL AND ANALOG
`CONFIGURATION
`pixel manipulation operations. and also includes the digital
`memory portion of a RAMDAC (random access m emory
`FIELD OF HIE INVENTION
`s digital to analog converter). A video card also includes
`The pr esent invention relates to a computer system having
`analog circuitry which performs the digital to analog con(cid:173)
`~l"'ratt> digital and analog system chips which is optimized
`vcr.;ion am! gcm:ratcs ROB (r<:d. green and blue) analog
`for real-time multimedia and communications applications.
`voltages which drive a video monitor. Likewise. a sound
`wherein the digital chip integrates digital portions of mul(cid:173)
`card includes digital circuitry which performs audio pro-
`timedia and communications processing and the analog chip
`10 cessing functions such as MIDL wavetable synthesis. etc ..
`integrates analog portions of multimedia and communica(cid:173)
`and also .includes analog circuitry to generate the appropriate
`tions processing.
`analog audio signals that are P£0Vided to the speakers.
`DESCRIPnON OF THE RELATED ART
`As multimedia and communication applications become
`more prevalent . multimedia and communication hardware
`Computer architectures generally include a plurality of
`devices interconnected by one or more various buses. For 15 will correspondingly become essential components in per-
`sonal comptJter systems. Therefore. an improved computer
`example. modern computer systems typically include a CPU
`coupled through bridge logic to main memory. The bridge
`.
`.
`system architecture is desired which is opturuzed for mul-
`logic also typically couples to a high bandwidtll local
`timedia and communication applications as well as for
`expansion bus. such as the peripheral c.omponent intercon-
`nect (PCI) bus or the VESA (Video Electronics Standards 20 non-realtime applications.
`Association) VL bus. Examples of devices which can be
`SUMMARY OF T HE INVENTION
`coupled to local expansion buses include video accelerator
`cards. audio cards. telephony cards. SCSI adapters. network
`interface cards. etc. An older type expansion bus is generally
`coupled to the local expansion bus. Examples of such
`expansion buses included the industry standard architecture
`(ISA) bus. also referred to as the M bus. the extended
`industry standard architecture (EISA) bus. or the rnicrochan·
`nel architecture (MCA) bus. Various devices may be coupled
`to this second expansion bus. including a fax/modem. sound
`card. etc.
`Personal computer systems were originally developed for
`business applications such as word processin g and
`spreadsheet~. among other!:. However. computer systems are
`currently being used to handle a number of real time
`applications. including multimedia applications having
`video and audio components. video capture and playback.
`telephony applications. and speech recognition and
`synthesis. among Olhers. These real time applications typi(cid:173)
`cally require a large amount of system resources aod band·
`width.
`One problem that has arisen is that computer systems
`originally designed for business applications are not well
`suited for the real-time requirements of modern multimedia
`and communications applications. For example. modern
`personal computer system arcttitectwes still presume that
`the majority of applications executing on the computer
`system are non real-time business applications such as word
`IX'ocessing and/or S!X'eadsheet applications. which execute
`primarily on the maio CPU. In general. computer systems
`have not traditionally been designed with multimedia and/or
`communication hardware as part of the system. and thus the
`system i s not optimized for multimedia applications. Rather.
`multimedia and/or communication hardware is typically
`designed as an add-in card for optional insertion in an
`expansion bus of the computer system.
`In many cases. multimedia hardware cards situated on an
`expansion bus do not have the required access to system
`memory and other system resources for proper operation. In
`addition. since the computer system architecture is not
`optimized fer real-time applications. multimedia and com(cid:173)
`munications hardware cards generally do nOl make efficient
`use of system resources. As an example. hardware cards
`which perform video. audio and/or communications func·
`lions each typically include a digital portion which pr ocesses
`digital data and an analog portion which processes analog
`data.
`
`The present invention comprises a computer system
`which provides increased perforliUUlce over current com-
`2~ puter architectures. The computer system of the present
`invention includes a digital system chip which pe.rforrns
`various digital functions. including multimedia and C>Qrnmu(cid:173)
`nication functions. and a separate analog chip which per(cid:173)
`forms analog functions. Thus the present inventio,n opti-
`30 rnizes silicon use and design by splitting up digital and
`analog functions on separate chips. The system of the
`present invention also separates digital noise from analog
`noise. allowing a higher degree of integration while increas(cid:173)
`ing stability.
`In the preferred embodiment. the computer system
`iacludes a CPU coupled through chip set or bridge l ogic to
`main memory. The bridge logic also couples to a local
`expansion bus such as the PCJ bus. Various devices may be
`connected to the PCI bus. including a network interface
`40 card. as wen as other peripherals. The bridge logic and maio
`memory also couple to a digital system chip which performs
`various digital functions in the computer system. In one
`embodiment. the digital system chip couples directly to the
`CPU and main memory. and the digital system chip includes
`4s the PCI bridge logic. the maio memory controller logic. and
`other chipset logic.
`The digital system chip includes one or more DSPeogines
`that perfonn video. graphics. audio and/or telephony appli(cid:173)
`cations. The DSP engines may comprise either dedicated
`so video. audio and/or communication engines or general pur(cid:173)
`pose DSP engines. The digita'l system chip also performs
`various digital operations in the computer system. including
`one or more of power management functions. fioppy coo(cid:173)
`troller functions. serial and parallel 110 port functions. and
`ss hard disk interface functions. A s desired. the digital system
`chip may perform other functio ns. including. EIDE support
`and SCSI support. Thus the di:gitaJ system chip performs a
`number o f real-time digital functions. including audio and
`video functions. as well as others.
`60 An analog system chip is connected directly to the digital
`system cttip and performs various analog functions. includ(cid:173)
`ing analog-to-digital (NO) conversion and digital to analog
`(DIA) conversion for various functions. including video.
`audio. modem functionality. and a telephone handset. among
`65 others. In one embodiment. the analog system chip only
`includes analog portions of the AID and D/A logic
`functionality. and the digital portion of the AID and 0/A
`
`3~
`
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`15
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`3
`4
`logic is comprised in the digital system chip. Th<: analog
`FlG. 8 is a block diagram of a computer system including
`system ch.ip funber includes vid.eo pons for coupling to a
`digital and analog system chips coupled to a PCI expansion
`bus according 10 an alternate em bodimem of lhe present
`video monitor. audio ports for coupling to an audio DAC or
`invention;
`speakers. a nd one or more communication pons for trans-
`ferring analog information. In one embodim~nt. the a n:'log s
`FIG. 9 illustrates the computer system of FIG. 8 including
`a plurality of digital and analog system chips. w~~ein the
`sys1em chlp includes one or more of a radio transcelVC~r.
`system inc ludes a bus comprised between the dig1tal and
`infrared ( IR) transceiver. analog mixer. and a NTSC
`analog system chips:
`(National Television Standards Co.mm.iuec) converter. The
`analog system cbip further includes analog inputs for receiv-
`FIG. 10 is a block diagram of the digital system chip of
`ing input fro m various peripherals. such as a microphone. 10 FIGS. 8 and 9 : and
`CD-ROM. stereo system and 1V tuner. among others.
`In an alternate embodiment. the digital system chip
`FlG. 11 is a block diagram of the analog syslem chip of
`couples to the PCI bus. The digital syste!ll chip ma_Y. be
`RGS. 8 and 9.
`DETAD...ED DESCR1PI10N OF THE
`comprised on the motherboard or. alternatively. the dig1tal
`cbip is comprised on a modular expansion card adapted ~or
`PREFERRED EMBODIMENT
`Incorporation by Reference
`in sen ion into a connector slot on the PCI bus. thus aiJowmg
`PCI System Architecture by Tom Shanley and Don Ander-
`for improved modularity and upgradeabllity. The analog
`system chip preferably couples directly to the digital sy stem
`son and available from Miodshare Press. 2202 Buttercup
`Dr .. Richardson. Tex. 75082 (214) 231-2216. is hereby
`chip. and the analog system chip couples to various
`. .
`20 incorporated by reference in its e ntirety.
`peripherals. including a monitor and speakers.
`The Intel Peripherals Handboo.k. 1994 and 1995 editions.
`In one embodiment. the computer system includes a
`separate intermediate bus coupled '?ttween .the digi~ sys-
`available from Intel Corporation. are hereby incorporated by
`reference in their entirety. AJso. data sheets on the Intel
`tern chip a.nd the analog system chip. In this embodiment.
`one or more digital system chips are coupled to the PCI bus.
`82430FX PClset chipset. also referred to as the Triton
`wherein the one or more digital system chips connect to the 25 chipsel. are hereby incorporated by reference in thei.r
`entirety. including the 82430 Cacbe MelDOI)' Subsystem
`intermediate bus. One or more analog system chips are also
`coupled to the intermediate bus. This configuration allows
`data sheet ( Order No. 290482-004 ). the 82420182430 PClset
`for improved modulari1y and upgradeability. This configu-
`ISA and ElSA bridge data sheet (0£der No. 290483-004).
`ration also aiJows communication betweea each of the
`and me Intel 82430FX PClset Product Brief (Orda" NQ.
`digital system chips and analog system chips. as well as 30 297559-001). all of which are available from Intel
`communication between the respective digital syslem chips
`C01p0ration. Lilerature Sales. P.O. B ox 7641. Mt. Prospect.
`Til. 6005~7641 (1-800.879-4683). and a11 of which are
`and communication between the respective analog system
`chips.
`hereby incorporated by reference in their entirety.
`u.s. Pat. No. 4.994.801 titled "Apparatus Adaptable foe
`Therefoce. the present invention comprises a novel com-
`puter system. architecrure whi~ incr~e~ the perfo~n~ 35 Use in Effe<:tiog Communication B etween an Analog Device
`of real-time applications. A dedicated digital system chip 15
`and a Digital Device". which was filed on Oct. 30. 1989. and
`which issued Feb. 19. 1991. whose inventors are Sat Asghar.
`induded in the system which perfonns various digital mul-
`John Bartkowiak. and Mi.ki Moyal. and which is assigned to
`timedia and communication operations. and an analog sys-
`Advanced Micro Devices Corporation. is hereby incorpo-
`tern chip is coupled d.lcectly to the digital system chip which
`performs various corresponding analog functi~ns: This -~pa- 40 rated by reference in its entirety.
`Computer System Block Diagram
`ration of digital and analog functionality optliillzes silicon
`Referring now to FIG. 1. a block diagram of a computer
`use and reduces noise issues while also providing improved
`system according to the present invention is shown . . As
`perfonnance.
`BRIEF DESCRIPTION OF TilE DRAWINGS
`shown. the computer system iocil.udes a central process10g
`45 unit (CPU) 1tl which is coupled through a CPU 1~ bus
`to a host/PCI/cache hridge or chipset 106. The chipset
`A better understanding of the present invention can be
`obt4lned when the following detailed desaiption of the
`includes arbitration Iogie 101 as shown. The chipset le6 is
`preferably similar to me Triton cbipset ava.i.lable from Intel
`preferred embodiment is considered in conjunction with the
`Corporation. A second level or l..l cache mem<ry (not
`following drawings. in which:
`FlG. 1 is a block diagram of a computer system including so shown) may be coupled to a cache controller in the chipset.
`a digital system chip and an analog system. chip ~cording to
`as desired. The bridge or chipset IH couples lhrough a
`memory bus 108 to main memocy ut. The main memory
`the preferred embodiment of the present mventiOn;
`FlG. 2 i s a block diagram of the digital system chip of
`110 is preferably DRAM (dynamic random access memory)
`or EDO (o:teoded data out) memory. as desired.
`FIG. 1;
`FIG. 3 is a block diagram of an alternate embodiment of s.s
`The bostiPCllcadle bridge oc chipset 1H also intetfaces
`the digital system chip of FlO. 1 according to the present
`to a peripheral component intecconnect (PCI) bus 12t. In the
`,... -~.--:r.>referred embodiment. a PCI local bus is used. However. it
`invention;
`FIG. 4 is a block diagram of the analog sys~ cbip w
`~s noted that other local buses may be used. such as the
`A (Video Electronics Standards Association) VI.. bus.
`FIG. 1:
`FIG. S is a block diagram of a computer system IDd
`til.) Various types of devices may be connected to the PCI bus
`_ Ut.
`a digital system chip and an analog chip accor
`In the embodiment shown in FIG. 1. a digital system chip
`alternate embodiment of the present Jnventlon;
`FlG. ~ is a block diagram of the digital system ch.ip of
`112 according to the present invention is coupled to the
`chipset 106. The digital system cbip ~12fperf~rms v:ous
`flG. 5;
`FIG. 7 is a block diagram of a computer system including 6S digital functions. including multimedia unctwns su . . as
`a digital system chip and an analog chip according to a third
`video and audio. as discussed further below. The dlgJtal
`system cbip 112 includes a Universal Serial Bus (USB)
`embodiment of the present invention;
`
`Page 14 of 20
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`5.797.028
`
`embodiment. the DSP engine * is a dedicated communi·
`
`6
`5
`also prefer ably includes one or more input/output (I/0)
`interface as weU as a paraUeUserial port interface. The
`channels for lransmining data to the analog system cttip 114
`digital system chip 112 also pre ferably includes an ISDN
`and to the chipset logic 106.
`(Integrated Services Digital Network) interface. The digital
`In the preferred embodiment shown in FIG. 2. the digital
`system chip 112 also preferably couples to floppy drive 141.
`Various other devices may be coupled to the digital system s system chip 112 includes a video/graphics engine 2t2 which
`chip 112. such as a hard drive or other digital devices. The
`performs video and graphics operations such as polygon
`digital system chip 112 p referably only comprises digital
`reodedng. texture mapping. and other pixel manipulation
`operations. among others. The video/graphics engine 202
`circuitry.
`The digital system chip 112 preferably communicates
`performs operations similar to currently available graphics
`with devices on the PCI bus 120 through the dlipset 106. In 10 accelerator s from companies such as S3. Tseng . Weitek. and
`one embodiment. the digital system chip 112 includes a PCJ
`others. The digital system chip 112 may also include a
`interface for coupling directly to the PCI bus Ut. In this
`dedicated MPEG (Motion Pictures Electronics Group)
`embodime nt. the digital system chip 112 can arbitrate for the
`decoder (not shown).
`PCI bus a.od can communicate directly with devices on the
`The digital system chip 112 also includes an audio engine
`PCI bus with less involvement of tbe chipset logic 166. The IS 2t4 which performs digital audio processing operations such
`digital system chip 112 is also preferably coupled to other
`as MIDI and wavetable synthesis. among others. the a udio
`devices in the computer system to perform power manage-
`engine 204 performs operations similar to currently avail-
`ment functions. as well as other functions. a s desired.
`able sound cards such as SoundBlaster or SoundBiaster-
`An analog system chip 114 is coupled to the digital system
`compatible cards.
`chip 112. The analog system chip 114 performs various 20
`The digital system chip 112 also preferably includes a
`general purpose DSP engine 2t6 which is programmable to
`analog f unctions. including analog to digital (AID)
`conversio n. digital to analog (0/A) conversion. and modem
`perform various functions. suCh as MPEG decoding. LZ
`functionality. among others. The analog system chip 114 is
`compressio n. and other advanced video. audio. and/or com-
`munications functions. A read only memory (ROM) 207 is
`coupled to provide outputs co various analog devices.
`including a video monitor 13Z and speakers 134. The analog 2' preferably coupled to the DSP Engine 206 which stores
`system chip 114 also includes an analog modem output 136
`instructions for use by the DSP Engine 206. Alternatively. a
`for coupling to a telephone line. The analog system chip 114
`non-volatile RAM or SRAM is used which receives d own-
`loadable instructions from the main memory 110. In one
`also couples to various devices to receive various analog
`inputs. including a microphone 14l.. a CD-ROM 144. aud a
`TV tuner 146. It is noted that only the analog output of the 30 cation engine which performs digital communication
`CD-ROM is provided to the analog system chip 114. The
`operations. sud! as ISDN operations and/or telephony
`operations. ln another embodiment. the digital system chip
`aoalog system chip 114 preferably substantially comprises
`analog circuitry. and preferably only includes digital "front-
`112 includes a dedicated communication engine (not sh own)
`end" circuitry for interfacing 10 the digital system chip 112.
`in additio n to the general purpose DSP engine 206. and the
`Various devices may be coupled to the PCI bus llt. Far 3S dedicated communication engine perlorms ISDN and/or
`example. a hard disk W and a network interface controller
`telephony operations.
`124 are shown coupled to the PCI bus rn. A SCSI (small
`1n one embodiment. the digital system chip 112 includes
`computer systems interface) adapter (not shown) may also
`multimedia memory (not shown) for storing multimedia
`be coupled to the PCI bus 120. In one embodiment. the
`data. such as video data and audio data The multimedia
`digital system chip 112 includes a hard disk interface for 40 memory corresponds to video RAM (VRAM) found on
`coupling to a hard disk and a SCSI interface for coupling to
`current video accelerator cards. and is also used for storing
`SCSI devices. In addition. the digital system chip U2 may
`audio data as well as other multimedia and communications
`also include network interfaa circuitry such as Ethernet or
`data. The multimedia memory preferably comprises VRAM.
`token rini circuitry for interlacing to a network. However. in
`DRAM (dynamic RAM). SRAM (static RAM). or EDO
`the prefeaed embodiment. the digital system chip 112 does 4S (extended data out) RAM. as desired. Alteroative.ly. the
`not include networt: circuitry. but rather network functions
`multimedia memory is located off-chip and is coupled
`are pelformed by a modular network card coupled to the PCI
`directly to the digital system chip 112.
`1n one embodiment. the digital system chip 112 does not
`bus 12t. Various other devices may be connected to the PCI
`include multimedia memory. but rather video da1a a.od audio
`bus 12t. as is weU known in the art.
`Expansion bus bridge logic (not shown) is also preferably so data are stored in the system memory 110 according to a
`unified memory architecture. Io this embodiment. the digital
`coupled to the PCI bus 121. The expansion bus briclge logic
`interfaces to an expansion bus (not shown). The expansion
`system chip 112 preferably includes a memory buffer 234
`bus may be any of varying types. including the industry
`and a direct memory access ( DMA) engine 236 fOI' trans·
`standard architecture {ISA) bus. also referred to as the Kr
`ferring data from the maio memory 110 to the memory
`bus. the extended industry standard architecture (EISA) bus. s.s buffer 234 in the digital system chip 112.
`In one embodiment. the video engine 202 and audio
`or the microchannel architecture (MCA) bus. Various
`engine 214 couple through one or more 110 cbanoels to
`devices may be coupled to the expansion bus. such as
`expansi on bus memory (not shown).
`respective digital I/0 ports 232. including video and audio
`ports. The digital video port is included for providing digital
`Digital System Chip Block Diagram
`Referring now to FIG. 2. a moce detailed block diagram 60 video data to peripheral devices. such as an MPEG d ecoder
`or a digital video display. The digital audio port is included
`illustrating the digital system chip 112 is shown. The digital
`system chip 112 includes a connector 201 for connecting to
`for providing digital audio data to digital peripheral devic-e~.
`such as for external mixing. as desired. In an embodiment
`analog system chip 114. and also includes a connector 203
`for coupling to the chipset logic 106. Although not shown in
`which includes a dedicated communication engine. the
`AG. 2. the various devices in the digital system chip 112 are 6S digital system chip 112 preferably includes one or more
`interconnected through respective data channels or signal
`digital communication ports 232 for coupling to an ISDN
`traces t'o form a functional unit. The digital system chip 112
`line or other digital line.
`
`Page 15 of 20
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`7
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`store microcode corresponding to video. audio and commu-
`As shown. the digital sys(em chip 112 also preferably
`nication processing instructions. or receive downloadable
`includes A USB (Universal Serial Bus) int~rface 222 for
`interfacing to a Universal Serial Bus. The Universal Serial
`microcode from the system memory 110.
`Bus is a bus specificatioo proposed by Microsoft and Intel
`Analog System Otip
`Referring now to AG. 4. the analog system chip 114 is
`which is designed to replace the varioLJs peripheral connec-
`shown. Ill the preferred embodiment shown in H Ct. 4. the
`tors on current PCs with a single connector for most
`analog system chip 114 includes analog to digital (NO)
`peripherals. such as keyboard:.. mice. monitors. and other
`circuitry 4tl and digital to analog (D/ A) circuitry 4t4. The
`devices. The digital system chip 112 also preferably includes
`analog system chip 114 preferably indudes AID a.od D/A
`serial/parallel port interface logic 224 for providing. a serial
`port and a parallel port. The serial/parallel port interface 10 logic for video. audio. modem and telephone handset tunc-
`logic 2Z4 preferably implements a universal asynchronous
`tionality. In the preferred embodiment. the analog system
`chip 114 include a single ND converter and a single D/A
`receiver/traosminer (UART). The digital system chip 112
`also preferably i ncludes a floppy controller interface 226 for
`converter for aU of the above functions. Alternatively. the
`AID circuitry block 401 and the D/A circuitry block 484
`interfaci.llg to fioppy drive 141. The digital system chip 112
`may indude other functions. including EIDE support and 15 each include a plurality of ND c onverters and a plurality of
`SCSI support.
`0/A converters. respectively. for each of the above func-
`ln the preferred embod.Jrneot. the digital system chip 112
`lions.
`includes video processing circuitry and/or firmware com-
`In one embodiment. lhe analog system chip 114 includes
`JXised in the video engine 2t2. including the digital portion
`only the analog circuitry porti