UNITED STATES PATENT AND TRADEMARK OFFICE
`____________
`
`BEFORE THE PATENT TRIAL AND APPEAL BOARD
`____________
`
`ASUSTEK COMPUTER, INC. and ASUS COMPUTER INTERNATIONAL,
`Petitioners
`
`v.
`
`AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.,
`Patent Owner
`____________
`
`Case: IPR2016-00646
`U.S. Patent No. 5,870,087
`____________
`
`PETITION FOR INTER PARTES REVIEW
`UNDER 35 U.S.C. § 312 AND 37 C.F.R. § 42.104
`
`Mail Stop PATENT BOARD
`Patent Trial and Appeal Board
`US Patent and Trademark Office
`PO Box 1450
`Alexandria, Virginia 22313-1450
`
`
`____________
`
`BEFORE THE PATENT TRIAL AND APPEAL BOARD
`____________
`
`ASUSTEK COMPUTER, INC. and ASUS COMPUTER INTERNATIONAL,
`Petitioners
`
`v.
`
`AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.,
`Patent Owner
`____________
`
`Case: IPR2016-00646
`U.S. Patent No. 5,870,087
`____________
`
`PETITION FOR INTER PARTES REVIEW
`UNDER 35 U.S.C. § 312 AND 37 C.F.R. § 42.104
`
`Mail Stop PATENT BOARD
`Patent Trial and Appeal Board
`US Patent and Trademark Office
`PO Box 1450
`Alexandria, Virginia 22313-1450
`
`
`
`TABLE OF CONTENTS
`REAL PARTY IN INTEREST UNDER 37 C.F.R. § 42.8(b)(1).................... 1
`I.
`II. GROUNDS FOR STANDING UNDER 37 C.F.R. § 42.104(a)..................... 1
`III.
`IDENTIFICATION OF RELATED MATTERS UNDER 37
`C.F.R. § 42.8(b)(2) ...................................................................................... 1
`IV. DESIGNATION OF COUNSEL UNDER 37 C.F.R. §§
`42.8(b)(3) and 42.10(a)-(b) .......................................................................... 1
`V. SERVICE INFORMATION UNDER 37 C.F.R. § 42.8(b)(4)........................ 2
`VI. OVERVIEW OF CHALLENGES AND RELIEF REQUESTED .................. 2
`VII. BACKGROUND ........................................................................................... 3
`a.
`Overview Of The 087 Patent.............................................................. 3
`b.
`Prosecution History Of The 087 Patent.............................................. 4
`c.
`State of the Art at the Time of the Invention ...................................... 4
`d.
`Overview of the References Relied Upon .......................................... 7
`VIII.CLAIM CONSTRUCTION........................................................................... 8
`a.
`“memory” / “first unified memory” ................................................... 9
`b.
`“demultiplexing one or more multimedia data streams” /
`“demultiplexes one or more multimedia data streams” .................... 10
`IX. HOW THE CHALLENGED CLAIMS ARE UNPATENTABLE ............... 11
`a.
`Count 1: Claims 1, 5, 10, 11, and 16 are unpatentable
`under 35 U.S.C. § 102(e) over Lam. ................................................ 12
`Independent Claims 1, 10, 16...................................................... 12
`
`i.
`
`ii. Dependent Claims 5 and 11 ........................................................ 19
`
`b.
`
`Count 2: Claims 1, 7, 10, 11, and 16 are unpatentable
`under 35 U.S.C. § 102(e) over Fujii. ................................................ 21
`
`i
`
`
`
`i.
`
`Independent Claims 1, 10, and 16............................................... 21
`
`ii. Dependent Claims 7 and 11 ........................................................ 29
`
`c.
`
`Count 3: Claims 1, 5, 7-11, and 16 are unpatentable
`under 35 U.S.C. § 103(a) over Fujii in View of Lam. ...................... 32
`Independent Claims 1, 10, and 16............................................... 32
`
`i.
`
`ii. Dependent Claims 5, 7, 8, 9, and 11 ........................................... 38
`
`d.
`
`e.
`
`f.
`
`Count 4: Claims 7, 8, and 9 are unpatentable under 35
`U.S.C. § 103(a) over Lam in View of Cloutier................................. 44
`Count 5: Claims 7, 8, and 9 are unpatentable under 35
`U.S.C. § 103(a) over Fujii in View of Cloutier. ............................... 49
`Count 6: Claims 7, 8, and 9 are unpatentable under 35
`U.S.C. § 103(a) over Fujii in View of Lam in Further
`View of Cloutier. ............................................................................. 53
`Motivation to Combine (Counts 3-6) ............................................... 55
`g.
`The Grounds Are Not Redundant..................................................... 56
`h.
`Summary Chart................................................................................ 57
`i.
`X. CONCLUSION ........................................................................................... 60
`
`ii
`
`
`
`TABLE OF AUTHORITIES
`
`Page(s)
`
`CASES
`KSR Int’l v. Teleflex Inc.,
`550 U.S. 398 (2007)...........................................................................................7
`In re Larson,
`340 F.2d 965 (CCPA 1965) ...............................................................................7
`STATUTES
`Pre-AIA 35 U.S.C. § 102(e)...........................................................................passim
`Pre-AIA 35 U.S.C. § 103(a)...........................................................................passim
`OTHER AUTHORITIES
`37 C.F.R § 42.8(b)(1)-(4).................................................................................... 1-2
`37 C.F.R § 42.10(a)-(b)....................................................................................... 1-2
`37 C.F.R. § 42.22(a)(1)...........................................................................................2
`37 C.F.R. § 42.100(b) ............................................................................................................... 8
`37 C.F.R. § 42.104(a),(b)(1)–(2)......................................................................... 1-2
`
`iii
`
`
`
`LIST OF EXHIBITS
`
`Exhibit
`
`Description
`
`1001
`
`1002
`
`1003
`
`1004
`
`1005
`
`1006
`
`1007
`
`U.S. Patent No. 5,870,087 (“the 087 patent”)
`
`Prosecution History of U.S. Patent No. 5,870,087
`
`Declaration of Richard Kramer (“Kramer Decl.”)
`
`U.S. Patent No. 5,960,464 (“Lam”)
`
`U.S. Patent No. 5,898,695 (“Fujii”)
`
`U.S. Patent No. 5,847,771 (“Cloutier”)
`
`ITU-T Recommendation H.222.0, approved July 10, 1995,
`
`available at http://www.itu.int/rec/T-REC-H.222.0-199507-S/en
`
`(“07/95 H.222.0”)
`
`1008
`
`Excerpts from Academic Press Dictionary of Science and
`
`Technology (Academic Press, Inc., 1992)
`
`1009
`
`Excerpts from Jack, Keith, Video Demystified, Second Edition,
`
`1996
`
`1010
`
`VESA Unified Memory Architecture (VUMA) Standard
`
`Hardware Specification, Version 1.0, March 8, 1996
`
`1011
`
`Datasheet for Samsung KM416S1120AT
`
`iv
`
`
`
`1012
`
`Excerpts from August 12, 2015 Joint Claim Construction
`
`Statement, Avago Technologies General IP (Singapore) PTE
`
`Ltd. v. ASUSTeK Computer, Inc. et al., Case No. 2:15-cv-00239,
`
`Dkt. 46 (E.D. Tex., prior to transfer to N.D. Cal.)
`
`1013
`
`Excerpts from February 5, 2016 Joint Claim Construction and
`
`Prehearing Statement, Avago Technologies General IP
`
`(Singapore) PTE Ltd. v. ASUSTeK Computer, Inc. et al., Case
`
`No. 3:15-cv-04525, Dkt. 170 (N.D. Cal., transferred from E.D.
`
`Tex.)
`
`v
`
`
`
`I.
`
`REAL PARTY IN INTEREST UNDER 37 C.F.R. § 42.8(b)(1)
`
`The real parties in interest for Petitioners are ASUSTeK Computer, Inc. and
`
`ASUS Computer International.
`
`II. GROUNDS FOR STANDING UNDER 37 C.F.R. § 42.104(a)
`
`Petitioners certify that U.S. Patent No. 5,870,087 (“the 087 patent”) is
`
`available for inter partes review (“IPR”) and that Petitioners are not barred or
`
`estopped from requesting an IPR challenging Claims 1, 5, 7-11, and 16 (“the
`
`Challenged Claims”) on the grounds identified herein.
`
`III.
`
`IDENTIFICATION OF RELATED MATTERS UNDER 37 C.F.R.
`§ 42.8(b)(2)
`The 087 patent is at issue in the following cases: Avago Technologies General
`
`IP (Singapore) PTE Ltd. v. ASUSTeK Computer, Inc. et al., Case Nos. 3:15-cv-
`
`04525 (N.D. Cal., transferred from E.D. Tex) and 3:16-cv-00451 (N.D. Cal.). The
`
`087 patent
`
`is also asserted against entities unrelated to Petitioners in Avago
`
`Technologies General IP (Singapore) PTE Ltd. v. Acer Inc., et al., Case No. 3:15-
`
`cv-05427 (N.D. Cal.).
`
`IV. DESIGNATION OF COUNSEL UNDER 37 C.F.R. §§ 42.8(b)(3) and
`42.10(a)-(b)
`Lead counsel is Scott Stevens (Reg. No. 54,762) and backup counsel Derek
`
`Neilson (Reg. No. 65,447), all of Alston & Bird LLP. Lead counsel is located at 101
`
`South Tryon Street, Suite 4000, Charlotte, NC 28280; 704-444-1025. Pursuant to 37
`
`- 1 -
`
`
`
`C.F.R § 42.10(b), Powers of Attorney are being submitted with this Petition.
`
`V.
`
`SERVICE INFORMATION UNDER 37 C.F.R. § 42.8(b)(4)
`
`Petitioners consent to electronic service directed to scott.stevens@alston.com
`
`and derek.neilson@alston.com.
`
`VI. OVERVIEW OF CHALLENGES AND RELIEF REQUESTED
`
`Pursuant
`
`to Rules 42.22(a)(1) and 42.104(b)(1)–(2), Petitioners request
`
`cancellation of Claims 1, 5, 7-11, and 16 in the 087 patent.
`
`Count 1: Claims 1, 5, 10, 11, and 16 are unpatentable under 35 U.S.C. §
`
`102(e)1 over Lam.
`
`Count 2: Claims 1, 7, 10, 11, and 16 are unpatentable under 35 U.S.C. §
`
`102(e) over Fujii.
`
`Count 3: Claims 1, 5, 7, 8, 9, 10, 11, and 16 are unpatentable under 35 U.S.C.
`
`§ 103(a) over Fujii in view of Lam.
`
`Count 4: Claims 7, 8, and 9 are unpatentable under 35 U.S.C. § 103(a) over
`
`Lam in view of Cloutier.
`
`Count 5: Claims 7, 8, and 9 are unpatentable under 35 U.S.C. § 103(a) over
`
`Fujii in view of Cloutier.
`
`1 The 087 patent was filed and issued before the American Invents Act (“AIA”), so
`
`all references in this Petition are to pre-AIA-35 U.S.C. §§ 102, 103, 112, et seq.
`
`- 2 -
`
`
`
`Count 6: Claims 7, 8, and 9 are unpatentable under 35 U.S.C. § 103(a) over
`
`Fujii in view of Lam in further view of Cloutier.
`
`This Petition relies upon the following prior art: U.S. Patent No. 5,960,464 to
`
`Christopher S. Lam (“Lam”) filed August 23, 1996 and issued on September 28,
`
`1999, Ex. 1004; U.S. Patent No. 5,898,695 to Yukio Fujii et al. (“Fujii”) filed March
`
`27, 1996, and issued on April 27, 1999, Ex. 1005; U.S. Patent No. 5,847,771 to
`
`Cloutier (“Cloutier”) filed August 14, 1996, and issued on December 8, 1998, Ex.
`
`1006. These patents were filed before the 087 patent’s earliest-recited priority date
`
`of November 13, 1996, and are available as 35 U.S.C. § 102(e) prior art. These
`
`references were not cited during the prosecution of the 087 patent.
`
`VII. BACKGROUND
`
`a. Overview Of The 087 Patent
`
`The claims of the 087 patent are generally directed to “an MPEG decoder
`
`system which includes a single unified memory for MPEG transport, decode and
`
`system controller functions.” 087 patent, 1:30-34 (emphasis added). The 087 patent
`
`admits that the MPEG transport, decode and system controller functions were known
`
`in the art.
`
`087 patent, 4:14-43 (“A typical MPEG decoder includes motion
`
`compensation logic . . . . An MPEG decoder system also typically includes transport
`
`logic . . . . An MPEG decoder system also typically includes a system controller . . .
`
`.”). However, the 087 patent purports to “require[] only a single memory, and thus
`- 3 -
`
`
`
`has reduced memory requirements compared to prior art designs.” 087 patent, 5:7-
`
`10 (emphasis added). Figure 3 of the 087 patent is a block diagram with “a unified
`
`memory for MPEG transport, system controller, and decode functions according to
`
`the present invention.” 087 patent, 5:55-58, Fig. 3.
`
`b. Prosecution History Of The 087 Patent
`
`The 087 Patent was allowed based on references that are not the subject of the
`
`current Petition. The application that became the 087 patent was filed on November
`
`13, 1996.
`
`In the first Office Action mailed May 11, 1998, all claims were allowed
`
`but claim 12, which was rejected because certain terms lacked antecedent basis.
`
`Applicant responded by amending claims 1 (“MPEG decoder [logic],” “[external]
`
`memory”), claim 10 (“the method comprising”), claim 12 (“method of claim [10]
`
`11”) and claim 16 (“video decoder [logic],” “[external] memory”). Following this
`
`amendment, all claims were allowed. See Ex. 1002.
`
`c. State of the Art at the Time of the Invention
`
`At the time the application for the 087 patent was filed, MPEG decoder
`
`systems and the transport, decode, and system control functions were well known in
`
`the art. For example, the 087 patent incorporates the MPEG-2 standard by reference,
`
`and the ITU-T Recommendation H.222.0 version of MPEG-2 (approved July 10,
`
`1995), described transport and decode functions.
`
`’087 patent, 1:9-10; Ex. 1007;
`
`Kramer Decl. at ¶¶ 31-33. The use of a system controller by an MPEG decoder
`- 4 -
`
`
`
`system was also well known at the time, as cable TV set-top boxes and PC video
`
`decoders were commonplace. Kramer Decl. at ¶ 34. In addition, memory buffers
`
`were well known and widely used in MPEG decoder systems and discussed in
`
`H.222.0. Ex. 1007; Kramer Decl. at ¶ 35.
`
`The state of art discussed above is confirmed by the “MPEG Background”
`
`section of the 087 patent. See 087 patent, 2:22-4:63. Although this disclosure is not
`
`relied on as prior art for purposes of this petition, the 087 patent’s own teachings
`
`demonstrate that any purported novelty is limited to the concept of a single memory,
`
`not to any other claimed portions of a video or MPEG decoder. For example, the
`
`“MPEG Background” includes at least the following primary elements in claim 1
`
`(which is substantially similar to claims 10 and 16):
`
`Claim 1 elements
`
`087 “MPEG Background”
`
`“a channel receiver for receiving
`
`“When an MPEG decoder
`
`and MPEG encoded stream;”
`
`receives an encoded stream . . . .”
`
`3:60-61
`
`“transport logic coupled to the
`
`“An MPEG decoder system also
`
`channel receiver which demultiplexes
`
`typically includes transport logic
`
`one or more multimedia data streams
`
`which operates to demultiplex
`
`from the encoded stream;”
`
`received data into a plurality of
`
`- 5 -
`
`
`
`Claim 1 elements
`
`087 “MPEG Background”
`
`individual multimedia streams.”
`
`4:22-24
`
`“a system controller coupled to the
`
`“An MPEG decoder system also
`
`transport logic which controls
`
`generally includes a system
`
`operations within the MPEG decoder
`
`controller which controls
`
`system;”
`
`operations in the system and
`
`executes programs or applets.”
`
`4:24-27
`
`“an MPEG decoder coupled to
`
`“The MPEG decoder accesses the
`
`receive one or more multimedia data
`
`reference frames or anchor frames
`
`streams output from the transport
`
`stored in the external memory in
`
`logic, wherein the MPEG decoder
`
`order to reconstruct temporally
`
`operates to perform MPEG decoding
`
`compressed frames.” 4:15-21
`
`on the multimedia data streams; and”
`
`Further, the “MPEG Background” discloses that each of the transport logic,
`
`system controller, and MPEG decoder are known by those of skill in the art to use
`
`memory, just not a single memory. See 087 patent, 4:33-35 (“Prior art MPEG video
`
`decoder systems have also generally included a separate memory for the transport
`
`- 6 -
`
`
`
`and system controller functions.”), 4:14-15 (“A typical MPEG decoder includes
`
`motion compensation logic which includes local or on-chip memory.”).
`
`The elements of dependent claim 5 (anchor frame data) and claim 11, other
`
`than the use of a single or unified memory, were also disclosed in the “MPEG
`
`Background.” Further, dependent claims 7-9 recite the use of specific buffers or
`
`portions in the memory, but the 087 patent provides no disclosure regarding their
`
`function or operation. See 087 patent, 15:32-45, Fig. 9; Kramer Decl. at ¶ 39. By
`
`failing to meaningfully describe these buffers, the 087 patent implicitly admits that
`
`the elements of claims 7-9 were also well known in the art. Kramer Decl. at ¶ 40.
`
`Therefore, the only purported novelty in the 087 Patent is the bare recitation
`
`of using a “single memory” to perform conventional MPEG decoding functions, but
`
`the idea of using a single memory to perform these well-known functions is obvious.
`
`Kramer Decl. at ¶ 41; See also In re Larson, 340 F.2d 965, 968 (CCPA 1965) (“[T]he
`
`use of a one piece construction instead of the structure disclosed in [the prior art]
`
`would be merely a matter of obvious engineering choice.”); KSR Int’l v. Teleflex
`
`Inc., 550 U.S. 398 (2007).
`
`d. Overview of the References Relied Upon
`
`This petition relies on three prior art references: Lam, Fujii, and Cloutier. All
`
`three references describe MPEG decoder systems, including the transport, decode,
`
`and system controller functions, that consolidate memory and other components.
`- 7 -
`
`
`
`Lam, for example, describes an MPEG decoder system that decodes
`
`multiplexed multimedia data received from a DVD using a single memory – the
`
`main memory of the computer. See Lam, 6:59-62 (“While prior MPEG 2 decoding
`
`circuits employed dedicated memory, the present invention shares the main memory
`
`108 with the computer 102.”). Similarly, Fujii discloses an MPEG decoder system
`
`that decodes multiplexed multimedia data received from a broadcast station by
`
`consolidating memory components into a single RAM. See Fujii, 11:1-5 (“[T]he
`
`packet landing buffer is provided in RAM used by the microprocessor for the system
`
`control. Therefore, data can be supplied to the decoders without increasing the
`
`number of components and the cost thereof.”). Finally, Cloutier describes an MPEG
`
`decoder system that receives and decodes primary and secondary (e.g., picture-in-
`
`picture) multiplexed multimedia data and describes how buffers can be arranged in
`
`the memory. See Cloutier, 11:47-49 (“The memory 80b acts as a buffer and stores
`
`at least the compressed and decompressed video data.”). See also Kramer Decl. at
`
`¶¶ 54-56.
`
`VIII. CLAIM CONSTRUCTION
`
`In an IPR, claim terms in an unexpired patent are interpreted according to their
`
`broadest reasonable interpretation (“BRI”) in view of the specification in which they
`
`appear. 37 C.F.R. § 42.100(b). Thus, as required by the applicable rules, the
`
`proposed constructions in this Petition use the BRI standard. Petitioners reserve all
`
`- 8 -
`
`
`
`rights to take a different position with respect to claim construction in any other
`
`proceeding that does not rely on BRI. See, e.g., Exs. 1012-1013.
`
`The constructions below are from the standpoint of a POSA. Specifically, a
`
`POSA would have a (i) a B.S. degree in Electrical Engineering or equivalent
`
`training, and (ii) approximately two to five years of direct experience in developing
`
`processor systems involving memory architectures. Kramer Decl. at ¶ 19.
`
`a. “memory” / “first unified memory”
`The term “memory” appears in the body of challenged claims 1, 5, 7-9, and
`
`16, and the term “first unified memory” appears in challenged claims 10 and 11.
`
`The 087 patent repeatedly refers to a “single memory” (also called a “unified
`
`memory” or “single unified memory”) for transport, system control, and decode
`
`functions. 087 patent, Title (“Unified Memory”), Abstract (“unified memory for
`
`multiple functions”), 1:31-34 (“single unified memory for MPEG transport, decode
`
`and system controller functions”), 5:7-10 (“single memory”). The use of a single
`
`memory for multiple functions purportedly distinguishes the prior art. 087 patent,
`
`11:21-24 (“[P]rior art MPEG decoder systems include different memory systems for
`
`the transport and system controller logic 204 and the MPEG decoder logic 224.”);
`
`5:7-10 (“The present invention thus requires only a single memory, and thus has
`
`reduced memory requirements compared to prior art designs.”).
`
`As shown in 087 patent Figure 3, “the MPEG A/V decoder 224 uses the same
`
`- 9 -
`
`
`
`memory 212 as the transport and system controller blocks.” 087 patent, 9:12-14.
`
`The memory 212 is disclosed in the preferred embodiment to be a 1Mx16 SDRAM,
`
`“such as Samsung KM416S1120AT-12,” which is a single memory chip. 087
`
`patent, 12:57-63; Ex. 1011; Kramer Decl. at ¶ 47.
`
`The preambles to each of the three independent claims (claims 1, 10, and 16)
`
`recite the proposed construction of the terms “memory” and “first unified memory”
`
`that are in the body of the claims. The language in the preamble provides the
`
`broadest reasonable interpretation of the memory terms because it is consistent with
`
`the use of the “memory”/“first unified memory” within the claims and the
`
`specification’s stated distinction over the prior art. Kramer Decl. at ¶ 48.
`
`Accordingly, the person of ordinary skill in the art (“POSA”) would have
`
`construed “memory” and “first unified memory” to be “a single memory for use by
`
`transport, decode, and system controller functions.” Kramer Decl. at ¶¶ 44-49.
`
`b. “demultiplexing one or more multimedia data streams” /
`“demultiplexes one or more multimedia data streams”
`The term “demultiplexing one or more multimedia data streams” appears in
`
`challenged claim 10, and the term “demultiplexes one or more multimedia data
`
`streams” appears in challenged claims 1 and 16.
`
`Claims 1 and 10 require “receiving [an] MPEG encoded stream” and claim 16
`
`requires “receiving an encoded video stream.”
`
`The claims then require
`
`- 10 -
`
`
`
`demultiplexing the stream, which would mean to a POSA that the stream is received
`
`in a multiplexed form. A POSA would also understand demultiplexing to require
`
`separating the stream. Ex. 1008 (defining “demultiplexer” as “a device that is
`
`designed to separate signals previously combined by a multiplexer and transmitted
`
`over a single channel.”); Kramer Decl. at ¶¶ 51-52.
`
`Accordingly, a POSA would have construed “demultiplexing one or more
`
`multimedia data streams” and “demultiplexing one or more multimedia data
`
`streams” to be “separate the multiplexed encoded stream into one or more individual
`
`streams.” Kramer Decl. at ¶¶ 50-53.
`
`IX. HOW THE CHALLENGED CLAIMS ARE UNPATENTABLE
`
`Petitioners assert each of the challenged claims is unpatentable under 35
`
`U.S.C. §§ 102(e) or 103(a). Each of the arguments below is made from the
`
`standpoint of a POSA in the field of the 087 patent. See Section VIII.
`
`Given the structure of the claims, claim recitations have been grouped with
`
`similar corresponding recitations for the purposes of addressing each rejection. See
`
`Kramer Decl. at ¶ 57. For example, claim recitations [1.1], [10.1], and [16.1] have
`
`been grouped as they deal with receiving an encoded stream. In addition, “MPEG
`
`decoding” in claims 1, 5, and 7-11 is a specific form of “video decoding” in claim
`
`16. Therefore, the same analysis applies to both “MPEG decoding” and “video
`
`decoding,” and claim 16 is invalid for the same reasons discussed with respect to
`
`- 11 -
`
`
`
`claim 1. Kramer Decl. at ¶ 28.
`
`a. Count 1: Claims 1, 5, 10, 11, and 16 are unpatentable under 35
`U.S.C. § 102(e) over Lam.
`i. Independent Claims 1, 10, 16
`
`Claim 1: [1-pre] An MPEG decoder system which includes a single memory for
`use by transport, decode and system controller functions, comprising;
`Claim 10: [10-pre] A method for performing video decoding in an MPEG
`decoder system which includes a single memory for use by transport, decode and
`system controller functions, the method comprising;
`Claim 16: [16-pre] A video decoder system which includes a single memory for
`use by transport, decode and system controller functions, comprising;
`To the extent the preamble is a limitation, Lam discloses an MPEG decoder
`
`system that “avoid[s] the need for additional memory to be used with the MPEG 2
`
`decoder 114” by “shar[ing] the main memory 106 with the computer system 100.”
`
`Lam, 9:3-6; Kramer Decl. at ¶¶ 61-64. The “main memory 106” shown in Figure 1
`
`is a single memory for use by the transport (blocks 158/159), decode (blocks
`
`160/162), and system controller (CPU/block 152) functions depicted in Figure 3.
`
`Lam, 6:59-62, 3:8-48; Kramer Decl. at ¶¶ 62-64.
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`
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`Lam, Fig. 1, Fig. 3. The transport, decode, and system controller functions are
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`discussed in further detail with respect to the body of the claims below.
`
`Claim 1: [1.1] a channel receiver for receiving and MPEG encoded stream;
`Claim 10: [10.1] receiving an MPEG encoded stream;
`Claim 16: [16.1] a channel receiver for receiving an encoded video stream;
`Lam discloses that the “DVD driver 156” shown in Lam Fig. 3 is a channel
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`receiver for receiving an MPEG encoded stream from a DVD. Lam, Fig. 3; Kramer
`
`Decl. at ¶ 65. Lam discloses that “[t]he DVD driver 156 . . . reads the appropriate
`
`information from the DVD CD-ROM disk 113 and transfers the video objects data,
`
`and/or other data, to the DVD information file manager 158.” Lam, 6:32-36, Figs.
`
`2-3. The received data includes encoded “audio and video,” including video that has
`
`been encoded using “conventional MPEG 2 . . . techniques.” Lam, 4:42-65; Kramer
`
`Decl. at ¶ 65.
`
`Claim 1: [1.2] transport logic coupled to the channel receiver which
`demultiplexes one or more multimedia data streams from the encoded stream;
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`- 13 -
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`
`
`Claim 10: [10.2] demultiplexing one or more multimedia data streams from the
`encoded stream,
`Claim 16: [16.2] transport logic coupled to the channel receiver which
`demultiplexes one or more multimedia data streams from the encoded stream;
`Lam discloses that the “DVD Information File Manager 158 / Video Objects
`
`Manager 159” (transport logic) is coupled to DVD driver 156 (receiver). Lam, Fig.
`
`3; Kramer Decl. at ¶ 66. The DVD information file manager 158 sends video objects
`
`from the DVD to the video objects manager 159. Lam, 5:56-64. The transported
`
`MPEG 2 stream is then “parse[d]” into separate audio and video packets using the
`
`video objects manager 159. Lam, 6:38-42, 6:1-16. A POSA would understand the
`
`term “parsing” in Lam to describe the demultiplexing (i.e., separating) of packets of
`
`the primary MPEG stream into streams of individual packets. Kramer Decl. at ¶¶ 67-
`
`68. Moreover, Lam discloses that his system is “as is known in the MPEG 2
`
`standard,” Lam, 6:5-9, which would disclose to a POSA that the received MPEG
`
`stream includes one or more multiplexed multimedia audio, video, and/or data
`
`streams for demultiplexing. Kramer Decl. at ¶ 68.
`
`Claim 1: [1.3] a system controller coupled to the transport logic which controls
`operations within the MPEG decoder system;
`Claim 10: [10.4] a system controller controlling operations within the MPEG
`decoder system,
`Claim 16: [16.3] a system controller coupled to the transport logic which controls
`operations within the video decoder system;
`Lam discloses that the CPU 104 in Lam Figure 1, including the Windows 95
`
`- 14 -
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`
`
`operating system 152 in Lam Figure 3, is a system controller that controls operations
`
`within the MPEG decoder system. Kramer Decl. at ¶¶ 70-71. The Lam MPEG 2
`
`system “interacts with the Windows 95 operating system 152 to act like a software
`
`application.” Lam, 9:14-29. Lam discloses that
`
`the MPEG microcontroller
`
`“interacts with the Windows 95 operating system 152 as a new executable
`
`application.” Lam, 7:1-4; see also Lam, Fig. 4. Lam Figure 3 shows the operating
`
`system (and CPU) coupled to “DVD Information File Manager 158 / Video Objects
`
`Manager 159” (transport logic). Kramer Decl. at ¶ 72.
`
`Control operations performed by the operating system and CPU include
`
`providing services for the user interface and hooks for all drivers to permit MPEG
`
`decoding operations. Lam, 5:16-20. For example, the DVD driver 156 (receiver)
`
`uses the hooks of the operating system to “route[] data from the DVD CD-ROM disk
`
`113 to a DVD information file manager 158 and video objects manager 159
`
`[transport logic].” Lam, 5:28-31; 5:64-67. Lam discloses other control operations
`
`such as a main memory sharing routine, in which the microcontroller “operates with
`
`the Windows 95 operating system 152 (FIG. 3) to request a 2-megabyte portion of
`
`the main memory 106.” Lam, 6:63-66, 7:1-4, Kramer Decl. at ¶ 73.
`
`Claim 1: [1.4] an MPEG decoder coupled to receive one or more multimedia
`data streams output from the transport logic, wherein the MPEG decoder
`operates to perform MPEG decoding on the multimedia data streams; and
`Claim 10: [10.3] performing MPEG decoding on the multimedia data streams,
`
`- 15 -
`
`
`
`Claim 16: [16.4] a video decoder coupled to receive one or more multimedia data
`streams output from the transport logic, wherein the video decoder operates to
`perform video decoding on the multimedia data streams; and
`Lam discloses that the video driver 160 and audio driver 162 (MPEG
`
`decoders) are coupled to the “DVD Information File Manager 158 / Video Objects
`
`Manager 159” (transport logic) as shown in Lam Figure 3. “The video driver 160
`
`decodes the video under the MPEG 2 technique.” Lam, 6:17-18. Further, the
`
`MPEG2 decoder 114 of Lam Figure 1 includes both a “video decoding circuit 126”
`
`and an “audio decoding circuit 128.” Lam, Figs. 1-2; Kramer Decl. at ¶ 76.
`
`Claim 1: [1.5] a memory coupled to the MPEG decoder,
`Claim 16: [16.5] a memory coupled to the video decoder,
`Lam discloses “the computer system includes a decoding circuit coupled to
`
`the main memory.” Lam, 12:54-55. Lam “avoids the need for additional memory
`
`to be used with the MPEG 2 decoder 114, but instead shares the main memory 106
`
`with the computer system 100.” Lam, 9:3-6, Figs. 1-3; Kramer Decl. at ¶ 77.
`
`Claim 1: [1.5.1] wherein the memory is used by the MPEG decoder during
`MPEG decoding operations, [1.6] wherein the MPEG decoder is operable to
`access the memory during MPEG decoding operations;
`Claim 10: [10.3.1] wherein said performing MPEG decoding operates using said
`first unified memory; and
`Claim 16: [16.5.1] wherein the memory is used by the video decoder during video
`decoding operations, [16.6] wherein the video decoder is operable to access the
`memory during video decoding operations;
`Lam discloses that the MPEG decoder uses and accesses the main memory
`
`- 16 -
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`
`
`during MPEG decoding. Kramer Decl. at ¶ 78. “[R]outine 200 only uses memory
`
`(portions of the main memory 106) when MPEG 2 decoding is being performed . . .
`
`and only uses the main memory during, video decoding.” Lam, 8:60-65. The MPEG
`
`2 decoder uses the main memory through at least read and write requests. Lam,
`
`8:35-44 (“[T]he microcontroller 120 receives memory read/write requests from the
`
`video decoding circuit 126 and/or audio decoding circuit 128, and . . . then accesses
`
`the appropriate portion in the main memory 106, to write data to, and read data from,
`
`the main memory.”); Kramer Decl. at ¶ 78.
`
`Claim 1: [1.5.2] wherein the memory stores code and data useable by the system
`controller which enables the system controller to perform control functions
`within the MPEG decoder system, [1.8] wherein the system controller is operable
`to access the memory to retrieve code and data during system control functions.
`Claim 10: [10.4.1] wherein said controlling operations accesses code and data
`from said first unified memory;
`Claim 16: [16.5.2] wherein the memory stores code and data useable by the
`system controller which enables the system controller to perform control
`functions within the video decoder system, [16.8] wherein the system controller is
`operable to access the memory to retrieve code and data during system control
`functions.
`Lam discloses that the CPU/operating system can access the main memory
`
`and retrieve code and data stored in the main memory during system control
`
`functions. Kramer Decl. at ¶¶ 74-75. Lam discloses “a memory management system
`
`that operates with the computer and its operating system (e.g., Windows 95) to
`
`request and employ [portions] of the main memory.” Lam, 3:9-15. “The computer
`
`- 17 -
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`
`
`system is controlled by an operating system and has a main memory.” Lam, 3:37-
`
`39, 6:59-62. A POSA would understand this CPU/operating system to retrieve code
`
`and data from the memory like a typical operating system. Kramer Decl. at ¶ 75.
`
`For example, the user interface on the operating system retrieves code and data when
`
`“a user makes a selection through the user interface 154” for DVD playback. Lam,
`
`5:53-56; 5:27-43. Similarly, Lam discloses reserving a portion of the main memory
`
`for MPEG decoding. This memory reservation is performed by the operating system
`
`as shown in Lam Figure 4 (“Start the Windows Application”) and requires retrieving
`
`code and data from the main memory. Lam, 8:29-30 (“[T]he lookup table can be
`
`stored in a portion of
`
`the main memory 106.”), 8:31-34 (noting POSA’s
`
`understanding); Kramer Decl. at ¶ 75.
`
`Claim 1: [1.5.3] wherein the memory is used by the transport logic for
`demultiplexing operations; [1.7] wherein the transport logic is operable to access
`the memory to store and retrieve data during demultiplexing operations; and
`
`Claim 10: [10.2.1] wherein said demultiplexing one or more multimedia data
`streams from the encoded stream operates using a first unified memory;
`Claim 16: [16.5.3] wherein the memory is used by the transport logic for
`demultiplexing operations; [16.7] wherein the transport logic is operable to
`access the memory to store and retrieve data during demultiplexing operations;
`Lam discloses that the transport logic uses and accesses the main memory to
`
`store and retrieve data during demultiplexing. Kramer Decl. at ¶ 69. Lam discloses
`
`the storage and retrieval of demultiplexed data in the main memory 106: “[T]he
`
`microcontroller 120 then accesses the appropriate portion in the main memory 106,
`- 18 -
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`
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`to write data to, and read data from, the main memory as requested by the video
`
`decoding circuit 126 or audio decoding circuit 128.” Lam, 8:35-44 (emphasis
`
`added). A POSA would understand from Lam that in order to read separate audio
`
`and video data from the main memory, the data was first demultiplexed and stored
`
`in the main memory during the parsing/demultiplexing operation performed by the
`
`video objects manager 159. Kramer Decl. at ¶ 69. Thus, when “[t]he vid
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