(19) Japan Patent Office (JP)
`(12) Patent Publication (A)
`(11) Publication number: HEI 2-189922
`(43) Publication Date: 25. 07.1990
`(51)
`IPC
`
`
`
`Identification
`Code
`
`JPO file
`number
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`J 8223-5F
`6810-5F H 01 L
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`
`
`
`
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`21/88
`
`
`
`
`D
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`H01L
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`
`
`21/3205
`21/302
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`
`
`
`Request for Substantive Examination: No
`Number of Claims: 1 (5 pages in total)
`(21) Application number: HEI 1-9209
`(22) Date of filing:
`18.01.1989
`(71) Applicant: NEC CORPORATION
`7-1, Shiba 5 chome, Minato-ku, Tokyo
`(72) Inventor: AKINORI SHIMIZU
`33-1, Shiba 5 chome, Minato-ku, Tokyo
`NEC CORPORATION
`
`
` (74)Agent: Patent attorney Akio SUZUKI
`
`
`
`Specification
`
`
`1. Title of the Invention
`Method for manufacturing Semiconductor Device
`
`2. Claims
`1.
`A method for manufacturing a semiconductor device, comprising:
`a step of forming a metal film on a semiconductor substrate;
`a step of forming a photoresist film pattern of a desired wiring pattern and a
`photoresist film pattern of a dummy wiring on this metal film; and
`a step of etching the metal film by reactive ion etching method using these
`photoresist film pattern and dummy pattern as masks,
`wherein the etching is performed, by the dummy pattern, in a state that an
`area density of the photoresist film pattern for forming the wiring pattern.
`
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`1
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`ChinaStar Ex.1008
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`3. Detailed Description of the Invention
`<Field of Industrial Application>
`
`The present invention relates to a method for manufacturing a semiconductor
`device, specifically relates to a formation method of a wiring pattern constituted of a
`metal film such as an aluminum film.
`<Prior Art>
`
`Conventionally, a wiring pattern constituted of metal films such as an
`aluminum film has been formed by forming a photoresist film of a desired patten on the
`entirely formed metal film and selectively etching this photoresist film by reactive ion
`etching.
`One example of the prior art will be explained using vertical cross-sectional
`
`views shown in Fig. 3(a) and 3(b).
`
`First, as shown in Fig. 3(a), aluminum film 3 is formed on oxide film 2 on
`semiconductor substrate 1, and further thereon photoresist film 7 having a desired
`pattern is formed.
`
`Next, as shown in Fig. 3(b), a wiring pattern is formed by selectively etching
`the aluminum film 3 by performing a reactive ion etching using this photoresist film 7
`as a mask.
`
`Thereafter, an aluminum wiring pattern is completed by removing the
`photoresist film 7.
`<Problem to be solved by the invention>
`
`In the above conventional method, the shape of the aluminum film 3 obtained
`by etching is greatly influenced by the pattern density of the photoresist film 7 (the ratio
`of the area occupied by the photoresist film toward the area of the wafer), and side
`etching and undercut occur more easily as the pattern density becomes small. This is
`because that, in the reactive ion etching of the aluminum film, anisotropic nature can be
`sustained by depositing of a reaction product on the side wall during etching, and the
`product from the photoresist film greatly contributes to this deposition.
`Therefore, as shown in Fig. 3(b), it becomes hard to obtain a desired wiring
`pattern because the width dimension of the aluminum film 3 formed becomes smaller
`than that of the photoresist film 7 due to side etching and undercut.
`
`The pattern density at which side etching and undercut are easy to occur,
`depending on etching conditions, is almost the case of 25% or lower.
`
`Therefore, as shown in Fig.4, in the case where the pattern density of the
`photoresist film 7 on the same wafer substantially differs depending on places, the
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`2
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`aluminum film 3 in the region A where the pattern density is small (for example 20%)
`is formed with a width smaller than that of the aluminum film 3 in the region B where
`the pattern density is large (for example 60%) due to undercut and side etching, thereby
`it becomes difficult to obtain an even wiring pattern.
`
`As a result, lowering of productivity of semiconductor elements and decrease of
`reliability are caused, and there arises a problem that it becomes disadvantageous in
`terms of microfabrication of the element.
`
`The present invention aims to provide a method for manufacturing a
`semiconductor device which enables to easily obtain a wiring pattern having a desired
`wiring width as well as uniform and highly accurate wiring pattern on the wafer.
`<Means for Solving the Problems>
`
`The method for manufacturing a semiconductor device according to the present
`invention includes a step of forming a metal film on a semiconductor substrate; a step of
`forming a photoresist film pattern of a desired wiring pattern and a photoresist film
`pattern of a dummy wiring on this metal film; a step of etching the metal film by
`reactive ion etching method using these photoresist film pattern and dummy pattern as
`masks, and etching is performed, by this dummy pattern, in a state that the area
`density of the photoresist film pattern for forming the wiring pattern.
`<Functions>
`
`In the above mentioned manufacturing method, manufacturing of highly
`accurate wiring pattern can be realized by increasing the pattern density of the
`photoresist film by the dummy pattern and suppressing side etching and undercut on
`the occasion of etching.
`<Examples>
`
`Next, the present invention will be explained below with reference to the
`drawings.
`
`Fig. 1 (a) to (d) are vertical cross-sectional views showing the first example of
`the present invention in an order of the manufacturing processes. Here, an example
`where a wiring pattern is formed of aluminum film will be explained.
`
`First, as shown in Fig. 1 (a), aluminum film 3 is formed on all over the surface
`of silicon oxide film 2 which has been grown on the surface of semiconductor substrate 1,
`and thereon photoresist film 4 in formed by patterning. Here, the photoresist film 4
`forms dummy pattern 4b in the part which is essentially unnecessary, in addition to
`pattern 4 which is necessary for forming the wiring pattern.
`
`This dummy pattern 4b can arbitrarily be formed. However, in the case where
`it needs to subsequently remove the aluminum pattern which is formed by this dummy
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`3
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`pattern 4b, it needs to adequately separate the pattern from the essential pattern 4a so
`that the pattern can easily be removed. For example, it is sufficient if it is kept off about
`3 μm or more.
`
`By providing this dummy pattern 4b, the density of the whole pattern can be
`increased to 60%, even in the case where the pattern density of the essential pattern 4a
`is 10%.
`Next, as shown in Fig. 1 (ｂ), wiring pattern 3a and dummy wiring pattern 3b
`
`are formed with the aluminum film 3 by performing reactive ion etching using each of
`patterns 4a and 4b of the above photoresist films as masks. At this time, as explained
`above, the density of the photoresist film 4 is sufficiently large, therefore undercut and
`side etching in the wiring pattern 3a and dummy wiring pattern 3b are suppressed, and
`they are formed with almost the same width of the pattern 4a and 4b.
`
`Subsequently, patterns 4a and 4b of the photoresist are removed. Further, in
`the case where dummy wiring pattern 3b is also removed, as shown in Fig. 1 (c), the top
`part and the side surfaces of the essential wiring pattern 3a are completely covered by
`new photoresist film 5. On the contrary, the dummy wiring pattern 3b is exposed as it is,
`and only the dummy wiring pattern 3b is removed by performing etching using the
`photoresist film 5 as a mask. This can easily be performed by wet-etching.
`
`If the photoresist film 5 is subsequently removed, as shown in Fig. 1 (d), the
`desired wiring pattern 3a can be obtained.
`
`Besides, selectivity ratio of the etching ratio of aluminum film and silicon oxide
`film is extremely high in the reactive ion etching of aluminum film, and the selectivity
`ratio of about 100 can usually be obtained. For this reason, generation of concavity and
`convexity of the silicon oxide film 2 as a foundation in the part of the dummy wiring
`pattern 3b is almost suppressed.
`
`Besides, it does not always have to remove the dummy wiring 3b, in this case,
`the steps of Fig. 1 (c) and (d) become unnecessary.
`
`Fig. 2 (a) to (c) are vertical cross-sectional views showing the second example of
`the present invention in an order of the manufacturing processes. In this example, the
`case where the densities of the desired wiring pattern are different on the wafer will be
`explained.
`First, as shown in Fig. 2 (a), aluminum film 3 is formed on silicon oxide film 2
`on semiconductor substrate 1, and thereon photoresist film 6 are formed by patterning.
`With regard to the pattern of this photoresist film 6, the density of the pattern 6a which
`is essentially necessary differs depending on places; 20% in area A and 60% in area B.
`For this reason, in area A, dummy pattern 6b which is similar to the pattern in area A is
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`4
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`provided so that the pattern density of area A becomes nearly equal to that of the area
`B.
`Accordingly, if reactive ion etching is performed to the aluminum film 3 using
`
`these patterns 6a and dummy pattern 6b as masks, as shown in Fig. 2 (b), it becomes
`possible to etch the essential wiring pattern 3a to a uniform shape in both areas A and B.
`As a matter of course, the dummy wiring pattern 3a is also uniformly formed by etching.
`
`Besides, even in this case, it does not always have to remove the dummy wiring
`3b. However, in the case where it needs to remove the pattern, the pattern may be
`removed in a similar way to the first example 1. As a result, as shown in Fig. 2 (c), the
`wiring pattern 3 having a desired density in each of area A and B can be formed.
`<Effect of the Invention>
`
`As explained above, the present invention has an effect that a highly accurate
`wiring pattern can easily obtained by increasing the pattern density to a predetermined
`level or more by arranging a dummy pattern in an area where the pattern density of a
`photoresist film is small, thereby suppressing side etching and undercut on the occasion
`of etching of a metal film.
`4. Brief Description of the Drawings
`Fig. 1 (a) to (d) are vertical cross-sectional views showing the first example of
`the manufacturing method according to the present invention in an order of the
`manufacturing processes; Fig. 2 (a) to (c) are vertical cross-sectional views showing the
`second example of the manufacturing method according the present invention in an
`order of the manufacturing processes; Fig. 3 (a) and (b) are vertical cross-sectional views
`showing one example of the conventional manufacturing method; and Fig. 4 is a vertical
`cross-sectional view for explaining defects in the conventional manufacturing method.
`1…..semiconductor substrate, 2…..silicon oxide film, 3…..aluminum film,
`3a…..wiring pattern, 3b…..dummy wiring pattern, 4…..photoresist film, 4a…..pattern,
`4b…..dummy pattern, 5…..photoresist film, 6…..photoresist film, 6a…..pattern,
`6b…..dummy pattern, 7…..photoresist film
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`NAME OF TRANSLATING COMPANY: TRY International IP LAW FIRM
`ADDRESS OF TRANSLATING COMPANY: Akasaka TK Building 101, 2-16-6, Akasaka,
`Minato-ku, Tokyo
`
`DECLARATION AND CERTIFICATE OF TRANSLATION
`
`TO WHOM IT MAY CONCERN:
`
`I/we, Try international IP law firm, hereby certify that I/we translated the documents below from
`Japanese
`into English. The translations are accurate and complete translations of the original
`documents.
`
`Translated materials: JP2000098909. JPH02189922. and JPS63181355
`
`Declarant hereby acknowledges that any willful false statements made in this Declaration are
`punishable by fine or imprisonment, or both. Furthermore, all statements made of Declarant's
`own knowledge are true, and all statements made on information and belief are believed to be
`true.
`
`Executed this
`
`^ day of 1^-
`
`,2015,
`
`.N\
`
`LI YONGHU/President&CEO