`__________
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`BEFORE THE PATENT TRIAL AND APPEAL BOARD
`__________
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`LAM RESEARCH CORP.,
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`Petitioner
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`v.
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`DANIEL L. FLAMM,
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`Patent Owner
`___________
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`U.S. Patent No. 5,711,849
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`Issued: January 27, 1998
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`Named Inventors: Daniel L. Flamm & John P. Verboncoeur
`
`Title: PROCESS OPTIMIZATION
`IN GAS PHASE DRY ETCHING
`___________
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`DECLARATION OF JOSEPH L. CECCHI IN SUPPORT OF PETITION
`FOR INTER PARTES REVIEW OF U.S. PATENT NO. 5,711,849 UNDER 37
`C.F.R. § 1.68
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`Mail Stop: PATENT BOARD
`Patent Trial and Appeal Board
`U.S. Patent & Trademark Office
`P.O. Box 1450
`Alexandria, VA 22313-1450
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`I, Joseph L. Cecchi, declare as follows:
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`I.
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`INTRODUCTION
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`I am over 18 years of age and otherwise competent to make this
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`1.
`2.
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`Declaration.
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`I have been asked to provide my views regarding technical issues in
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`connection with the above-captioned inter partes review of U.S. Patent No.
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`5,711,849 (“the ‘849 patent”). I opine only with respect to certain issues that are
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`3.
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`discussed in this declaration.
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`II. QUALIFICATIONS AND PROFESSIONAL EXPERIENCE
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`I am currently Dean of the School of Engineering and Professor of
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`Chemical and Biological Engineering at the University of New Mexico (“UNM”).
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`This is my second term as Dean, and the term began in February 2014. I have held
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`my appointment as Professor since joining UNM in 1994. I also serve
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`concurrently as Associate Provost for National Laboratory Relations.
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`From 2011 to 2012, while on leave from UNM, I served as Provost
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`and Professor of Engineering at the Masdar Institute of Science and Technology in
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`4.
`5. My first appointment as Dean of the School of Engineering extended
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`Abu Dhabi, United Arab Emirates.
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`from 2000 to 2009. From 2004 to 2011, I was Chair of the Board of Directors of
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`the Science and Technology Corp. at UNM, the university’s technology transfer
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`organization responsible for patenting and licensing UNM’s intellectual property.
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`I currently serve as Vice Chair of the Science and Technology Corp. at UNM.
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`From 1994 until 2000, I was Chair of the Department of Chemical and
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`Nuclear Engineering at UNM. Previously, I was a Lecturer with the rank of
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`Professor in the Department of Chemical Engineering at Princeton University,
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`where I also directed the Graduate Program in Plasma Science and Technology. I
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`was associated with the Plasma Physics Laboratory at Princeton University for
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`twenty-one years, as leader of the Plasma Processing Group (1987-1994); Principal
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`Research Physicist (1984-1994); leader of the Materials Physics Group (1979-
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`1987); Research Physicist (1978-1984); and Staff Physicist (1972-1978).
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`From 1991 to 1994, I was Director of the New Jersey SEMATECH
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`7.
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`Center of Excellence for Plasma Etching. This organization, which involved four
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`universities and one industrial laboratory, was engaged in state-of-the-art research
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`in plasma processing for semiconductor manufacturing.
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`8.
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`From 1992 to 2001, I worked on three committees established by the
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`Semiconductor Industry Association (“SIA”) to generate technology “roadmaps”
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`for semiconductor manufacturing. Most recently, from 1998 to 2000, I was a
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`member of the Interconnect Technical Working Group (“TWG”) for the SIA
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`International Technology Roadmap for Semiconductors (“ITRS”).
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`I obtained my Ph.D. in physics from Harvard University in 1972. I
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`also received a Master’s degree in physics from Harvard University in 1969, a
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`Bachelor’s degree in physics from Knox College in 1968, and a Master’s of
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`Business Administration (MBA) degree from the University of New Mexico in
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`2011. 10.
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`I have had significant research experience in a number of areas
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`pertaining to semiconductor devices and their manufacturing, including plasma
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`physics, plasma chemistry, plasma etching, plasma enhanced chemical vapor
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`deposition (PECVD), atomic layer deposition (ALD), which is a form of chemical
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`vapor deposition, plasma-assisted ALD, and chemical-mechanical-polishing
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`(CMP), sometimes called “chemical-mechanical-planarization”.
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`I have published over ninety papers in my fields of expertise. Among
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`the eight United States patents on which I am an inventor and an additional patent
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`application for which the claims have been allowed, the following six are in the
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`area of plasma technology for manufacturing semiconductors and other materials:
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`“Method and Apparatus for Coupling a Microwave Source in an
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`Electron Cyclotron Resonance System,” U.S. Patent No. 5,111,111,
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`Issued September 30, 1991.
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`“Apparatus and Method for Uniform Microwave Plasma Processing
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`Using TE11 and TM01 Modes,” U.S. Patent No. 5,302,803, Issued
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`April 12, 1994.
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`“Apparatus and Process for Producing High Density Axially Extended
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`Plasmas,” U.S. Patent No. 5,587,038, Issued December 24, 1996.
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`“Method of Making Dense, Conformal, Ultra-Thin Cap layers for
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`Nanoporous Low-k ILD by Plasma Assisted Atomic Layer
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`Deposition,” U.S. Patent No. 7,947,579, Issued May 24, 2011.
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`“Ultra-Thin Microporous/Hybrid Materials,” U.S. Patent No.
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`8,187,678, Issued May 29, 2012.
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`“Enzymatically Active High-Flux Selectively Gas-Permeable
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`Membranes,” U.S. Patent Application No.: 14/215,962, Claims
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`Allowed, September 29, 2015.
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`I have been elected as a fellow in AVS, The Society for the Science
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`12.
`13.
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`and Technology of Materials, Interfaces, and Processing.
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`I am aware of research and development activities ongoing in
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`semiconductor manufacturing and devices since the 1980s time frame. As a result
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`of my research experience in the plasma etching, deposition, and CMP areas, I am
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`also familiar with other silicon semiconductor process technologies that directly
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`impact these areas, including such things as lithography and cleaning techniques.
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`14. As a professor, I have taught courses in silicon semiconductor devices
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`and process technology at undergraduate and graduate levels. Many of the
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`students I have taught have gone on to work for companies engaged in
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`semiconductor manufacturing. I have supervised the research of a number of
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`students in semiconductor manufacturing as part of their work for their M.S. and
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`Ph.D. degrees.
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`15. My curriculum vitae (CV) (Exhibit 1006) includes additional details
`16. The ‘849 patent generally relates to optimizing a semiconductor
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`about my experience and professional background.
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`device fabrication process and/or a plasma etching apparatus to reduce etch non-
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`uniformities. In the embodiment discussed, a film (e.g., photoresist) covering a
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`semiconductor wafer is etched and measured to extract etch rate data, which is then
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`compared with a standard model of diffusion-limited first-order chemical
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`reactions, to extract model parameters including a surface reaction rate constant.
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`The surface reaction rate constant and/or other reactor parameters, for example, the
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`diffusivity or the spacing between adjacent wafers, are then adjusted, in order to
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`yield a more uniform etch rate profile. Ex. 1001.
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`In my research, I have designed, constructed, and used plasma
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`reactors, including inductively coupled plasma reactors, helicon plasma reactors,
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`electron cyclotron resonance (ECR) plasma reactors, and co-axial plasma reactors.
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`I have used these plasma reactors for plasma etching and plasma assisted chemical
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`vapor deposition. For example, publication 74 in my CV (Ex. 1006 at 15),
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`describes a plasma processing apparatus, including an electron cyclotron resonance
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`(ECR) plasma source used for plasma etching of polysilicon, silicon dioxide and
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`silicon. 18.
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`I have also used data collected from these reactors to modify,
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`improve, and optimize the operation of the reactors. For example, publications 75
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`and 77 in my CV (Ex. 1006 at 15), describe improved operational characteristics of
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`an ECR plasma etch reactor based on optimizing the coupling of the microwave
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`power to the plasma. The optimized coupler included a dielectric window that
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`functioned as a transmission line that adjusted the phase of the microwaves to
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`match to the plasma. The optimized coupling reduced the reflected power to less
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`than 5% of the incident power without external tuning, simplifying control of the
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`plasma operation. This work underpins U.S. Patent, 5,111,111, on which I am co-
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`inventor. 19. Publications 78 and 79 in my CV (Ex. 1006 at 15) describe a method
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`for producing more uniform plasmas in ECR plasma etch reactors which led to
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`more uniform etch rate across wafers. This work includes results of etching a
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`photoresist patterned, n-doped polysilicon layer deposited over an oxide layer on a
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`silicon wafer, using an SF6/Ar gas mixture. An important result is that the
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`polysilicon etch rate uniformity across the wafer was correlated with the plasma
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`across the wafer was uniform to within about 2%
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`uniformity. When the plasma uniformity was maximized, the polysilicon etch rate
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`20. Publications 79 in my CV (Ex. 1006 at 15) describes another method
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`for producing more uniform plasmas in ECR plasma etch reactors, based on
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`multiplexing two different microwave modes in the transmission waveguide used
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`to introduce the microwave power into the ECR reactor. The result of mixing the
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`two modes was a more uniform deposition of the microwave power across the
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`reactor. This work is the basis for U.S. Patent, 5,302,803, on which I am co-
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`inventor. 21. As further examples, publications 92, 93, and 94 in my CV (Ex. 1006
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`at 17) relate to a process of plasma-assisted atomic layer deposition, which is a
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`form of plasma-assisted chemical vapor deposition that provides layer-by-layer
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`control of thin film deposition. A co-axial inductively coupled plasma reactor was
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`used in this work. In this work, reactant species diffused across the surface of the
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`substrate where they underwent chemical reactions. Publications 92 and 93
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`describe how plasma-assisted atomic layer deposition of silicon dioxide can be
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`applied to producing a material that can be used for interlevel dielectrics between
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`conductors in integrated circuits. These plasma processes are also the subject
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`matter in U.S. Patent Nos. 7,947,579, 8,187,678, and U.S. Patent Application No.
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`14/215,962 (for which claims were allowed, September 29, 2015) on which I am
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`I have also been asked to provide my technical opinions on concepts
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`discussed in the ‘849 patent and other reference documents, as well as my
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`technical opinions on how these concepts relate to several claim limitations of the
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`‘849 patent in the context of the specification.
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`In reaching the opinions stated herein, I have considered the ‘849
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`patent, its prosecution history, and the references listed in the table below, and
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`have also drawn as appropriate upon my own education, training, research,
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`knowledge, and personal and professional experience.
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`Description
`Exhibit
`1001 U.S. Patent No. 5,711,849 (the ‘849 patent)
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`1002
`
`James F. Battey, The Effects of Geometry on Diffusion-Controlled
`Chemical Reaction Rates in a Plasma, JOURNAL OF THE
`ELECTROCHEMICAL SOCIETY: SOLID-STATE SCIENCE AND TECHNOLOGY,
`Vol. 124, No. 3 (March 1977) (Battey)
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`25.
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`an inventor.
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`I am being compensated for my time at my standard hourly rate of
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`$450 in connection with this proceeding. My compensation is in no way
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`contingent upon my performance or the outcome of this case.
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`I have been asked my technical opinions regarding the understanding
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`of a person of ordinary skill in the art (discussed below) as it relates to the ‘849
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`patent and other reference documents.
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`22.
`23.
`24.
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`1003
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`Carl Galewski and William G. Oldham, Modeling of a High
`Throughput Hot-Wall Reactor for Selective Epitaxial Growth of Silicon,
`IEEE TRANSACTIONS ON SEMICONDUCTOR MANUFACTURING, Vol. 5,
`No. 3 (August 1992) (Galewski)
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`1004 U.S. Patent No. 5,450,205 (Sawin)
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`1006
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`1007
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`Curriculum Vitae of Joseph L. Cecchi, Ph.D.
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`‘849 Patent Prosecution History
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`1008 H. Scott Fogler, ELEMENTS OF CHEMICAL REACTION ENGINEERING 635-
`642 (2nd ed. 1992).
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`III. PERSON HAVING ORDINARY SKILL IN THE ART
`I have approached my analysis of the ‘849 patent from the perspective
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`26.
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`of a person having ordinary skill in the art (a PHOSITA) at the time of the
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`purported invention of the ‘849 patent, which I have been informed is May 3,
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`1995, the earliest priority date recited by the ‘849 patent.
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`27.
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`I have been informed by counsel that a person having ordinary skill in
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`the art is a hypothetical person who is presumed to have known all of the relevant
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`art at the time of the invention. Factors that may be considered in determining the
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`level of ordinary skill in the art may include: (1) type of problems encountered in
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`the art; (2) prior art solutions to those problems; (3) rapidity with which
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`innovations are made; (4) sophistication of the technology; and (5) educational
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`level of active workers in the field. I have been informed by counsel that it is from
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`the viewpoint of a person of ordinary skill in the art that determined patentability.
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`28. Based on these factors, in my opinion, a person having ordinary skill
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`in the art of the ‘849 patent would generally have had either (i) a Bachelor’s degree
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`in engineering, physics, chemistry, materials science, or a similar field, and two or
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`three years of work experience in semiconductor manufacturing or related fields,
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`or (ii) a Master’s degree in engineering, physics, chemistry, materials science, or a
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`manufacturing or related fields.
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`similar field and one or two years of work experience in semiconductor
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`29. Based on this understanding of a PHOSITA for the ‘849 patent, I
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`believe that I am at least a person having ordinary skill in the art for purposes of
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`the ‘849 patent. For example, my qualifications and experiences discussed in
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`Section II above, and in my CV (Ex. 1006), demonstrate my familiarity with and
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`knowledge of the art of the ‘849 patent. I therefore believe that I am qualified to
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`offer this declaration as to how such a person would have interpreted the ‘849
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`patent and the prior art on or about May 3, 1995. Unless otherwise stated, my
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`statements below refer to the knowledge, beliefs and abilities of a person having
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`ordinary skill in the art of the ‘849 patent at the time of the purported invention of
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`the ‘849 patent.
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`IV. RELEVANT LEGAL STANDARDS
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`30. My opinions are informed by my understanding of the relevant law. I
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`understand that the patentability analysis is conducted on a claim-by-claim basis.
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`I understand that a single piece of prior art “anticipates” a claim if
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`each and every element of the claim is disclosed in that prior art. I further
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`understand that, where a claim element is not explicitly disclosed in a prior art
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`reference, the reference may nonetheless anticipate a claim if the missing claim
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`element is necessarily present in the apparatus or a natural result of the method
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`32.
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`disclosed—i.e., if the missing element is “inherent.”
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`I understand that the prior art may render a patent claim “obvious.” I
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`understand that two or more pieces of prior art that each disclose fewer than all
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`elements of a patent claim may nevertheless be combined to render a patent claim
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`obvious if the combination of the prior art collectively discloses all elements of the
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`claim and a person having ordinary skill in the art at the time would have had
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`reason to combine the prior art. I understand that this reason to combine need not
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`be explicit in any of the prior art, but may be inferred from the knowledge of a
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`person having ordinary skill in the art at the time the patent application was filed. I
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`also understand that a person having ordinary skill in the art is not an automaton,
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`but is a person having ordinary creativity. I further understand that one or more
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`pieces of prior art that disclose fewer than all of the elements of a patent claim may
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`render a patent claim obvious if including the missing element would have been
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`obvious to a person having ordinary skill in the art (e.g., the missing element
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`represents only an insubstantial difference over the prior art or a reconfiguration of
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`a known system).
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`33.
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`I understand that a patent claim is obvious if the differences between
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`the subject matter claimed and the prior art are such that the subject matter as a
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`whole would have been obvious at the time the alleged invention was made. I
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`understand that the obviousness analysis must focus on the knowledge available to
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`one of skill in the art at the time of the alleged invention in order to avoid
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`impermissible hindsight. I further understand that the obviousness inquiry assumes
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`that the person having ordinary skill in the art would have knowledge of all
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`relevant references available at the time of the alleged invention.
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`I also understand that the USPTO has identified exemplary rationales
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`that may support a conclusion of obviousness, and I have considered those
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`rationales in my analysis. The rationales include:
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`Combining prior art elements according to known methods to yield
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`predictable results;
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`Simple substitution of one known element for another to obtain
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`predictable results;
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`Use of known technique to improve similar devices (methods or
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`products) in the same way;
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`Applying a known technique to a known device (methods or products)
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`ready for improvement to yield predictable results;
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`Choosing from a finite number of identified, predictable solutions,
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`with a reasonable expectation of success, such that the effort was
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`“obvious to try”;
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`Known work in one field of endeavor that may prompt variations on
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`the work for use in either the same field or a different one based on
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`design incentives or other market forces if the variations are
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`predictable to a person having ordinary skill in the art;
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`Some teaching, suggestion, or motivation in the prior art that would
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`have led a person having ordinary skill in the art to modify the prior
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`art reference or to combine prior art reference teachings to arrive at
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`the claimed invention.
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`I appreciate that secondary considerations may be considered, if
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`35.
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`present, as part of the overall obviousness analysis. Such considerations do not
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`appear to be present here:
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`I have never heard anyone offer praise for the ‘849 patent, nor am I
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`aware of any commercial success attributable to the ‘849 patent.
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`I am also unaware of any copying of the alleged invention of the ‘849
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`I am unaware of any use to which the owner of the ‘849 patent has put
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`the patent except to assert it in litigation.
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`V. THE ‘849 PATENT
`I understand Lam is challenging claims 1-29 (“challenged claims”) of
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`the ‘849 patent.
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`36.
`37.
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`In my opinion, the challenged claims are all directed to a method for
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`fabricating semiconductor devices in a plasma etching apparatus. In the method, a
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`film on the surface of the semiconductor is etched, yielding a non-uniform etch
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`profile from which etch characteristics, such as a surface reaction rate constant, are
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`derived. The surface reaction rate constant may then be used, such as in the
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`fabrication of the device or to adjust or modify the plasma etching apparatus.
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`I understand that the ‘849 patent issued from an application that was
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`originally filed on May 3, 1995 and includes no claim to earlier priority. Ex. 1001-
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`1; Ex. 1007. I understand that the references relied upon in this Petition are prior
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`art to the ‘849 patent because they all predate May 3, 1995, the earliest possible
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`priority date recited by the ‘849 patent.
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`39. The crux of the alleged invention of the ‘849 patent is the
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`A. Representative Claim 1
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`straightforward and well-known process of modeling and/or optimizing uniformity
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`of etch profiles for semiconductor devices in a plasma etch apparatus. For
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`example, claim 1 recites a process comprising (a) “providing a plasma etching
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`apparatus comprising a substrate therein, said substrate comprising a top surface
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`and a film overlaying said top surface, said film comprising a top film surface,” (b)
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`“etching said top film surface to define a relatively non-uniform etching profile on
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`said film,” (c) “defining etch rate data comprising an etch rate and a spatial
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`coordinate which defines a position within said relatively non-uniform etching
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`profile on said substrate, said etching comprising a reaction between a gas phase
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`etchant and said film,” (d) “extracting a surface reaction rate constant from said
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`etch rate data,” and (e) “using said surface reaction rate constant in the fabrication
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`of a device.” Ex. 1001 [‘849 patent] at 17:36-50.
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`Plasma Etching Apparatus Comprising A Substrate
`Therein
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`40. The ‘849 patent shows embodiments of a plasma etching apparatus in
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`Figures 1 and 2. The embodiment in Figure 1 is described as “a co-axial reactor
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`[that] includes at least three processing zones . . . a plasma processing zone (PG)
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`13, a transport zone (TZ) 15, a plate stack zone (PS) 17, and others.” Ex 1001
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`[‘849 patent] at 2:58-62. The plate stack zone allows for multiple wafers to be
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`stacked co-axially, as shown in Fig. 1. The embodiment in Figure 2 is described as
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`“a single wafer etching apparatus with elements such as a chamber 53, a top
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`electrode 55, a bottom electrode 57, a power source 59, a platen 64, and others.”
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`6458854
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`IPR Case No. Unassigned
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`B.
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`The ‘849 Patent Disclosure
`1.
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`LAM Exh 1005-pg17
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` U.S. Patent No. 5,711,849
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`IPR Case No. Unassigned
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`Id. at 4:16-18. The ‘849 patent describes a method whereby “[a] substrate with an
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`overlying film is placed into a plasma etching apparatus. . . . [and a] step of plasma
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`etching the film is performed.” Id. at 5:11-16.
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`2.
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`Relatively Non-Uniform Etching Profile
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`41. The ‘849 patent describes how “[a] limitation with the conventional
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`plasma etching technique is obtaining and maintain etching uniformity,” which it
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`claims “relies upon a ‘trial and error’ process” to obtain and maintain such desired
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`uniformity. Id. at 1:26-34. Figure 1A shows an “example of an etched substrate
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`LAM Exh 1005-pg18
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` U.S. Patent No. 5,711,849
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`21 from the plate stack zone,” where “the top surface film includes a convex
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`region, or etching profile … [which] occurs by way of different etch rates along the
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`r-direction of the substrate corresponding to different etchant species
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`concentrations.” Id. at 3:66-4:6. In an effort to systematize the process of
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`obtaining and maintaining etching uniformity, “a plasma etching method that
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`includes determining a reaction rate coefficient based upon etch profile data is
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`provided.” Id. at 1:51-53. Accordingly, the ‘849 patent asserts that “an easy and
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`cost effective way to select appropriate etching parameters . . . by way of the etch
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`profile data” is facilitated. Id. at 1:54-57.
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`3.
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`Etch Rate Data Comprising An Etch Rate And A Spatial
`Coordinate
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`42. The ‘849 patent describes the characterization of a relatively non-
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`uniform etching profile for an etched substrate in terms of “etch rate data,”
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`including an etch rate and a spatial coordinate. “The etching profile is thereby
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`characterized as a relative etch rate u, a x-location, and a y-location u, (x, y).” Id.
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`at 5:38-41. In addition to x-y coordinates, the ‘849 patent discusses how, “[i]n
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`cylindrical coordinates, the relative etch rate is also in the z-direction, and the
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`spatial coordinates are defined in the r and θ coordinates.” Id. at 5:42-44.
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`43. The ‘849 patent discusses etching a sample substrate to yield an
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`4.
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`Surface Reaction Rate Constant
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`“etching profile,” and how “[t]he present methods provide for improved etching
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`LAM Exh 1005-pg19
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` U.S. Patent No. 5,711,849
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`IPR Case No. Unassigned
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`conditions by way of a reaction rate constant derived from . . . [the] etching
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`profile.” Id. at 4:67-5:3. The specification describes modelling a measured etch
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`rate according to the following solution, (cid:1873)(cid:4666)(cid:1870)(cid:4667)(cid:3404)(cid:3010)(cid:3116)(cid:3436)(cid:3495)(cid:3286)(cid:3297)(cid:3116)(cid:3253)(cid:3045)(cid:3440)
`(cid:3010)(cid:3116)(cid:3436)(cid:3495)(cid:3286)(cid:3297)(cid:3116)(cid:3253)(cid:3028)(cid:3440), where u(r) is the etch
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`rate, I0 is the modified Bessel function of the first kind, D is the diffusivity, a is the
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`outer radius of the wafer, and kν0 is the reaction rate constant. Id. at 6:20-25. For
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`the particular geometry of the co-axial reactor described in the ‘849 patent, the
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`surface reaction rate constant is related to the reaction rate constant via, Ks =
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`(kvo)dgap, where dgap is the wafer spacing. Id. at 6:58-62.
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` The ‘849 patent goes on to describe using the extracted surface
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`44.
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`reaction rate in some embodiments. For example, it states “[f]rom the
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`concentration and the surface reaction rate, the particular etching step can be
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`improved by way of adjusting selected etching parameters.” Id. at 7:22-24.
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`VI. TECHNICAL BACKGROUND
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`In my opinion, patents and printed publications predating the
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`purported invention of the ‘849 patent disclosed the limitations of the challenged
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`claims. For example, the references discussed herein disclose methods for
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`fabricating semiconductor devices in a plasma etching apparatus, wherein a film on
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`the surface of the semiconductor is etched, yielding a non-uniform etch profile
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`from which etch characteristics, such as a surface reaction rate constant, are
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`45.
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`LAM Exh 1005-pg20
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` U.S. Patent No. 5,711,849
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`IPR Case No. Unassigned
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`derived and used, such as in the fabrication of the device or to adjust or modify or
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`46. The prior art article by Battey, The Effects of Geometry on Diffusion-
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`re-design the plasma etching apparatus.
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`Controlled Chemical Reaction Rates in a Plasma, was published by the Journal of
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`the Electrochemical Society in March 1977. Ex. 1002. Battey describes a process
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`for stripping photoresist from silicon wafers in a plasma etch apparatus and
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`modeling etch non-uniformity. See, e.g., Ex. 1002 [Battey] at p. 437 (Abstract). In
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`my opinion, it teaches or suggests a process for device fabrication. See, e.g., Ex.
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`1002 [Battey] at p. 437, 439. Battey further teaches or suggests providing a plasma
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`etching apparatus comprising a substrate therein comprising a top surface and a
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`film overlying said top surface, said film comprising a top film surface, and
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`etching said top surface at a temperature, via a reaction between a gas phase
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`etchant and said film, to define a relatively non-uniform etching profile on said
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`film, thereby defining etch rate data comprising an etch rate and a spatial
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`coordinate from which is extracted a surface reaction rate constant for said
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`temperature. Id. at 437-38, 440. I discuss the Battey reference in more detail
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`below in Section VII.A-C where I explain my opinions that claims 1-29 of the ‘849
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`patent are unpatentable based on the grounds discussed in those sections.
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`47. The prior art article by Galewski, Modeling of a High Throughput
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`Hot-Wall Reactor for Selective Epitaxial Growth of Silicon, was published by the
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` U.S. Patent No. 5,711,849
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`IPR Case No. Unassigned
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`IEEE Transactions on Semiconductor Manufacturing in August 1992. Ex. 1003.
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`Galewski describes diffusion-limited chemical reactions in a co-axial reactor to
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`conduct chemical vapor deposition for epitaxial growth of silicon. Ex. 1003
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`[Galewski] at p. 169. It describes using “[t]he simplest possible model that
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`accurately predict these [growth] data,” nothing that “a simple first-order model is
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`sufficient” to model growth non-uniformity on the semiconductor wafers in the
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`radial direction. Id. The model is then employed “to demonstrate improvements to
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`the existing hot-wall reactor, and to propose a design for a scaled up production-
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`sized hot-wall reactor.” Id. I discuss the Galewski reference in more detail below
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`in Section VII.B-C where I explain my opinions that claims 1-29 of the ‘849 patent
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`are unpatentable based on the grounds discussed in those sections.
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`In addition to Battey and Galewski, I discuss other reference in
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`Section VII where I explain my opinions that claims 1-29 of the ‘849 patent are
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`48.
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`unpatentable based on the grounds discussed in that section.
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`VII. OPINIONS RELATING TO EACH OF THE GROUNDS
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`49. As I explain in detail below, it is my opinion that claims 1-29 of the
`50.
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`‘849 patent are unpatentable on the following grounds.
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`A. Ground 1: Claims 26-28 Are Obvious Over Battey Under 35
`U.S.C. § 103(a)
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`In my opinion, Battey teaches the well-known process of optimizing
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`uniformity of etch profiles for semiconductor devices in a plasma etch apparatus,
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`LAM Exh 1005-pg22
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`IPR Case No. Unassigned
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`and teaches or renders obvious all of the elements of independent claim 26 and
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`dependent claims 27 and 28.
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`51.
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`1.
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`Battey Teaches All the Limitations of Independent Claim 26
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`In my opinion, Battey teaches “A process for fabricating a device
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`using a plasma etching apparatus,” as recited by claim 26. Battey is generally
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`directed to modelling and adjusting edge-to-center inhomogeneity for etching of
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`photoresist on semiconductor wafers. See, e.g., Ex. 1002 [Battey] at p. 437-439;
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`Id. at p. 437 (“If a boatload of silicon wafers is introduced in an oxygen plasma,
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`the atomic oxygen must diffuse between the wafers in order to strip the photoresist.
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`The strip