MAR.
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`i hereby certify that this correspondence is being sent via
`facsimile 703-305-738210 Examiner Chris C. cm at the
`United States Patent and rademark Office on
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`9' */ 03
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`ate of Facsimile
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`Paul E. Bauch Ph.D
`Name of Applicant. assigns or
`Registe
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`5H? I 5°
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`Our File ‘No. 09799940-0011
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`IN THE UNITED STATES PATENT AND TRADEMARK OFFICE
`In re Application of:
`James E. Nulty, et al. //.
`Serial No. 09/540,610 —_~'
`
`Examiner Chris O. Chu
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`[D9
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`l
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`\/\_/g4~..r\/§-sf‘/\4~.a-4
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`Filing Date: March 31, 2000
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`For Method for Eliminating Lateral
`Spacer Erosion on Enclosed
`Contact Topographies During RF
`Sputter Cleaning
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`Group Art Unit No. 2815
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`AMENDMENT AND REQUEST FOR RECONSIDERATION
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`Commissioner for Patents
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`Washington. DC. 20231
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`Dear Sir:
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`Responsive to the Official Action of September 11, 2002 Applicants respectfully
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`request reconsideration in light of the following remarks.
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`REMARKS
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`Applicants would like to thank the Examiner for indicating withdrawal of the
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`previous grounds of rejection.
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`The present invention relates to a semiconductor device with well defined contact
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`openings.
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`in the past, the practice with respect to forming contact openings during the
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`fabrication of semiconductor devices, particularly self-aligned contact openings, was to
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`INTEL 1020 ~\
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`use etchants with high selectivity to protect underlying regions. However. the properties
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`of a highly selective etch of the overlying etch layer can transform a substantially
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`rectangular spacer adjacent to the contact region into a sloped spacer. Before the
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`conductor materials are added to the contact opening. the opening was cleaned with a
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`sputter etchant which can erode a portion of the sloped insulating spacer. Thus in
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`conventional self-aligned contact structures, the diagonal thickness of the spacer, rather
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`than the vertical thickness of the insulating layer. determined the minimum insulating
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`layer thickness for the gate. sloping spacers limit the number of structures that can be
`included on a device.
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`The present invention avoids this problem by retaining the substantially
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`rectangular profile of the insulating spacers. The present invention includes at least one
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`insulating spacer in the contact region and an etch-stop material over a first insulating
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`layer and adjacent to the insulating spacer, the etch-stop material being a different
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`material from the insulating spacer.
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`The rejection of the claims under 35 U.S.C. § 103 over Dennison et al., in view
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`of Figure, et al., and optionally further in view of Gonzalez. is respectfully traversed.
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`Dennison, et al. includes spacers and caps which act as an etch-stop material with
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`respect to the overlying BPSG layer and therefore must be made of silicon nitride in »
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`order to function. The thin overlying layer 20 is described by Dennison et al. as a
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`barrier layerwhich prevents diffusion from the BPSG layer. Figura, et al. describes
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`oxide spacers, a silicon nitride etch-stop layer, and does not describe any barrier layers.
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`Dennison at al. describes a method of forming a bit line over a capacitor array of
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`memory cells. The semiconductor wafer of Dennison et al. has an array of electrically
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`isolated word lines 12, 14, and 16 having insulating spacers and caps 18; the spacers V
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`and caps preferably comprise an insulative nitride, such as Si3N.. (Figure 1; column 3.
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`lines 25-36). A thin layer 20 of Si3N.. is provided atop the wafer to function as a diffusion
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`barrier (column 3. lines 34-36). Dennison et al. is clear about the function ofall of
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`these structures:
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`The principal purpose of barrier layer 20 is to prevent diffusion of boron or
`phosphorous atoms from BPSG layer 28 into active areas 24 and 26.
`Caps [and spacers] 18 are preferably comprised of nitride (Si_-,N4) where
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`layer 28 is comprised of oxide, such that the contact etch to produce first
`contacts 32 will stop relative to word lines spacers and caps 18.
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`Accordingly, Dennison, gt al., indicates that the caps and spacers act as an etch-
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`stop material with respect to the overlying BPSG layer. and therefore need to be formed
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`' of a material such as silicon nitride. Dennison et al. also indicates that barrier layer 20
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`functions to prevent diffusion from the overlying BPSG layer 28.
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`Figure gt al. describes a method of forming contact areas between vertical
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`conductors. A structure is described which includes transistor gate electrodes 22 which
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`include gate insulating protective layer 28, and an insulating spacers 30 formed on
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`either side of the gate electrodes (column 4. lines 6-10; Figure 1). The gate insulating
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`V protective layer 28 and insulating spacers 30 are preferably made of silicon dioxide; the
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`lower insulating layer 36 on top of these structures is made of BPSG (column 4, lines
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`10-14; Figure 2).
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`It is also noted that silicon nitride may be used instead of silicon
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`dioxide for insulating protective layer 28 and spacers 30 (column 4, lines 22-24).
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`Shown in Figure 3a, anietch-stop layer 43, made of silicon nitride or other suitable
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`material. is deposited over lower insulating layer 36 (column 4, lines 50-53).
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`Gonzalez has only been cited for a description of silicon dioxide spacers.
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`The spacers and caps of Dennison, gt al. are required to act as an etch-stop
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`material (see Dennison et al.. column 4, lines 6-10); the only etch-stop material
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`described in any of the references is silicon nitride. Layer 20 in Dennison et al. is
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`_
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`described as a barrier layer for preventing diffusion; of all the references only Dengisgn,
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`_q__a;L describes a barrier layer. and the only material described is silicon nitride.
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`If one
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`were to substitute silicon oxide for the caps and spacers in Dennison et al.. then they
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`would not act as an etch-stop material with respect to the overlying BPSG layer, and
`therefore such a substitution would destroy their function. Accordingly. although
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`Figura, et al. does describe a specific embodiment where an etch-stop layer is silicon
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`nitride and caps and spacers are formed from silicon oxide, changing the composition of
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`the caps and spacers in Qennison, et al. would defeat their function. Furthermore, there
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`is no suggestion to replace the barrier layer 20 of Dennison, et al. with a different
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`material--nothing else is suggested in any of the references which would provide a
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`barrier function other than silicon nitride. Gonzalez does not provide any additional
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`SONNEN9CHEill—"'
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`teaching to cure this deficiency. Accordingly, Applicants submit that combining the
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`references defeats the purpose of Qennison, et al.. and therefore the claimed invention
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`is not obvious over the applied references. Withdrawal of this ground of rejection is
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`respectfully requested.
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`Applicants respectfully request that the Examiner contact the undersigned upon
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`the indication of any allowable subject matter. Applicants submit the application is now
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`in condition for allowance. Early notice of such action is earnestly solicited.
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`Respec
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`ly s%Lfmitted,
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`aul E. Rauch, Ph.D.
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`
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`Registration No. 38.591
`Attorney for Applicants
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`SONNENSCHEIN NATH 8. ROSENTHAL
`P. 0. BOX 061080
`1
`WACKER DRIVE STATION, SEARS TOWER
`CHlCAGO, lL 60606
`(312) 876-8000