Sony Corp. v. Raytheon Co.
`IPR2016-00209
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`Raytheon2015-0001
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`

`
`This book was set in Times Roman by information Sciences Corporation.
`The editors were T. Michael Slaughter and Madeleine Eichl:-erg;
`the production supervisor was Leroy A. Young.
`The cover was designed by Joseph Gillians.
`The drawings were done by Bell Laboratories, incorporated.
`Halliday Lithograph Corporation was printer and binder.
`
`«FriK m}
`I
`K.
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`~33
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`VLSI 'I‘ECHN()LOGY
`
`Copyright (3 J98} by Bell Telephone Laboratories, Incorporated. All rights reserved. Printed in
`the United States of Arneriea. Except as permitted under the United States Copyright Act of
`1976, no part of this publication may be reproduced or distributed in any form or by any means,
`or stored in a data base or retrieval system, without the prior written permission of Bell Tele-
`phone Laboratories, Incorporated.
`
`i23456789OHALHAL89876543
`
`ISBN El-t]‘r‘-i]l:.El:.-.Eil:a- 3
`
`Library of Congress Cataloging in Publication Data
`Main entry under title:
`
`VLSI technology.
`
`(McGraw—Hjll series in electrical engineering.
`Electronics and electronic circuits)
`includes index.
`
`integrated circt:its——Very large scale
`i.
`integration.
`1. Sre, S. M ., date
`LI. Series.
`
`1983
`TK7874.V566
`ISBN 0-07-062686—3
`
`621.331 ’73
`
`82-24947
`
`Raytheon2015-0002
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`

`
`CONTENTS
`
`...r.c..«...._w.~.«»,..i,-.M-,.._,.-,-144'~
`
`
`
`..;..,.:.a.;~.'i\;.v;;::w.:r:n.:.uz-;.u-I-/,».iV..m
`
`List of Contributors
`
`Preface
`
`Introduction
`
`Crystal Growth and Wafer Preparation
`C. W. Pearce
`
`’
`
`Introduction
`
`Electronic—Grade Silicon
`
`Czochralski Crystal Growing
`Silicon Shaping
`
`Processing Considerations
`Summary and Future Trends
`References
`-
`
`p
`
`Problems
`
`Epitzuiy
`C. W. Pearce
`
`Introduction
`
`Vapor-Phase Epitaxy
`Molecular Beam Epitaxy
`Silicon on Insulators
`
`Epitaxial Evaluation
`
`Summary and Future Trends
`References
`Problems
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`x
`
`Dielectric and Polysilicon Film Deposition
`A. C. Adams
`
`Introduction
`
`Deposition Processes
`
`Polysilicon
`Silicon Dioxide
`Silicon Nitride
`
`Plasma—Assisted Depositions
`Other Materials
`
`Summary and Future Trends
`References
`
`Problems
`
`Oxidation
`
`L. E. Katz
`
`Introduction
`
`Growth Mechanism and Kinetics
`Oxidation Techniques and Systems
`Oxide Properties
`
`‘Redistribution of Dopants at Interface
`Oxidation of Polysilicon
`Oxidation-Induced Defects
`
`Summary and Future Trends
`References
`Problems
`
`Diffusion
`
`J. C. C. Tsai
`
`Introduction
`
`Models of Diffusion in Solids
`
`Fick’s One-Dimensional Diffusion Equations
`Atomistic Diffusion Mechanisms
`
`Measurement Techniques
`Diffusivities of B, P, As, and Sb
`Diffusion in SiO2
`Fast Diffusants in Silicon
`
`Diffusion in Polycrystalline Silicon
`Diffusion Enhancements and Retardations
`Summary and Future Trends
`References
`Problems
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`CONTENTS vii
`
`219
`
`219
`
`Chapter 6
`*
`
`Ion Implantation
`T. E. Seidel
`
`Introduction
`6. 1
`Ion Implant System and Dose Control
`6.2
`Ion Ranges
`6.3
`6.4 Disorder Production
`6.5 Annealing of Implanted Dopant Impurities
`6.6 Shallow Junctions (As, BF2)
`6.7 Minority—Carxier Effects
`
`6.8 Gettering
`
`6.9 Effects in VLSI Processing
`6.10 Summary and Future Trends
`References
`Problems
`
`Chapter 7 Lithography
`D. A. McGil1is
`Introduction
`
`7. 1
`
`7.2 The Lithographic Process
`
`7.3 Optical Lithography
`
`7.4 Electron Beam Lithography
`7.5 X-Ray Lithography
`
`7.6 Other Lithography Techniques
`7.7 Summary and Future Trends
`References
`
`Problems
`
`Chapter 8 Dry Etching
`'
`C. J. Mogab
`Introduction
`
`8. 1
`
`8.2 Pattern Transfer
`
`8.3 Low-Pressure Gas Discharges
`8.4 Plasma-Agsisted Etching Techniques
`8.5 Control of Etch Rate and Selectivity
`8.6 Control of Edge Profile
`8.7 Side Effects
`'
`
`8.8 Dry Etching Processes for VLSI Technology
`8.9 Summary of Future Trends
`References
`
`Problems
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`viii CONTENTS
`
`Chapter 9
`
`9.1
`
`9.2
`
`9.3
`
`9.4
`
`9.5
`
`9.6
`
`9.7
`
`Metallization
`D. B. Fraser
`
`Introduction
`
`Methods of Physical Vapor Deposition
`Problems Encountered in Metallization
`Metallization Failure
`Silicides for Gates and Intercormections
`Corrosion and Bonding
`Future Trends
`References
`
`Problems
`
`Chapter 10
`
`Process Simulation
`W. Fichtner
`
`10.1
`10.2
`
`10.3
`
`10.4
`
`10.5
`
`10.6
`
`10.7
`
`10.8
`
`Introduction
`
`Epitaxy
`
`Ion Implantation
`
`Diffusion and Oxidation
`Lithography
`Etching and Deposition
`Device Simulation
`
`Summary and Future Trends
`References
`Problems
`
`VLSI Process Integration
`L. C. Parrillo
`
`Introduction
`
`Basic Considerations for IC Processing
`Bipolar IC Technology
`NMOS IC Technology
`Complementary MOS IC Technology
`Miniaturizing VLSI Circuits
`Modern IC Fabrication
`
`Summary and Future Trends
`References
`
`Problems .
`
`Diagnostic Techniques
`R. B. Marcus
`
`Introduction
`
`Morphology Determination
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`Chemical Analysis
`
`Crystallographic Structure and Mechanical Properties
`
`Electrical Mapping
`Summary and Future Trends
`References
`
`Problems
`
`Chapter 13‘ Assembly Techniques and Packaging
`'
`C. A. Steidel
`‘
`
`13. 1
`
`Introduction
`
`13.2 Wafer Separation and Sorting
`13.3 Die Interconnection
`
`13.4 Package Types and Fabrication Technologies
`13.5
`Special Package Considerations
`
`13.6 Package Application Considerations
`13.7 Summary and Future Trends
`References
`Problems
`
`Chapter 14 Yield and Reliability
`W. J. Bertram
`
`14. 1
`
`Introduction
`
`14.2 Mechanisms of Yield Loss in VLSI
`
`14.3 Modeling of Yield Loss Mechanisms
`
`l4.4 Reliability Requirements for VLSI
`
`14.5 A Mathematics of Failure Distributions, Reliability,
`and Failure Rates
`
`14.6 Common Distribution Functions
`
`l4.7 Accelerated Testing
`14.8 Failure Mechanisms
`
`14.9 Summary and Future Trends
`References
`Problems
`
`Appendixes
`
`A Properties of Silicon
`
`B List of Symbols
`
`C International System of Units
`D Physical Constants
`
`Index
`
`
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`
`
`CHAPTISR
`ONE
`
`
`CRYSTAL GROWTH AND WAFER PREPARATION
`
`C. W.PEARCE
`
`INTRODUCTION
`
`_
`
`'
`
`. naturally occurring in the form of silica and silicates. is the most irrportant
`o
`for the electronics industry. Ar presem. silicon-based devices consti-
`- '
`_ over 98% of all sernioondoctor devices sold worldwide. Silicon is one of the most
`f
`'_ - -- cknnrtsinurcpcnodicralnc.A|ita'atueseamhonpd>lislierlpapcmusing
`‘_-~~ ca searchwordyieldsovcrlillllrclcrences. Appcnd.ixAisacompilation
`_
`some useful cortstants.” Silicon is also a commercially irwortant element for
`otlttzrmajor industries. suchasglzcsand gerrbtonus. 'l'hcmrnrncr'ci.nl valucof
`- derives in part from the utility of its mineral forms. which is thr: way silicon
`innature, and from its abundance. Silica is integral tothe nramrfacurreofglass
`related prtxlucls. while certain silicates art: highly valued as semiprccious gem-
`~ such as garnet. zircon. and jade. By weight it comprises 25% of the earth‘s
`and is second only to oxygen in arbundancc.
`A Although silicon is generally synonymous with the solid—statc era of electronics.
`5 fl the use of the term "silicon chip." its mineral forms were used in vacutrrn-tube
`_ - -«~ =1
`‘. (Silica was used for tube envelopes.) Mica. a silicate. found application
`_ Q insulator and capacitor dielectric. Quartz. another silicate. was and still is used
`' ‘ fi'equency-dctcrrnining element and in passiw: filter applications.
`" The advent of solid-stare electronics dates front the invention of the bipolar
`_ w- v effect by Bardeen. Brnttain. and Shockley.’ The technology progressed dur-
`early I950s. using germanium as the semiconducting material. However. gt-.r~
`proved ursuitablc in certain amlicatiom because of in; propensity to exhibit
`function leakage cun'¢ms. These currents result from genmnium's relatiwly nar-
`.&Idgap (0.66 cV). For this reason. silicon ( |.l cV) became a practical substitute
`
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`INTRODUCHON
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`TWO
`
`EPITAXY
`
`C. W. PEARCE
`
`5|
`
`
`
`and taxis. mean-
`' -y. a transliteration of two Gteel; words cpl‘. meaning
`‘ “otdcrcd," L: a term applied to ptocctezcs used to grow a tltin crystalline layer on
`'-
`~~ line substrate. In the epitaxial pmccss the substrate water acts as a seed crys-
`”_ Epitaxial [racemes are dilletentiatcd {mm the Czocllmlslti process described in
`'
`v
`I
`in that the crystal can he gmwn below the melting point. Most epitaxial
`. --v use cltetnicatl-vapor deposition (CVD) techniques. A diffctcnt approach is
`_ —- at beam epitaxy (MBE) which uses an evaporation method. These proccsws
`be described in Sections 2.2 and 2.3. tespectively. When a material is grown epi-
`' y on a substrate of the mime material. such as silicon gnvwn on silicon. the pro-
`'5 termed hotnoepitaxy. If the la)u and stllmmtc an: of differem nutteriztls. such
`\
`Al. (in. . , As on (iaAs. the pmccss is termed heteroepitaxy. l-lost-ever. in hetcm-
`-
`v y the ctystal structures of the layer and the substrate should be sitniliar if crys-
`~ growth is to be obtained.
`Silicon epitztxy was developed to enhance the performance of discrete bipolar
`' ~~~ ..' These transistors vtete fabricated in bulk wafers using its tuistivity to
`' nu '
`the bratltdown voltage of the collector. However. high breakdown vol-
`:
`-. neoesarily need high-resistivity material. This tequircmcnt coupled with the
`5
`- «v -. of the wafer results in excessive collector resislztttcc that
`limits high
`3
`-
`- -I
`tesponsc and increases pone! dissipation. Epitaxial growth of a high-
`"; '
`it)’ layer on a low-resistivity‘ substmte solwd this problem. Bipolar inlegtztlcd
`- A ' t utilize epitaxial structures in much the same way discrete tmnsistots (Fig. I)
`~ them. The substrate and epitaxial layer have opposite doping types to provide
`‘ . . . and at heavily doped diffusion la)et wants as a low—t'esistancc collector con-
`Unipolar devices such as the junction field-effect transistor (JFET) employ an
`‘ ~~° wat'et'asdoestheVMCEtechnology.’
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`GMPIHI
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`THREE
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`DlELECI'RlC AND POLYSILICON FILM DEPOSITION
`
`A. C. AD.-\IvL9
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`
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`93
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`IN'l'RODUCl'l0N
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`-» -an - films are widely used in the fabrication of modem VLSI circuits. These
`~ provide conducting regions within the device. electrical
`between
`‘ -~ and protection from the environment. Deposited filnrs nus: meet many
`‘
`.
`ts. The film thickness mus be uniform over each device and over the
`
`nnniherofwaferspruccssetlalouetinie. Thestmcturcandoompositionoftlie
`must be controlled and reproducible. Finally. the method for depositing the film
`_ be safe. repxtxhcible. easily automated. and inexpensive.
`‘ The most widely used materials are pol)\'r)'s1alline silicon. silicon dioxide.
`_ -~~ n e
`‘c silicon nitride. and plasrmuzlepositcd silicon nitride. The most com-
`deposition methods are zunxisflleric-ptesstne chemical vapor deposition (CVD),
`- a
`e chemical vapor deposition (LPCVD), and plasrna-assisted chemical
`- deposition (PCVD or plasma deposition). Several reviews of these materials
`p lteir preparation are available.‘ "
`Pobu)-stalliiie silicon. usually referred to as polysilicon. is prepared by pymly7.-
`illle at 600 to 650“C. Polysilicon is used m» the gate electrode material in MOS
`-« as a conducting material for multilevel mctalli7.-nion, and as a contact
`- '4 for devices with shallow junctions. Polysilieon is teunlly deposited without
`~ The doping elements. arsenic. phosphorus. or boron. an: added subsequent}-
`4'» -~- orion inpl.-imatiotL Thedoptuitscamalstibeaxltledthningdeposilion.
`’
`-
`is advantageous for some device structures. Polysilicon containing sewn! per-
`Iiuygen is a semi-insulatingimuerial that is used l'orcin:uit paesivation.
`Dielectric materials are used for imulation between conducting laycts, for diffu-
`pnd ion
`for diffusion from doped oxides. for capping doped
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`Ob\l'I‘l-It
`FOUR
`
`OXIDATION
`
`L. E. KATZ
`
`INTRODUCHON
`
`.
`_-
`
`
`
`oxidation of silicon is necessary during the entire process‘ of fahticating modem
`_
`A —.«-
`-- circuits. The production ofhigh-quality lCs mquircs not only an under-
`‘
`-« g of the basic oxidation mechanism. but the ability to form. in a controlled and
`- ~ v e manner. a high-quality oxide. In addition. to cnsun: the reliability of the
`_ thcclcctrical propertiesof the oxide must be understood.
`_ Silicon diootide hm several uses: to serve as a mask against implant ordiffusion
`’ dupant into silicon. to provide surface
`to isolate one device from
`_
`A
`-« [dielectric isolation as opposed tojunction isolation). toact as a component in
`_*- structures. and to provide electrical isolation of multilevel metallization sys-
`Scvcral techniques for forming the oxide layers have been developed suzh as
`oxidation. wet anodization. vapor phase technique [chemical vapor deposi-
`(CVD)]. and plasrna antxlization or oxidation. When the interface between the
`and the silicon is required to have a low charge density level. thcmtal oxidation
`been the preferred technique. However. since the masking oxide is generally
`~
`--
`this consideration is not as important in the case of masking against diffu-
`of dopam into silicon. Obviously when the oxide layer is required on top of a
`layer. as in the case of a multilevel metttllization smictune. the vapor phase
`' .
`is uniquely suited. This chapter concentrates on thcnnal silicon oxidation.
`.
`it is the principal technique used in IC pmoessing.
`II this chapter we describe the oxidation process to provide a foundation for
`‘- m ; the kinetics of growth and imetfacc pmpctties. Section 4.2 examines
`— ~- ‘on model and its fit to experimemal data: the effect oforientation. dopant
`- » ‘on, and H0 addition totheambientzandsurfacedarmgeonthekincticsof
`
`1‘
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`(‘HAP11~It
`FIVE
`
`DIFFUSION
`
`.I.C.C.‘l‘SAl
`
`' ODUCFION
`
`-._
`
`,
`
`_
`
`of impurity atoms in silicon is inpottam in VLSI proceming. The idea df
`. -m techniques lo alter the type of conductivity in silicon or gcnnanium
`-inapuenlin l9$2byPfann.' SinceIlIcn.variousidcascnlx7wtoinIm-
`-‘L into silicon by diffusion have [ten studied with the goals of controlling
`» concentration. uniformity. and mpromcibility. and of proccssing a largc
`_ddcVicc wafers in a batch to reduce the manufacturing costs.
`l:h'!l'usion is
`' form bases. emitters. and resistors in bipolar device Iodmology, to form
`;
`« drain regions, and lo dope polysilicon in MOS device technology. Dopant
`v-
`span a wide range of conccnu-ations can be introduced imo silicon
`__ thefollowing ways: llldiffusion fmmachemical source inavaporformau
`’ ~«v
`. (2) diffusion from a doped-oxide source. 0|’ (3) diffusion and
`" from an ion implanted layer. Annealing of ion implanted layers is for
`‘
`theimplmteda1omsandmrkicingdrccr)s1;ddarmgesfnxnioninq:la:Ia-
`
`
`
`~ provides more pmcisc conuol oflolal dopants from 10" cm": to greater
`cm”. in is used to replace the chemical or doped~oxide source when-.vcr
`(Ion implzmmion and annealing properties are discussed in Chapter 6.) Ion
`' is cxlensiwly applied in VLSI device fahriunion.
`- aspect of the study of diffusion anermts to develop inqatovod models
`
`- ..
`-.
`-. dam for predicting diffmion results from theoretical analysis. The
`‘pal ofdiffusion smdics E localeulale the clodrical cllarncteristics of a
`- - devioeftomthepmccssingpamnetess.
`l)ifi'usion1heoIieshavcb-cen
`* -. from two major approaches. namely. the cominuum theory of Fick's diffu-
`_ --- and the atomistic theory. which involves intuaclions between point
`169
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`('flAl’l‘Bl
`SIX
`
`
`ION IMPLANTATION
`
`T. E. SEIDEL
`
`' ODUCTION
`
`
`
`i
`
`.
`
`‘
`__
`
`.
`
`is the introduction of ionized-projectile atoms into mm with
`'- -
`z
`=
`-
`~
`energy to penetrate beyond surface
`The most common application is
`: of silicon dunng device fabrication.
`'l1re use of 3- to 5(1)-|r.eV energy for
`flzosphoms. or
`dopant ions is sufficient to implant the ions from about
`I0.(IX) Ii below the silicon surface. These depths place the atoms beyond any
`layess of 30-3 native S10; and therefore any barrier effect of the surface
`impurity introduction is avoided. The depth of itnplamation. which is
`poportional to the ion energy . can be selected to meet a particular application.
`major advantage of ion implantation technology is the capability of precisely
`the number of implar-wed doprmr atoms. Upon annealing the target (heat-
`ed ternper'amrusot' approximately 600to l(XX)"C)_. pwcisc dopant concen-
`-
`' between ID" to no?‘ mmvcnr‘ in silicon are obtained. Furthermore. the
`s depth distribution profile can be well controlled.
`
`‘of radiation damage effecu. and of ion cha.rlI:|ing2 was carried ouL Many
`induced point defects altemly were identified.’ aiding in a rapid understand-
`~ implantation phenomena. Device applications were also being reported in
`-
`- 19605. Variable-capacitance p-n junction diodes lvaractolsi with rapidly
`' doping concentrations and the first implanted self-aligned MOS transistor
`n A metal gates‘ were reported by 1968.
`
`
`2|!
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`CHAPIBI
`EIGHT
`
`DRY ETCHING
`
`(T. J. MOGAB
`
`—-v-uw—_
`
`IN'lRODUCI'[ON
`
`‘
`.
`
`patterns defined by the lithographic techniques described in Chapter 7 are not
`- -v '-
`elements of the final device but only replicas ofcircuit features. To pm-
`_ circuit features. thcsc ncsist patients must be tramfcrretl into the layers compris-
`Iic device. One method of tmnsfcrring the patterns is to sclcctisely remove
`.~-
`- portions ofa layer, a process generally known as etching.
`the title of this chapter suggests. "dry etching" methods are particularly suit-
`’_
`. it VLSI processing. Dry etching is synonymous with plasnia-assisted etching‘
`dcnotesscseral tedIniquesthattrscplasrmsinthet‘ormnflnvw-prcwnegas-
`_ c - , 5. These techniqttcsarccmnmnnlyttsed inVl.Sl processing bccauscof
`-
`-
`-
`'al for very»high-fidelity uanslerof resist patterns.
`earliest
`of plasmas to silicon lCs dates back to the late |96(k.
`oxygen plasmas were being explored for the stripping of photorcsists.’ Work on
`‘A « of plasmas for etching silicon was aL9o initiated in the lane l960s and was sig-
`hya patt:nr‘dctailing the use MG’;-O; gas rnixturts. At that time. there wmi
`V
`- v endorsement of thy methods which were largely ncwcl replacements for
`_ wet chcrniml techniques.
`' early work set the stage for an important period in the evolution of IC tech-
`V . Frorn I972 to I974. workers at several major laboratories were heavily
`L -« in the devdopment of an inorganic ptissivation layer for M()S dcviccs. ‘lite
`W passivntion turned out to be a plasma-deposited silicon nitride layer. While
`--— exhibited many desirable characteristics. there was one inlnediatc diffi-
`v suitdale wet chenicnl ctchant could he found to etch windows in the nitride
`to expmc underlying metallization for subsequent bonding.
`'lhis pmhlcm
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`b
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`
`OIAPIEI
`ELEVEN
`
`
`VLSI PROCESS INTEGRATION
`
`L. C. PARRILLO
`
`I INTRODUCTION
`
`:integrated circuit (IC) was invented by Kilby' in I958. The first ICs were phase-
`t oscillators and flip-flops, fabricated in germanium substrates. The individual
`qaonents in these circuits were isolated in mesa-shaped regions which had been
`Iedinthesti)stratebyusingb|ac|twax(applicdbyhand)tomasktheactivc
`bits. The individual devices were interconnected by wire bonding. Thenr: first
`king units were used for the first public announcement‘ of the “Solid Circuit"
`egated circuit) concept in March 1959. Other critical developments around the
`it time included the first modern diffused bipolar transistor by lIoemi.' This
`sisorwa<bawcdmdteplmurdiffilsedprtxess,acomustoneofnndemlCfahri-
`on, which uses silicon dioxide as a barrier to impurity diflhsion. In I958 a parent
`gfilcd on the finzt use ofp-njunctiorts folrdevice isolaion and in 1959:: patent was
`_Ifor an IC that used evaporated aluminum metallizution ovct an oxide layer to
`iide interconnections.'
`"thorn these early primitive foam. lCs have evolved into complex electronic de-
`'I containing hundreds of thousands of individual components on a single chip of
`in 11» ms: lCs were based on contributions from many differun fields includ-
`physics. nuterials science. and chemistry. Interdisciplinary contributions
`glue tobcsoughttodayinthedeveloprnentofncw lCtechno|ogies.
`_&nccthenxletixnponantpanofthelCistlietnrrsL:tor. thischaptcrfocuscson
`techniques which are used to optimize its characteristics. The rmjor IC
`discmased are standard bipolar (n—p-n). imcgmted injection logic (I1 L),
`_iIlel MOS (NMOS). and complementary MOS (CMOS). Table I givrs a gen-
`
`rsi comparison of these various devices as integxated transistors.’ We assume445
`
`l
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