`anticipates claims 1, 4, and 5 of the ʼ552 Patent under 35 U.S.C. § 102
`
`
`Prior Art Cited in this Chart:
`The Admitted Prior Art of the ʼ552 Patent (“APA”)
`
`
`Claim Language
`Claim 1
`A structure, comprising:
`
`APA
`
`“The etch stop layer 125 permits subsequent etching of the
`substrate without risk of exposing the device structures and
`layers because the device structuring and layers are
`protected from excessive etching by the etch stop layer
`125.”
`Column 4, lines 13-17.
`
`Figure 1(B) (Prior Art)
`
`
`
`
`“The self-aligned contact 130 is separated from a
`conducting polysilicon layer 110 by an encapsulating
`dielectric layer 120 such that the contact 130 can also
`overlap the polysilicon layer 110 without making electrical
`contact to the layer 110 or gate.”
`Column 4, lines 3-7.
`
`Figure 1(B) (Prior Art)
`
`
`
`a conductive layer disposed over
`a substrate;
`
`Petitioner Hynix - HYNIX-1011
`
`1
`
`
`
`Claim Language
`
`
`
`APA
`
`a first insulating layer on the
`conductive layer:
`
`
`
`
`“The self-aligned contact 130 is separated from a
`conducting polysilicon layer 110 by an encapsulating
`dielectric layer 120 such that the contact 130 can also
`overlap the polysilicon layer 110 without making electrical
`contact to the layer 110 or gate.”
`Column 4, lines 3-7.
`
`Figure 1(B) (Prior Art)
`
`a contact region in said first
`insulating layer;
`
`
`“The self-aligned contact 130 is separated from a
`conducting polysilicon layer 110 by an encapsulating
`dielectric layer 120 such that the contact 130 can also
`overlap the polysilicon layer 110 without making electrical
`contact to the layer 110 or gate.”
`Column 4, lines 3-7.
`
`Figure 1(B) (Prior Art)
`
`
`2
`
`
`
`Claim Language
`
`
`
`APA
`
`at least one insulating spacer in
`the contact region adjacent to the
`first insulating layer; and
`
`
`
`
`“The polysilicon layer 110 is separated from the
`source/drain diffusion region 140 by a dielectric spacer or
`shoulder 150 of the same or different dielectric material as
`the dielectric layer 120 directly above the conducting
`polysilicon layer 110.”
`Column 4, lines 7-11.
`
`Figure 1(B) (Prior Art)
`
`an etch stop material over said
`first insulating layer and adjacent
`to the insulating spacer, the etch
`stop material being a different
`material from the insulating
`spacer,
`
`
`
`
`“A distinct dielectric etch stop layer 125 overlies the
`encapsulating dielectric layer 120. The etch stop layer 125
`permits subsequent etching of the substrate without risk of
`exposing the device structures and layers because the device
`structuring and layers are protected from excessive etching
`by the etch stop layer 125.”
`Column 4, lines 12-17.
`
`The APA also discloses that the dielectric spacer or should
`150 can be “the same or different dielectric material as the
`
`3
`
`
`
`Claim Language
`
`APA
`dielectric layer 120 directly above the conducting
`polysilicon layer 110.”
`Col. 4, lines 8-11.
`
`Figure 1(B) (Prior Art)
`
`
`Figure 1(B) (Prior Art)
`
`
`
`
`wherein a side of the insulating
`spacer has an angle relative to the
`substrate surface that is either a
`right angle or an acute angle of
`more than 85°.
`
`
`Figure 1(B) (Prior Art)
`
`
`
`Claim 4
`The structure of claim 1, wherein
`the insulating spacer has a surface
`portion in the contact region
`without overlying etch stop
`material.
`
`4
`
`
`
`Claim Language
`
`
`
`APA
`
`
`
`
`
`
`
`
`Figure 1(B) (Prior Art)
`
`
`Claim 5
`The structure of claim 4, wherein
`the insulating spacer surface
`portion without overlying etch
`stop material comprises an
`insulating spacer surface portion
`most distant from said substrate.
`
`
`
`
`
`
`
`5
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