Paper 8
`Trials@uspto.gov
`Entered: April 21, 2016
`
`571–272–7822
`UNITED STATES PATENT AND TRADEMARK OFFICE
`_______________
`
`BEFORE THE PATENT TRIAL AND APPEAL BOARD
`_______________
`
`MICRON TECHNOLOGY, INC.,
`Petitioner,
`
`v.
`
`LIMESTONE MEMORY SYSTEMS LLC,
`Patent Owner.
`_______________
`
`Case IPR2016-00096
`Patent 6,233,181 B1
`_______________
`
`
`
`Before BART A. GERSTENBLITH, BARBARA A. PARVIS, and
`ROBERT J. WEINSCHENK, Administrative Patent Judges.
`
`WEINSCHENK, Administrative Patent Judge.
`
`DECISION
`Institution of Inter Partes Review
`37 C.F.R. § 42.108
`
`
`
`
`
`
`
`Trials@uspto.gov
`Entered: April 21, 2016
`
`571–272–7822
`UNITED STATES PATENT AND TRADEMARK OFFICE
`_______________
`
`BEFORE THE PATENT TRIAL AND APPEAL BOARD
`_______________
`
`MICRON TECHNOLOGY, INC.,
`Petitioner,
`
`v.
`
`LIMESTONE MEMORY SYSTEMS LLC,
`Patent Owner.
`_______________
`
`Case IPR2016-00096
`Patent 6,233,181 B1
`_______________
`
`
`
`Before BART A. GERSTENBLITH, BARBARA A. PARVIS, and
`ROBERT J. WEINSCHENK, Administrative Patent Judges.
`
`WEINSCHENK, Administrative Patent Judge.
`
`DECISION
`Institution of Inter Partes Review
`37 C.F.R. § 42.108
`
`
`
`
`
`
`
`
`IPR2016-00096
`Patent 6,233,181 B1
`
`
`I. INTRODUCTION
`Micron Technology, Inc. (“Petitioner”) filed a Petition (Paper 1,
`“Pet.”) requesting an inter partes review of claims 1–7 of U.S. Patent
`No. 6,233,181 B1 (Ex. 1001, “the ’181 patent”). Limestone Memory
`Systems LLC (“Patent Owner”) filed a Preliminary Response (Paper 6,
`“Prelim. Resp.”) to the Petition. An inter partes review may not be
`instituted “unless . . . there is a reasonable likelihood that the petitioner
`would prevail with respect to at least 1 of the claims challenged in the
`petition.” 35 U.S.C. § 314(a).
`For the reasons set forth below, Petitioner demonstrates a reasonable
`likelihood of prevailing in showing the unpatentability of claims 1, 2, 4, 6,
`and 7 of the ’181 patent, but does not demonstrate a reasonable likelihood of
`prevailing in showing the unpatentability of claims 3 and 5 of the
`’181 patent. Accordingly, we institute an inter partes review as to claims 1,
`2, 4, 6, and 7 of the ’181 patent on the grounds specified below.
`Related Proceedings
`A.
`The parties indicate that the ’181 patent is the subject of several cases
`in the United States District Court for the Central District of California.
`Pet. 2–3; Paper 5, 2–3. The parties also indicate that the following petitions
`for inter partes review are related to this case:
`Case No.
`Involved U.S. Patent No.
`IPR2016-00093
`U.S. Patent No. 5,805,504
`IPR2016-00094
`U.S. Patent No. 5,894,441
`IPR2016-00095
`U.S. Patent No. 5,943,260
`IPR2016-00097
`U.S. Patent No. 6,697,296
`Pet. 3; Paper 5, 2.
`
`2
`
`
`
`IPR2016-00096
`Patent 6,233,181 B1
`
`
`
`
`The ’181 Patent
`B.
`The ’181 patent relates to repairing defective memory cells in a
`semiconductor memory device. Ex. 1001, col. 1, ll. 9–13. The ’181 patent
`explains that, when a memory cell becomes defective, it can be replaced
`with a spare memory cell. Id. at col. 1, ll. 15–18. According to the
`’181 patent, prior semiconductor memory devices contained an array of
`spare memory cells for each memory block in the device, and, as a result, the
`spare memory cells were not used efficiently. Id. at col. 3, l. 58–col. 4, l. 8.
`To address this problem, the ’181 patent describes a semiconductor memory
`device with an array of spare memory cells that can be shared among a
`plurality of memory blocks. Id. at col. 16, ll. 31–39.
`Illustrative Claim
`C.
`Claim 1 is independent and is reproduced below.
`1. A semiconductor memory device, comprising:
`a plurality of first memory blocks each having a plurality
`of first normal memory cells arranged in a matrix of rows and
`columns, each of said plurality of first memory blocks
`including word lines provided corresponding to said rows,
`respectively, and the first memory blocks aligned in the column
`direction; and
`a plurality of first spare memory cells arranged in a
`matrix of rows and columns in a particular one of said plurality
`of first memory blocks, each row of said plurality of first spare
`memory cells being capable of replacing a defective row
`including a defective first normal memory cell in said plurality
`of first memory blocks.
`Ex. 1001, col. 45, l. 55–col. 46, l. 8.
`Evidence of Record
`D.
`Petitioner relies on the following references and declaration (see
`Pet. 4–5):
`
`3
`
`
`
`Exhibit No.
`Ex. 1005
`
`Ex. 1010
`
`Reference or Declaration
`U.S. Patent No. 5,487,040 (issued Jan. 23, 1996)
`(“Sukegawa”)
`U.S. Patent No. 4,967,397 (issued Oct. 30, 1990) (“Walck”) Ex. 1006
`Declaration of R. Jacob Baker, Ph.D. (“Baker Declaration”) Ex. 1007
`Betty Prince, Semiconductor Memories: A Handbook of
`Ex. 1009
`Design, Manufacture, and Application (2d ed. 1992)
`(“Prince”)
`U.S. Patent No. 5,355,339 (issued Oct. 11, 1994) (“Oh”)
`Asserted Grounds of Unpatentability
`E.
`Petitioner asserts that the challenged claims are unpatentable on the
`following grounds (see Pet. 4–5):
`Claim(s)
`Basis
`1, 2, and 6
`35 U.S.C. § 103(a)
`3
`35 U.S.C. § 103(a)
`4
`35 U.S.C. § 103(a)
`5
`35 U.S.C. § 103(a)
`7
`35 U.S.C. § 103(a)
`II. ANALYSIS
`A. Claim Construction
`The claims of an unexpired patent are interpreted using the broadest
`reasonable interpretation in light of the specification of the patent in which
`they appear. 37 C.F.R. § 42.100(b); In re Cuozzo Speed Techs., LLC, 793
`F.3d 1268, 1278–79 (Fed. Cir. 2015), cert. granted sub nom. Cuozzo Speed
`Techs., LLC v. Lee, 136 S. Ct. 890 (mem.) (2016). Petitioner proposes
`construing the following claim terms: “word lines,” “spare memory cells,”
`and “sense amplifier bands.” Pet. 12–15. Patent Owner argues that there is
`no controversy regarding those claims terms, and, thus, no construction is
`necessary at this stage of the proceeding. Prelim. Resp. 7–12. On this
`record and for purposes of this decision, we agree with Patent Owner and
`
`Reference(s)
`Sukegawa
`Sukegawa and Prince
`Sukegawa and Prince
`Sukegawa and Walck
`Sukegawa and Oh
`
`IPR2016-00096
`Patent 6,233,181 B1
`
`
`4
`
`
`
`IPR2016-00096
`Patent 6,233,181 B1
`
`determine that no claim terms require express construction. See Vivid
`Techs., Inc. v. Am. Sci. & Eng’g, Inc., 200 F.3d 795, 803 (Fed. Cir. 1999)
`(“[O]nly those terms need be construed that are in controversy, and only to
`the extent necessary to resolve the controversy.”).
`Asserted Grounds of Unpatentability
`B.
`Level of Ordinary Skill in the Art
`1.
`Petitioner’s declarant, Dr. R. Jacob Baker, testifies that a person of
`ordinary skill in the art at the time of the ’181 patent “would have had a
`bachelor’s degree in computer engineering, electrical engineering, computer
`science, or a closely related field, along with at least 2–3 years of experience
`in the development and use of memory devices and systems.” Ex. 1007
`¶ 17. Dr. Baker also explains that “[a]n individual with an advanced degree
`in a relevant field, such as computer or electrical engineering, would require
`less experience in the development and use of memory devices and
`systems.” Id. Patent Owner argues that Dr. Baker has substantially more
`experience than a person of ordinary skill in the art. Prelim. Resp. 5. Patent
`Owner, however, does not identify any precedent indicating that Dr. Baker
`cannot testify about the level of ordinary skill in the art simply because he
`may possess a higher level of skill in the art. Id. Therefore, on this record
`and for purposes of this decision, we credit Dr. Baker’s testimony regarding
`the level of ordinary skill in the art.
`Obviousness of Claims 1, 2, and 6 over Sukegawa
`2.
`Petitioner argues that claims 1, 2, and 6 would have been obvious over
`Sukegawa. Pet. 4. We have reviewed Petitioner’s assertions and supporting
`evidence, and, for the reasons discussed below, Petitioner demonstrates a
`
`5
`
`
`
`IPR2016-00096
`Patent 6,233,181 B1
`
`reasonable likelihood of prevailing in showing that claims 1, 2, and 6 would
`have been obvious over Sukegawa. See id. at 21–39.
`Claim 1 recites “a plurality of first memory blocks each having a
`plurality of first normal memory cells arranged in a matrix of rows and
`columns, each of said plurality of first memory blocks including word lines
`provided corresponding to said rows, respectively, and the first memory
`blocks aligned in the column direction.” Ex. 1001, col. 45, l. 56–col. 46,
`l. 2. Petitioner identifies evidence indicating that memory blocks 100, 104,
`108, and 112 in Figure 8 of Sukegawa are a plurality of first memory blocks
`each having a plurality of normal memory cells arranged in a matrix of rows
`and columns. Pet. 22–28 (citing Ex. 1005, col. 1, ll. 39–54, col. 4, ll. 45–63,
`Figs. 1, 2, 8). Petitioner also identifies evidence indicating that memory
`blocks 100, 104, 108, and 112 are aligned in the column direction and
`include word lines corresponding to rows. Pet. 24–29 (citing Ex. 1005,
`col. 1, ll. 55–64, Figs. 1, 2, 8). On this record, Petitioner has shown
`sufficiently that Sukegawa teaches the above limitation of claim 1.
`Claim 1 also recites “a plurality of first spare memory cells arranged
`in a matrix of rows and columns in a particular one of said plurality of first
`memory blocks, each row of said plurality of first spare memory cells being
`capable of replacing a defective row including a defective first normal
`memory cell in said plurality of first memory blocks.” Ex. 1001, col. 46,
`ll. 3–8. Petitioner identifies evidence indicating that each of memory blocks
`100, 104, 108, and 112 contains a redundant row of memory cells that is
`capable of replacing a defective row of memory cells in that memory block
`or any of the other memory blocks. Pet. 30–32 (citing Ex. 1005, col. 2,
`
`6
`
`
`
`IPR2016-00096
`Patent 6,233,181 B1
`
`ll. 21–59, col. 3, ll. 34–43, Fig. 8). On this record, Petitioner has shown
`sufficiently that Sukegawa teaches the above limitation of claim 1.
`
`Claims 2 and 6 depend from independent claim 1. Ex. 1001, col. 46,
`ll. 9–23, col. 46, ll. 51–54. Petitioner identifies evidence indicating that
`Sukegawa teaches the limitations of dependent claims 2 and 6. Pet. 32–39.
`On this record, Petitioner has shown sufficiently that Sukegawa teaches the
`limitations of claims 2 and 6.
`Obviousness of Claim 3 over Sukegawa and Prince
`3.
`Petitioner argues that claim 3 would have been obvious over
`Sukegawa and Prince. Pet. 4–5. We have reviewed Petitioner’s assertions
`and supporting evidence, and, for the reasons discussed below, Petitioner
`does not demonstrate a reasonable likelihood of prevailing in showing that
`claim 3 would have been obvious over Sukegawa and Prince.
`Claim 3 recites “a plurality of sense amplifier bands provided between
`each of said plurality of first memory blocks and each of said second
`memory blocks, and shared by adjacent memory blocks in the column
`direction for sensing and amplifying data in each column of the adjacent
`memory block including a selected memory cell when activated.” Ex. 1001,
`col. 46, ll. 24–31. Petitioner argues that Figure 1 of Sukegawa shows a
`plurality of sense amplifier bands provided between each of the plurality of
`first and second memory blocks. Pet. 39–40 (citing Ex. 1005, Fig. 1).
`Figure 1 of Sukegawa does not show the boundaries of the memory blocks,
`and, thus, does not show whether the sense amplifier bands are provided
`between each of the memory blocks. Ex. 1005, Fig. 1. As a result,
`Petitioner annotates Figure 1 to show what Petitioner believes are the
`boundaries of the memory blocks with respect to the sense amplifier bands.
`
`7
`
`
`
`IPR2016-00096
`Patent 6,233,181 B1
`
`Pet. 39–40. Petitioner, however, does not provide an explanation or identify
`evidence that supports Petitioner’s annotations to Figure 1, beyond including
`the same annotations as part of Appendix A of the Baker Declaration.1 Id.;
`Ex. 1007, A-30–A-32. Thus, on this record, Petitioner has not shown
`sufficiently that Sukegawa teaches a plurality of sense amplifier bands
`provided between each of the plurality of first and second memory blocks.
`Petitioner argues that Figure 6.25(b) of Prince shows a sense amplifier
`that is shared by adjacent memory blocks. Pet. 41–42 (citing Ex. 1009, 47–
`48, Fig. 6.25(b)). Figure 6.25(b) of Prince does not show the boundaries of
`the memory blocks, and, thus, does not show whether the sense amplifier is
`shared by adjacent memory blocks. Ex. 1009, Fig. 6.25(b). As a result,
`Petitioner annotates Figure 6.25(b) to show what Petitioner believes are the
`boundaries of the memory blocks with respect to the sense amplifier.
`Pet. 41–42. Petitioner, however, does not provide an explanation or identify
`evidence that supports Petitioner’s annotations to Figure 6.25(b). Id.
`Petitioner points out that Prince teaches that “[a]djacent segments were
`grouped into pairs of open bit-lines to form eight memory blocks of 128k
`bits each.” Id. at 41 (citing Ex. 1009, 47). Petitioner does not explain,
`though, why that teaching in Prince shows that the bit lines in Figure 6.25(b)
`are in adjacent memory blocks, rather than the same memory block. Pet.
`
`
`1 Further, Patent Owner calls into question Petitioner’s annotations by
`arguing that the sense amplifier bands in Sukegawa actually are provided
`within each of the memory blocks, not between each of the memory blocks.
`Prelim. Resp. 16–19 (citing Ex. 1005, col. 1, ll. 39–44, Fig. 1). Patent
`Owner’s argument highlights the deficiency in Petitioner’s position because
`Petitioner did not provide an explanation as to why we should interpret
`Sukegawa in the manner presented by Petitioner.
`
`8
`
`
`
`IPR2016-00096
`Patent 6,233,181 B1
`
`41–42. Thus, on this record, Petitioner has not shown sufficiently that
`Prince teaches a sense amplifier band shared by adjacent memory blocks.
`For the reasons discussed above, Petitioner does not demonstrate a
`reasonable likelihood of prevailing in showing that claim 3 would have been
`obvious over Sukegawa and Prince.
`Obviousness of Claim 4 over Sukegawa and Prince
`4.
`Petitioner argues that claim 4 would have been obvious over
`Sukegawa and Prince. Pet. 5. Claim 4 recites “the first memory blocks and
`the second memory blocks share a circuit related to a memory cell selection
`operation.” Ex. 1001, col. 46, ll. 32–35. Petitioner identifies evidence
`indicating that Prince teaches a column decoder shared by multiple memory
`blocks, and articulates a reason why it would have been obvious to combine
`the cited teachings of Prince with the cited teachings of Sukegawa. Pet. 44–
`47 (citing Ex. 1007 ¶ 23; Ex. 1009, 47). Therefore, on this record, Petitioner
`demonstrates a reasonable likelihood of prevailing in showing that claim 4
`would have been obvious over Sukegawa and Prince.
`Obviousness of Claim 5 over Sukegawa and Walck
`5.
`Petitioner argues that claim 5 would have been obvious over
`Sukegawa and Walck. Pet. 5. Claim 5 depends from claim 3. Ex. 1001,
`col. 46, ll. 36–50. As discussed above, Petitioner does not demonstrate a
`reasonable likelihood of prevailing in showing that claim 3 would have been
`obvious over Sukegawa and Prince. See supra Section II.B.2. Petitioner
`does not argue that Walck compensates for any of the deficiencies noted
`above with respect to Sukegawa and Prince. See Pet. 49–52. Therefore, for
`the same reasons discussed above with respect to claim 3, Petitioner does not
`
`9
`
`
`
`IPR2016-00096
`Patent 6,233,181 B1
`
`demonstrate a reasonable likelihood of prevailing in showing that claim 5
`would have been obvious over Sukegawa and Walck.
`Obviousness of Claim 7 over Sukegawa and Oh
`6.
`Petitioner argues that claim 7 would have been obvious over
`Sukegawa and Oh. Pet. 5. Claim 7 recites “the first memory blocks other
`than said particular one has no first spare memory cells.” Ex. 1001, col. 46,
`ll. 55–57. Petitioner identifies evidence indicating that Oh teaches providing
`spare memory cells in only one memory block and using those spare
`memory cells to replace defective memory cells in other memory blocks.
`Pet. 53–55 (citing Ex. 1010, col. 6, ll. 19–33). Petitioner also articulates a
`reason why it would have been obvious to combine the cited teachings of Oh
`with the cited teachings of Sukegawa. Pet. 56. Therefore, on this record,
`Petitioner demonstrates a reasonable likelihood of prevailing in showing that
`claim 7 would have been obvious over Sukegawa and Oh.
`III. CONCLUSION
`Petitioner demonstrates a reasonable likelihood of prevailing in
`showing the unpatentability of claims 1, 2, 4, 6, and 7 of the ’181 patent, but
`does not demonstrate a reasonable likelihood of prevailing in showing the
`unpatentability of claims 3 and 5 of the ’181 patent. At this stage in the
`proceeding, we have not made a final determination with respect to the
`patentability of any of the challenged claims.
`IV. ORDER
`In consideration of the foregoing, it is hereby:
`ORDERED that, pursuant to 35 U.S.C. § 314(a), an inter partes
`
`review is hereby instituted as to claims 1, 2, 4, 6, and 7 of the ’181 patent on
`the following grounds:
`
`10
`
`
`
`IPR2016-00096
`Patent 6,233,181 B1
`
`
`A. Claims 1, 2, and 6 as unpatentable under 35 U.S.C. § 103(a) as
`obvious over Sukegawa;
`Claim 4 as unpatentable under 35 U.S.C. § 103(a) as obvious
`B.
`over Sukegawa and Prince; and
`Claim 7 as unpatentable under 35 U.S.C. § 103(a) as obvious
`C.
`over Sukegawa and Oh;
`FURTHER ORDERED that, pursuant to 35 U.S.C. § 314(a), an inter
`partes review of the ʼ181 patent is hereby instituted commencing on the
`entry date of this Order, and, pursuant to 35 U.S.C. § 314(c) and 37 C.F.R.
`§ 42.4, notice is hereby given of the institution of a trial; and
`
`FURTHER ORDERED that the trial is limited to the grounds
`identified, and no other grounds are authorized.
`
`
`
`11
`
`
`
`IPR2016-00096
`Patent 6,233,181 B1
`
`PETITIONER:
`
`Jeremy Jason Lang
`Justin L. Constant
`WEIL, GOTSHAL & MANGES LLP
`
`jason.lang@weil.com
`justin.constant@weil.com
`
`PATENT OWNER:
`
`Nicholas T. Peters
`Paul B. Henkelmann
`FITCH EVEN TABIN & FLANNERY LLP
`
`ntpete@fitcheven.com
`LimestoneIPR@fitcheven.com
`
`12
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