Paper No. _____
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`UNITED STATES PATENT AND TRADEMARK OFFICE
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`________________________
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`BEFORE THE PATENT TRIAL AND APPEAL BOARD
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`________________________
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`Linear Technology Corporation
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`Petitioner
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`v.
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`In-Depth Test LLC
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`Patent Owner
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`Case No. IPR Unassigned
`Patent No. 6,792,373
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`________________________
`
`
`PETITION FOR INTER PARTES REVIEW OF
`U.S. PATENT NO. 6,792,373
`UNDER 35 U.S.C. §§ 311-319 AND 37 C.F.R. §§ 42.1-42.80, 42.100-42.123
`________________________
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`__________________________________________________________________
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`Mail Stop PATENT BOARD
`Patent Trial and Appeal Board
`U.S. Patent and Trademark Office
`P.O. Box 1450
`Alexandria, VA 22313-1450
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`
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`UNITED STATES PATENT AND TRADEMARK OFFICE
`
`________________________
`
`BEFORE THE PATENT TRIAL AND APPEAL BOARD
`
`________________________
`
`Linear Technology Corporation
`
`Petitioner
`
`v.
`
`In-Depth Test LLC
`
`Patent Owner
`
`Case No. IPR Unassigned
`Patent No. 6,792,373
`
`________________________
`
`
`PETITION FOR INTER PARTES REVIEW OF
`U.S. PATENT NO. 6,792,373
`UNDER 35 U.S.C. §§ 311-319 AND 37 C.F.R. §§ 42.1-42.80, 42.100-42.123
`________________________
`
`
`__________________________________________________________________
`
`
`Mail Stop PATENT BOARD
`Patent Trial and Appeal Board
`U.S. Patent and Trademark Office
`P.O. Box 1450
`Alexandria, VA 22313-1450
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`U.S. Patent No. 6,792,373
`Petition for Inter Partes Review
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`INTRODUCTORY STATEMENT .......................................................................... 1
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`I.
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`COMPLIANCE WITH REQUIREMENTS FOR A PETITION FOR
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`INTER PARTES REVIEW .............................................................................. 1
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`A. Grounds for Standing (37 C.F.R. § 42.104(a)) .................................... 1
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`B.
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`Payment of Fees (37 C.F.R. § 42.103) ................................................. 2
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`C. Mandatory Notices (37 C.F.R. § 42.8(a)(1)) ........................................ 2
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`(a) Real Party-In-Interest (37 C.F.R. § 42.8(b)(1)) ......................... 2
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`(b) Related Matters (37 C.F.R. § 42.8(b)(2)) .................................. 2
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`(c)
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`(d)
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`Lead and Back-Up Counsel (37 C.F.R. § 42.8(b)(3)) ............... 3
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`Service Information (37 C.F.R. § 42.8(b)(4)) ............................ 4
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`II.
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`STATEMENT OF THE PRECISE RELIEF REQUESTED ......................... 4
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`III.
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`SUMMARY OF PRIOR ART PRESENTED BY PETITIONER ................. 5
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`A. U.S. Patent No. 4,967,381 to Lane et al. .............................................. 5
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`B. Western Electric Co., STATISTICAL QUALITY CONTROL
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`HANDBOOK ........................................................................................... 5
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`IV. THE ’373 PATENT ........................................................................................ 5
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`A.
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`B.
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`The Filing Date of the ‘373 Patent ....................................................... 5
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`Overview of the ’373 Patent ................................................................. 6
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`V.
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`PERSON OF ORDINARY SKILL IN THE ART ......................................... 9
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`U.S. Patent No. 6,792,373
`Petition for Inter Partes Review
`VI. CLAIM CONSTRUCTION (37 C.F.R. §§ 42.104(B)(3)) ............................. 9
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`A.
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`B.
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`C.
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`D.
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`E.
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`F.
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`G.
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`H.
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`“outlier” .............................................................................................. 10
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`“test data” ........................................................................................... 10
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`“output report” .................................................................................... 10
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`“run time” ........................................................................................... 11
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`“component” ....................................................................................... 11
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`“recipe file” ........................................................................................ 12
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`“section group of components on a wafer” ........................................ 13
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`“correlate/correlating the test data” (claims 5, 12, and 20) ................ 13
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`VII.
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`IDENTIFICATION OF THE CHALLENGE (37 C.F.R. § 42.104(B)) ...... 13
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`A.
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`The Applied References ...................................................................... 13
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`(a)
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`Lane - U.S. Patent No. 4,967,381 ............................................ 13
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`(a) Western Electric Co., STATISTICAL QUALITY CONTROL
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`HANDBOOK ............................................................................... 21
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`B.
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`All Independent Claims are Unpatentable ......................................... 27
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`(a)
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`(b)
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`(c)
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`Independent claim 1 is unpatentable ........................................ 27
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`Independent claim 8 is unpatentable ........................................ 42
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`Independent claim 15 is unpatentable ...................................... 45
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`C.
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`All Dependent Claims are Unpatentable ........................................... 48
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`(a) Dependent claims 2, 9, 16 ........................................................ 48
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`ii
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`U.S. Patent No. 6,792,373
`Petition for Inter Partes Review
`(b) Dependent claims 3, 10, and 17 ............................................... 51
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`(c) Dependent claims 4, 11, and 18 ............................................... 53
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`(d) Dependent claims 5, 12, and 20 ............................................... 54
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`(e) Dependent claims 6 and 13 ...................................................... 55
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`(f) Dependent claims 7, 14, and 19 ............................................... 58
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`VIII. CONCLUSION ............................................................................................. 60
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`IX. PRAYER FOR RELIEF ............................................................................... 60
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`CERTIFICATE OF SERVICE ............................................................................... 61
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`iii
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`U.S. Patent No. 6,792,373
`Petition for Inter Partes Review
`INTRODUCTORY STATEMENT
`
`Linear Technology Corporation (“Petitioner”) in accordance with 35 U.S.C.
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`§§ 311 – 319 and 37 C.F.R. §§ 42.1-.80, 42.100-42.123, respectfully requests inter
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`partes review for Claims 1-20 of U.S. Patent No. 6,792,373 (the “’373 Patent”).
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`Petitioner seeks review and cancellation of all 20 claims of the ’373 Patent.
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`All claims of the ’373 Patent are anticipated under U.S.C. § 102(b) by U.S.
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`Patent No. 4,967,381 (“Lane”). Alternatively, all the claims are unpatentable as
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`obvious under 35 U.S.C. § 103 in view of Lane., or at minimum unpatentable as
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`obvious in view of Lane and Western Electric Co., STATISTICAL QUALITY
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`CONTROL HANDBOOK (Delmar Printing Co., 1956) (“Western”), which is
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`incorporated by reference in Lane.
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`I.
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`Compliance With Requirements for A Petition For Inter Partes Review
`A. Grounds for Standing (37 C.F.R. § 42.104(a))
`Petitioner certifies that (1) the ’373 Patent is available for inter partes
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`review, and that (2) Petitioner is not barred or estopped from requesting inter
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`partes review challenging the identified claims. Petitioner has submitted this
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`Petition within one year of having been served with an infringement complaint by
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`the patent owner. 37 U.S.C. § 315(b). A true copy of the Proof of Service of
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`Summons and Complaint, showing the date of service of September 29, 2014 is
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`submitted herewith. (Exhibit 1004.) The ’373 Patent has not been the subject of a
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`prior inter partes review that was instituted. Petitioner has not filed a civil action
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`1
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`
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`U.S. Patent No. 6,792,373
`Petition for Inter Partes Review
`challenging the validity of a claim of the ’373 Patent. 37 U.S.C. § 315(a).
`
`Payment of Fees (37 C.F.R. § 42.103)
`
`B.
`The required fees are submitted with this petition. The Director may charge
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`any fee deficiency or credit any overpayment to Deposit Account No. 500417.
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`C. Mandatory Notices (37 C.F.R. § 42.8(a)(1))
`(a) Real Party-In-Interest (37 C.F.R. § 42.8(b)(1))
`Linear Technology Corporation is the real party in interest.
`
`(b) Related Matters (37 C.F.R. § 42.8(b)(2))
`The ’373 Patent is owned by a Patent Assertion Entity, which has asserted it
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`in five co-pending litigations filed in 2014 in Delaware: In-Depth Test LLC v.
`
`Intersil Corp., Case No. 1-14-cv-00886 (D. Del. Jul. 8, 2014); In-Depth Test LLC
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`v. Maxim Integrated Prods., Inc., Case No. 1-14-cv-00887 (D. Del. Jul. 8, 2014);
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`In-Depth Test LLC v. Vishay Intertechnology, Inc., Case No. 1-14-cv-00888 (D.
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`Del. Jul. 8, 2014); In-Depth Test LLC v. Fairchild Semiconductor Corp., Case No.
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`1-14-cv-01090 (D. Del. Aug. 22, 2014); In-Depth Test LLC v. Linear Tech. Corp.,
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`Case No. 1-14-cv-01091 (D. Del. Aug. 22, 2014).
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`On December 11, 2014, Petitioner filed a Petition for inter partes review
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`requesting review of claims 1-20 of the ’373 Patent, styled Linear Tech. Corp. v.
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`In-Depth Test LLC, Case IPR2015-00421(the “First Petition”) (Ex. 1005). The
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`patent owner filed a preliminary response and argued for a narrow construction of
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`the claim term “outlier” as “a test result whose value strays from a set of test
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`2
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`U.S. Patent No. 6,792,373
`Petition for Inter Partes Review
`results having statistically similar values, but does not exceed control limits or
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`otherwise fail to be detected.” (Ex. 1006 at 5-16.) The Board agreed and denied
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`institution, acknowledging that the patent owner’s proffered claim construction
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`was outside of the “scope of the ordinary and customary meaning.” (Ex. 1007 at 6-
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`10.) This new construction necessitated a renewed search and review of the prior
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`art. New prior art was discovered that invalidates the ’373 Patent based on the
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`construction of outlier provided by the patent owner and accepted by the Board.
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`Petitioner requests that the Board institute the instant Petition because
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`neither the same prior art, nor the same arguments are presented here. 35 U.S.C.
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`§325(d). Petitioner’s asserted prior art and arguments provided herein do not
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`overlap and are not recycled from its First Petition. The “distinction is present in
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`each ground of unpatentability of the Petition at hand.” Valeo North Am., Inc. v.
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`Magna Electronics, Inc., Case IPR2014-01208, Paper 13 at 12-15 (Dec. 23, 2014).
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`Moreover, the new claim construction alone warrants the Board’s fresh look at the
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`validity of the ’373 Patent based on the newly-discovered prior art and new
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`arguments. Toshiba Corp. v. Intellectual Ventures, Case IPR2014-00317, Paper 11
`at 2-3 (June 17, 2014).
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`(c) Lead and Back-Up Counsel (37 C.F.R. § 42.8(b)(3))
`Service may be had to Lead Counsel and Backup Counsel for Petitioner at
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`the following, by mail, email or fax.
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`3
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`U.S. Patent No. 6,792,373
`Petition for Inter Partes Review
`Lead Counsel:
`Backup Counsel:
`Bernard Knight
`Kenneth Cheney
`Reg. No. L0911
`Reg. No. 61,841
`bknight@mwe.com
`kcheney@mwe.com
`Tel: (202) 756-8421
`Tel: (949) 757-7111
`Fax: (202) 591-2699
`Fax: (949) 851-9348
`McDermott Will & Emery
`McDermott Will & Emery
`500 North Capitol Street, N.W.
`4 Park Plaza
`Washington, DC 20001
`Irvine, CA 92614
`(d) Service Information (37 C.F.R. § 42.8(b)(4))
`Papers concerning this matter should be addressed to counsel at the
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`addresses provided above. Petitioner consents to electronic service by email at:
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`IPdocketMWE@mwe.com, bknight@mwe.com, and kcheney@mwe.com.
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`II.
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`STATEMENT OF THE PRECISE RELIEF REQUESTED
`Petitioner requests inter partes review and cancellation of Claims 1-20 of the
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`’373 Patent based on the grounds set forth under 35 U.S.C. § 102(b) and/or § 103.
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`This petition presents evidence of unpatentability and establishes a reasonable
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`likelihood that the Petitioner will prevail in establishing that all of the challenged
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`claims are unpatentable.
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`All claims are anticipated by Lane. Certain claim features are also found in
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`Western, which Lane incorporates by reference. To the extent that the Board does
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`not find anticipation by Lane (e.g., if features in Western are found to be required
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`but cannot be incorporated by reference for the purpose of anticipation), Petitioner
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`alternatively raises that all the claims are unpatentable as obvious in view of Lane,
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`or at minimum unpatentable as obvious in view of Lane and Western.
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`4
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`U.S. Patent No. 6,792,373
`Petition for Inter Partes Review
`III. SUMMARY OF PRIOR ART PRESENTED BY PETITIONER
`A. U.S. Patent No. 4,967,381 to Lane et al.
`U.S. Patent No. 4,967,831 to Lane et al. (“Lane”) (Ex. 1002) was filed on
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`July 6, 1989, and issued on October 30, 1990. Lane is directed to process control
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`interface system for management measurement data obtained from the testing of
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`semiconductor devices. (Ex. 1002 at 2:56-3:2.) Lane is prior art to the ’373 Patent
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`under 35 U.S.C. § 102(b).
`
`B. Western Electric Co., STATISTICAL QUALITY CONTROL HANDBOOK
`Western Electric Co., STATISTICAL QUALITY CONTROL HANDBOOK
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`(“Western”) is a non-patent publication that was first published at least as early as
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`1958, and publicly distributed to the engineering community at least as early as
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`1956. (Ex. 1003 at 2, 6, 344, 345.) Western has been published numerous times
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`over the years. Western is a guide for applying statistical quality control principles
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`to manufacturing operations, and discloses how to create control charts for
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`detecting when measurements stray from statistically similar values by way of
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`comparing the measurements to control limits and inner control limits based on
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`multiples of a width of the measurement distribution. (See generally Ex. 1003.)
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`Western is prior art to the ’373 Patent under 35 U.S.C. § 102(b).
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`IV. The ’373 Patent
`A. The Filing Date of the ‘373 Patent
`The ’373 Patent (U.S. App. No. 10/154,627) was filed on May 24, 2002, and
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`U.S. Patent No. 6,792,373
`Petition for Inter Partes Review
`issued on September 14, 2004. (Ex. 1001.) The ’373 Patent claims the benefit of
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`several provisional applications and a continuation-in-part application, the earliest
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`filed on May 24, 2001.
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`B. Overview of the ’373 Patent
`The ’373 Patent lists 20 claims, with claims 1, 8, and 15 being the
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`independent claims. The ’373 Patent describes testing semiconductors with test
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`equipment connected to a computer to detect whether a test result is an outlier. (Ex.
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`1008 ¶ 37.) Figure 1, reproduced below, depicts a tester 102 that tests components
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`106. (Ex. 1001 at Fig. 1.)
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`(Ex. 1001, Fig. 1)
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`The tester 102 used by the ’373 Patent is described as “automatic test
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`equipment (ATE)” or “any test equipment that tests components 106 and generates
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`output data.” (Id. at 3:24-37.) A “Teradyne tester” is given as an example. (Id. at
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`3:37.) The tester 102 is described as operating in connection with a “computer
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`system 108 that receives tester data from the tester.” (Id. at 3:42-49.)
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`6
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`U.S. Patent No. 6,792,373
`Petition for Inter Partes Review
`The computer implements a statistical engine (software) running on the
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`computer to analyze data received from the tester. (Id. at 3:45-51.) The software
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`includes a supplementary data analysis element 206 which analyzes output test
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`data from the tester 102. (Id. at 5:25-33, FIG. 2.) The ’373 patent explains how the
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`supplementary data analysis element 206 identifies outliers:
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`The supplementary data analysis element 206 may operate in any
`suitable manner to designate outliers, such as by comparison to
`selected values and/or according to treatment of the data in the data
`smoothing process. For example, an outlier identification element
`according to various aspects of the present invention initially
`automatically calibrates its sensitivity to outliers based on selected
`statistical relationships for each relevant datum (step 434). Some of
`these statistical relationships are then compared to a threshold or other
`reference point, such as the data mode, mean, or median, or
`combinations thereof, to define relative outlier threshold limits. In the
`present embodiment, the statistical relationships are scaled, for
`example by one, two, three, and six standard deviations of the data, to
`define the different outlier amplitudes (step 436). The output test data
`may then be compared to the outlier threshold limits to identify and
`classify the output test data as outliers (step 438).
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`(Ex. 1001 at 13:49-65; Ex. 1008 ¶ 39.)
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`The supplementary data analysis element 206
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`includes an outlier
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`classification element 212, which is “configured to identify and/or classify the
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`various outliers in the data according to selected algorithms.” (Ex. 1001 at 14:7-
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`7
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`U.S. Patent No. 6,792,373
`Petition for Inter Partes Review
`14.) To the extent that the classification element classifies data congruent with
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`the statistical rules disclosed in the above example of outlier identification (Ex.
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`1001 at 13:49-65), the ’373 patent explains that the classification of the data may
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`be used to identify outliers.1 For example, the ’373 patent explains:
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`The outlier classification element may classify data in accordance
`with conventional SPC control rules, such as Western Electric rules,
`to characterize the data.
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`The outlier classification element suitably classifies the data using a
`selected set of classification
`limit calculation methods. Any
`appropriate classification methods may be used to characterize the
`data according to the needs of the operator. The present outlier
`classification element, for example, classifies outliers by comparing
`the output
`test data
`to selected
`thresholds, such as values
`corresponding to one, two, three, and six statistically scaled standard
`deviations from a threshold, such as the data mean, mode, and/or
`median. The identification of outliers in this manner tends to
`normalize any identified outliers for any test regardless of datum
`amplitude and relative noise.
`
`(Ex. 1001 at 1-16 (emphasis added). Compare with id. at 14:59-61 (classifying
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`1 In its Preliminary Response to the First Petition, the patent owner
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`distinguished part classification from outlier identification, arguing that part
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`classification may be based on “traditional threshold testing” and/or the “number
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`of outliers and in what range the outliers fall.” (Ex. 1006 at 9-10.)
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`8
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`U.S. Patent No. 6,792,373
`Petition for Inter Partes Review
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`components); Ex. 1008 ¶ 40.)
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`The ’373 Patent further explains that the computer may generate an output
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`report. The output is broadly defined by the ’373 Patent, which states that “[a]ny
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`form, such as graphical, numerical, textual, printed, or electronic form, may be
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`used to present the output report for use or subsequent analysis.” (Ex. 1001 at 18:2-
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`4.) The ’373 Patent also states that the “output report may be provided in any
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`suitable manner, for example output to a local workstation, sent to a server,
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`activation of an alarm, or any other appropriate manner (step 712). In one
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`embodiment, the output report may be provided off-line such that the output does
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`not affect the operation of the system.” (Id. at 18:57-62; Ex. 1008 ¶ 41.)
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`V.
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`PERSON OF ORDINARY SKILL IN THE ART
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`A person of ordinary skill in the art in the field of developing the technology
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`of the ’373 Patent would have a B.S. degree in combination with 1-2 years training
`
`in semiconductor testing. (Ex. 1008 ¶ 25.) This description is approximate, and a
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`higher level of training might make up for less education, and vice-versa. (Id.)
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`VI. CLAIM CONSTRUCTION (37 C.F.R. §§ 42.104(b)(3))
`For inter partes review, the challenged claims must be given their broadest
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`reasonable construction in light of the specification of the ʼ373 Patent. 37 C.F.R. §
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`42.100(b). Petitioner, however, for the purpose of the present proceeding, adopts
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`the patent owner’s claim construction of “outlier” and other claim terms proposed
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`U.S. Patent No. 6,792,373
`Petition for Inter Partes Review
`in its Preliminary Response to the First Petition. (See Ex. 1006.) Petitioner does
`
`not adopt the patent owner’s basis for reaching the claim construction; however,
`
`Petitioner believes that adoption of the claim construction exemplifies the strength
`
`of the prior art and facilitates an efficient resolution of this proceeding.
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` Petitioner addresses the meaning of certain other claim terms below and in
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`the course of comparing the claims to the prior art. Accordingly, Petitioner
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`submits the following constructions are relevant to the instant petition.
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`“outlier”
`
`A.
`Petitioner adopts the patent owner’s construction of outlier as “a test result
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`whose value strays from a set of test results having statistically similar values, but
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`does not exceed control limits or otherwise fail to be detected.” (Ex. 1006 at 5
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`(citing Ex. 1001 6:32–46).)
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`“test data”
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`B.
`Petitioner adopts the patent owner’s construction of “test data” as “a set of
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`test results sufficient to determine an outlier.” (Ex. 1006 at 16 (citing Ex. 1001
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`14:40–44).) 2
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`“output report”
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`C.
`Petitioner adopts the patent owner’s construction of “output report” as a
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`2 Petitioner notes that claim 1 does not require the generated test data to be
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`from the component recited in claim 1.
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`10
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`U.S. Patent No. 6,792,373
`Petition for Inter Partes Review
`“print-out, database entry, operator interface display, or other desired destination to
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`present the identified outlier for use or subsequent analysis.” (Ex. 1006 at 18
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`(citing Ex. 1001 17:66–18:4).)
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`“run time”
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`D.
`Petitioner adopts the patent owner’s construction of “run time” as “within a
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`matter of seconds or minutes following generation of the test data.” (Ex. 1006 at 21
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`(citing Ex. 1001 at 7:15–18).)
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` “component”
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`E.
`The ’373 Patent specification defines component by example to include
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`“semiconductor devices on a wafer, circuit boards, packaged devices, or other
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`electrical or optical systems.” (Ex. 1001 at 3:26-29.) The ‘373 Patent provides one
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`other example in which "the general resistivity of resistor components in the
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`semiconductor devices varies across the wafer," and discusses measuring the
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`resistance of a “resistor component.” (Ex. 1001 at 17:30-36 (emphasis added); Ex.
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`1008 ¶ 42.) Because the ’373 Patent states that these resistor components are in
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`the semiconductor devices, the components may be discrete portions of the
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`semiconductor devices. (Ex. 1008 ¶ 42.)
`
`Other than the foregoing examples, the ’373 Patent does not limit a
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`component to any specific structure. (Ex. 1008 ¶ 43.) Instead, the ’373 Patent
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`describes the identification and/or selection of components generically, stating that
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`11
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`U.S. Patent No. 6,792,373
`Petition for Inter Partes Review
`a component may be identified based on “x-y coordinates corresponding to a
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`position of the component 106 on a wafer map for the tested wafer” (Ex. 1001 at
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`4:15-18), and that “predetermined components may be selected according to any
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`criteria, such as data for various circumferential zones, radial zones, random
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`components, or individual stepper fields” (id. at 18:17-20). ( Ex. 1008 ¶ 43.) The
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`’373 Patent states that a “component” produces an output signal in response to a
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`signal applied to the component by a tester, but does not discuss how such signals
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`are structurally applied. (Ex. 1001 at 6:22-25; Ex. 1008 ¶ 43.)
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`Accordingly, the broadest reasonable interpretation of “component” is “any
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`discrete portion of a semiconductor wafer, including any zone, field, chip, device,
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`or other discrete portion having an identifiable position with respect to the wafer
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`and that is subject to testing.” (Ex. 1008 ¶ 44.)
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`“recipe file”
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`F.
`Claims 2, 9, and 16 recite configuration data being in or read from a recipe
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`file using the computer system, and claim 16 recites “identifying the outlier
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`according to the configuration data in the recipe file.”
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`The ’373 Patent discloses that “configuration algorithms, parameters, and
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`any other criteria may be stored in a recipe file.” (Ex. 1001 at 6:11–18.) However,
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`this disclosure does not require, for example, that a configuration algorithm or
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`parameter actually be stored in the claimed recipe file, and does not further define
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`U.S. Patent No. 6,792,373
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`the recipe file with respect to the claims. (Ex. 1008 ¶ 46.) The ’373 Patent also
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`discloses “sensitivity parameters in a recipe configuration file” (Ex. 1001 at 17:1–
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`3); however, claim 16 recites a broader “recipe file.” (Ex. 1008 ¶ 46.)
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`Accordingly, the broadest reasonable interpretation of “recipe file” is “a file
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`storing configuration data for testing purposes.” (Ex. 1008 ¶ 47.)
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` “section group of components on a wafer”
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`G.
`Petitioner adopts the patent owner’s construction of “section group of
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`components on a wafer” as “one or more wafer divisions of the same section type,
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`such as row, column, stepper field, circular band, radial zone, or quadrant.” (Ex.
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`1006 at 24 (citing Ex. 1001 at 7:63–8:21).) Petitioner notes that the ’373 patent
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`explains that “Section types comprise various sorts of component 106 groups
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`positioned in predetermined areas of the wafer.” (Ex. 1001 at 8:6-7.) Thus, “wafer
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`division” is not limited to a “row, column, stepper field, circular band, radial zone,
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`or quadrant,” nor does the patent owner attempt to do so. (Ex. 1008 ¶ 149.)
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` “correlate/correlating the test data” (claims 5, 12, and 20)
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`H.
`Petitioner adopts the patent owner’s construction of “correlate/correlating
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`test data” as “identifying related data in one or more tests.” (Ex. 1006 at 25 (citing
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`Ex. 1001 at 9:21–25; 13:36–39; 16:25–57).)
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`VII. IDENTIFICATION OF THE CHALLENGE (37 C.F.R. § 42.104(B))
`A. The Applied References
`(a) Lane - U.S. Patent No. 4,967,381
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`U.S. Patent No. 6,792,373
`Petition for Inter Partes Review
`U.S. Patent 4,967,381 (“Lane”) (Ex. 1002) describes a semiconductor test
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`system that is useful in process control of machines and processes, and which
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`provides “a set of predefined data management or data analysis tasks which the
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`operator of the system can use when using the system to run a selected process.”
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`(Ex. 1002 at 2:56-3:39, 4:6-17; Ex. 1008 ¶ 48.) “Access to measurement data for
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`detailed data management tasks is provided not only through [a] dynamic menu
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`feature, but also graphically through the use of trend charts and statistical quality
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`control charts.” (Id. at 4:27-30.)
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`The majority of Lane describes a user interface that is used in various
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`embodiments of a semiconductor test data analysis system. (Ex. 1002 at 5:29-32;
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`Ex. 1008 ¶ 49.) These embodiments include a semiconductor resistivity tester
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`which exemplifies most of the features in Lane (Ex. 1002 at 5:29-32), and a film
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`thickness measurement tester and a multiparameter lithography tester. (Id. at 5:32-
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`36.) Although the hardware features of these testers and the way they collect data
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`are not identical, the rest of the data management and analysis system for
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`measuring thickness is described as being “virtually identical” to the system of the
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`resistivity tester; and the multiparameter tester also “uses the same user interface
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`and data organization methods as used in the first preferred embodiment” of the
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`resistivity tester. (Id. at 40:25-28. See also id.at 32:32-35. Ex. 1008 ¶ 49)
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`Figure 1 of Lane depicts a physical processing system 22, such as a
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`U.S. Patent No. 6,792,373
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`semiconductor wafer resistivity tester, being controlled by a computer-based
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`control system 24, including a computer central processing unit (CPU) 32. (Ex.
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`1002 at 5:52-54; Ex. 1008 ¶ 50.)
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`(Ex. 1002, Fig. 1)
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`In Figure 1, the computer-based control system 24 includes one or more
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`software programs to select processes to run on the physical system 22 (i.e., the
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`tester) and specifies parametric values for use with the process to be run, and a
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`“data analysis or data management program for analyzing the measurement data
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`collected by the control system 24 from the physical system 22.” (Ex. 1002 at
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`6:27-36.) In this regard, Lane discloses a highly configurable system, including
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`dynamic menus (e.g., Ex. 1002 at 6:61-9:17) which provide management of,
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`among other things, process selection (see, e.g., id. at 9:47-10:17), parameter entry
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`(see, e.g., id. at 10:20-13:60), running a selected process (see, e.g., id. at 14:57-
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`16:11), and data analysis and management tasks, including display of trend charts
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`and statistical quality control charts (id. at 16:13-22:20). (Ex. 1008 ¶ 51.)
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`With regard to the multiparameter tester (i.e., “measurement and analysis
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`system”), Lane discloses a wafer tester 320 (FIG. 18) that includes a measurement
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`unit 322. (Ex. 1002 at 34:61-35:2; Ex. 1008 ¶ 52.) Measurement unit 322 performs
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`“electrical tests by imposing voltages and/or currents on selected terminals . . . and
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`measuring the resulting voltages and/or currents” based on instructions from a
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`measurement and collection and analysis computer 340. (Id. at 34:61-35:2.)
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`(Ex. 1002, Fig. 18)
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`Measurement unit 322 performs the electrical tests using a defined mask
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`pattern. (Ex. 1002 at 35:3-5; Ex. 1008 ¶ 53.) During setup of a test, “a test
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`definition file 380 . . . defines which fields are to be tested, which chips in each
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`field are to be tested, and which test structures in each module are to be tested.”
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`(Ex. 1002 at 36:58-61; Ex. 1008 ¶ 53.) Figure 17 discloses the “test structure
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`hierarchy” of a semiconductor wafer. (Ex. 1002 at 5:8-9.)
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`(Ex. 1002, Fig. 17)
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`Lane explains that “[w]hen a test wafer is processed by the invention, only
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`the test structures specified in a selected test definition file are measured.” (Ex.
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`1002 at 36:18-20.) The raw measurement data is stored in the same order that it is
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`measured, and stored in data test files 386. (Id. at 37:28-30; Ex. 1008 ¶ 54.) The
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`data test files 386 are organized in folders in the same manner as the resistivity
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`testing system. (Ex. 1002 at 36:26-41; Ex. 1008 ¶ 54.)
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`As described above, Lane discloses that the resistivity tester and the
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`multiparameter tester “use[] the same user interface and data organization
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`methods.” (Ex. 1002 at 40:25-28; Ex. 1008 ¶ 55.) In this regard, Lane’s user
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`interface includes a graphical menu upon which Test Results, Trend Charts and
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`SQC Chart items become available when a process has been run and data has been
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`collected. (Ex. 1002 at 10:36-42; Ex. 1008 ¶ 55.)
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`Figure 5 of Lane, e.g., depicts statistical quality control charts that are
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`automatically generated for the analysis of recent measurement data. (Ex. 1002 at
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`19:16-18, 20:3-6; Ex. 1008 ¶ 55.)
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`(Ex. 1002, Fig. 5)
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`Figure 5 depicts an X and R chart, respectively, with X representative of a
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`mean of data clusters and R representative of range. (Ex. 1002 at 19:33-35.) In the
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`depicted example, each point that is charted is the mean value of a selected
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`parameter (e.g., resistivity) of the measurements collected from between two and
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`ten executions of a process (process runs) selected by the operator. (Id. at 19:18-
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`41; Ex. 1008 ¶ 56.)
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`Figure 10 of Lane, and its corresponding disclosure, provide an exemplary
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`SQC chart and describe how Lane identifies and plots data points based on the
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`intensity at which they stray from the average or mean of the data, for example,
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`based one or more standard deviations of the data being analyzed. (Ex. 1002 at
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`19:52-20:31; Ex. 1008 ¶ 57.)
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`U.S. Patent No. 6,792,373
`Petition for Inter Partes Review
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`(Ex. 1002, Fig. 10)
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`The chart of FIG. 10 includes a center line that “represents the average value
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`of a specified set of data” and upper and lower control limits “which represent a
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`range of plus and minus three standard deviations from the center line, are
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`computed from the same set of data used to determine the center line.” (Ex. 1002 at
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`19:55-58; Ex. 1008 ¶ 58.)
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`For those data points that do not exceed the upper or lower control limits,
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`Lane identifies outlier points that are outside of one or two standard deviations of
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`the data based on whether the points fall into respective zones within the control
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`limits. (Ex. 1002 at 19:55-58, 20:23-25; Ex. 1008 ¶ 59.) For example, Lane states:
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`the spaces between the center line and the control limits are each
`divided into three zones, here labelled A, B and C. Thus, each zone
`has a width of one standard deviation as computed from a specified
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`U.S. Patent No. 6,792,373
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`set of data. In many cases, the set of data used to determine the center
`line and control limits for the SQC charts will be the same as the data
`being analyzed.
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`(Ex. 1002 at 19:52-65.)
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`Poin
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