IN THE UNITED STATES PATENT AND TRADEMARK OFFICE
`
`In re Request for Reexamination of U.S. Patent No. 6,792,373
`(Patentee: Eric Paul Tabor)
`
`Issued: September 14, 2004
`
`Primary Examiner: Bryan Bui
`
`Filed: May 24, 2002
`
`For: Methods and Apparatus for Semiconductor Testing
`
`DETAH.ED STATEMENT IN SUPPORT OF REQUEST FOR
`REEXAMINATION OF U.S. PATENT NO. 6,792,373
`
`Honorable Commissioner of
`Patents and Trademarks
`Washington, D.C. 20231
`
`This request is for reexamination, pursuant to 37 C.F.R. § 1.510, of Claims 1-20 of U.S.
`Patent No. 6,792,373 (the ‘_‘373 Patent”), which issued September 14, 2004 in the name of Eric
`Paul Tabor (“Tabor”). The request is made in view of the following prior art:
`
`1. Bauer, Marcus, Gather, Ursula, Imhoff, Michael (1999). The Identification of
`
`Multiple Outliers in Online Monitoring Data.— (“Bauer Reference”)
`2. Motorola, Inc. (1998). Process Average Testing (PAT), Statistical‘ Yield Analysis
`(SYA) and Junction Verification Test (JVT) — (“Motorola Reference”)
`3. Gneiting, Thomas, Sischka, F. (2000). Measurement Related and Model Parameter
`
`Related Statistics — (“Gneiting Reference”)
`
`4. U.S. Patent No. 5,835,891 — Stoneking — (“Stoneking Patent”)
`5. Daasch, W. Robert (2000). Variance Reduction Using Wafer Patterns in Iddq Data
`(“Daasch Reference”)
`
`6. Michelson, Diane K. (1997). Statistically Calculating Reject Limits at Parametric
`
`Test — (“Michelson Reference”)
`
`Linear Exhibit 1009
`
`Page 1 of 49
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`

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`7. Nigh, Phil, Gattiker, Anne (2000). Test Method Evaluation Experiments & Data
`
`(“Nigh Reference”)
`
`8. Romanchik, Dan, (2000). PAT Improves Auto IC Reliability — (“Romanchik
`
`Reference”)
`
`9. Bilosi, Peter; Ellinger, Steve; Morvay, Daniel (2000). Developing A Defect
`
`Reduction Strategy for the Copper Dual-Damascene Oxide Etch Process — (“Bilosi
`Reference)
`
`10. Canfield, Lingzhou; (1997) IC-CAP 5.0 Statistics Package Overview. — (“IC-CAP
`5.0 Reference) «
`
`I.
`
`INTRODUCTION
`
`This request for reexamination is being filed by Paul Tabor, who is also listed as the
`inventor of the patent. Mr. Tabor respectfully seeks a determination by the U.S. Patent and
`Trademark Office (“PTO”) on the issue of whether the above-referenced prior art raises a
`substantial new question of patentability regarding Claims 1-20. The claims pertain to various
`systems and methods for identifying outlier data in statistical process control used typically in
`the manufacturing of semiconductor wafers. A claim chart identifying the most pertinent of the
`prior art is attached hereto as Exhibit A. A copy of the patent is attached hereto as Exhibit B.
`Copies of the prior art references are attached hereto as Exhibit C. A copy of the file history of
`the ‘373 patent is attached hereto as Exhibit D.
`I
`
`II.
`
`NEW PRIOR ART
`
`Claim 1 reads as follows:
`
`A test system comprising:
`
`a tester configured to test a component and generate test data; and
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`A. Claim 1 is fully anticipated by the Gneiting Reference pursuant to 35 U.S.C. § 102(a).
`The Gneiting reference, in general, discloses a software test system for measuring and
`analyzing test data for semiconductor wafers (a test system as set forth in the preamble of the
`claim). On page 3, the reference further describes “A wafer, containing different dies with test
`
`structures on them, is first tested.” Obviously, the wafer is tested using a semiconductor wafer
`
`tester. On page 3, the reference further discloses “a wafer containing different dies with test
`
`structures on them is tested”. A tester would have to be configured to test a component in order
`
`to test a wafer containing a die. On page 3, the reference further discloses that measurement data
`
`is “stored in an IC-CAP.mdm file”. Again, test data would clearly be generated as a result of the
`
`test and stored in the data file. On page 3, the reference also generally discusses the use of a
`wafer tester that works directly with a computer in order to test the wafers. In fact, in most any
`semiconductor wafer test environment, one of ordinary skill in the art understands it is standard
`
`practice to have a computer connected to the wafer probe tester for the purpose of analyzing the
`wafer_ test data. Page 4 of the reference discloses that the computer is configured to receive test
`data. The figures on page 4 of the reference disclose the use of a statistical analysis software
`package. The software package most certainly receives test data and the data is stored in a data
`
`file such as “IC-CAP.mdm”.
`
`Finally, as disclosed on page 6 and page 21 of the Gneiting reference, “outliers” are both
`
`identified in the test data and included as part of a report that is generated by the computer
`software package. Page 6 states , “In the next step, the measurement outliers have to be marked,
`such that they are not considered when calculating the mean and sigma curves. Back to the IC-
`
`CAP file, this is done by the transform ‘mark_outliers’”. The “marking” of the outliers
`
`comprises the identification of outliers in the test data. Page 6 illustrates reports that contain
`outliers and includes a general discussion on how the outliers are marked prior to generating the
`output report. Furthermore, on page 21, figure 4 shows a histogram plot (report) that contains
`outliers. The first paragraph on page 22 states, “[I]n fig. 4, the outliers represent so-called spot
`defects on the wafer...” Therefore, since all of the elements in claim 1 are clearly present in the
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`Gneting reference, claim 1 is anticipated pursuant to 35 U.S.C. § 102(a). At a minimum, the
`
`elements disclosed in claim 1 would have been obvious to one of ordinary skill in the art
`
`pursuant to 35 U.S.C. § 103 (a) in view of the Gneiting reference.
`
`B. Claim 1 is anticipated by the Motorola reference pursuant to 35 U.S.C. § lO2(b).
`
`The Motorola reference was originally published on August 3, 1998. Much of what the
`
`text contained in the Motorola reference was originally published in a document entitled
`
`“Guidelines for Part Average Testing” written by the‘ Automotive Electronics Council on July
`31, 1997. The Motorola reference discloses the general guidelines for Part Average Testing or
`“PAT”. PAT is intended to identify components that perform outside the normal statistical
`
`distribution.
`
`As it pertains to claim 1, the document addresses the need for a “tester” in paragraph 5.1
`
`when it states, “PAT limits represent the application of statistical techniques for the removal of
`
`abnormal parts during part level testing...” It follows that the tester would obviously be
`
`“configured to test a component” such as when the test limits are set statically as described in
`
`paragraph 5.2. and 5.2.1. The component in this case is a semiconductor wafer die.
`
`Furthermore, the Motorola reference discloses that the tester generates test data as described in
`
`paragraphs 5.2 and 5.2.1.
`
`Because a computer must be connected to the tester, the implication from the Motorola
`
`disclosure is that a computer works ir1 conjunction with the tester in order to test semiconductor
`
`devices and generate test data. It goes without saying that the proposed tests as described in
`
`Appendix 2 of the Motorola disclosure would not be possible without a computer connected to
`
`the tester. The computer would also be configured to receive test data as described in Figure 2 of
`the reference.
`
`Finally, in the second full paragraph of the Motorola disclosure it states that, “PAT is
`
`intended to identify components that perform outside the normal statistical distribution.” These
`
`“components” are by definition “outliers” identified in the test data. The outliers are clearly
`produced in an output report as illustrated in figure 3. Therefore, since all of the elements in
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`claim 1 are clearly present in the Motorola reference, claim 1 is anticipated pursuant to 35 U.S.C.
`§ 102(a). At a minimum, the elements disclosed in claim 1 would have been obvious to one of
`ordinary skill in the art under 35 U.S.C. § 103(a) in view of the Motorola reference.
`
`C. Claim 1 is anticipated by the Bauer reference pursuant to 35 U.S.C. § 102(b).
`The Bauer reference was originally published in 1999. The Bauer reference discloses a
`graphical procedure for routine detection of isolated and patchy outliers in univariate time series.
`The reference describes the procedure in view of the extraction of time series data in measuring
`real time medical data. However, the reference also discloses that the methods can be used with
`retrospective data analysis as described in Section 5 of the reference. These retrospective
`methods can certainly be used in analyzing manufacturing processes as described on page 2 of
`the reference.
`
`As it pertains to claim 1, the document addresses the need for a “tester” as described in
`
`reference, it refers to a “tester” for measuring arterial blood pressure). It follows that the tester
`would obviously be “configured to test a component.” Like the term “tester”, the term
`“component” has a broad meaning. However, in the Bauer reference, it refers to a human and its
`blood pressure. Furthermore, the Bauer reference discloses that the tester generates test data as
`shown in figure 1.
`
`Because a computer must be connected to the tester in order to generate the graphs as
`
`Finally, sections 4 and 5 of the reference disclose the procedure to identify outliers in the
`acquired data. Specifically, outliers are identified as shown in figure 5 and described in section
`5, and an output report as shown in figure 5 is clearly generated by a computer and contains the
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`identified outliers in the graphs. Therefore, since all of the elements in claim 1 are clearly
`
`present in the Motorola reference, claim 1 is anticipated pursuant to 35 U.S.C. § 102(a). At a
`
`minimum, the elements disclosed in claim 1 would have been obvious to one of ordinary skill in
`
`the art under 35 U.S.C. § 103(a) in view of the Motorola reference.
`
`D. The Stoneking patent (U.S. Pat No. 5,835,891) renders Claim 1 obvious to one of
`ordinary skill in the art pursuant to 35 U.S.C. § 103(a) in view of several references.
`
`When the Tabor patent was originally prosecuted, Claim 1 was rejected under 102(b) in
`
`View of the Stoneking patent. The applicant traversed the rejection by arguing that claim 1 did
`
`not disclose the generation of an output report by a computer or an output report that included
`
`identified outliers. See Exhibit D, at 8. However, there were several references that were
`
`available that reveal relevant statistical analysis references where not only output reports, but
`
`output reports that include outliers.
`
`i.
`
`Stoneking in View of Gneiting
`
`Most notably, the Gneiting reference makes evident the fact that computer software was
`
`available that could generate output reports capable of displaying outliers (Gneiting, at 5-9, 21).
`
`Even if the reference discusses the goal of removing outliers, or that some of the figures show
`
`that the outliers were not identified by the software, the fact remains that the Gneiting reference
`
`suggests that it would have been obvious to one of ordinary skill in the art to simply instruct the
`
`software to mark the outliers in an output report. In the unlikely event that the examiner found
`
`that the Gneiting reference lacked all of the elements of Claim I, certainly, one of ordinary skill
`
`in the art would have been motivated to combine the teachings of the Stoneking reference with
`
`the Gneting reference to obtain all elements in Claim 1.
`
`ii.
`
`Stoneking in view of Motorola
`
`Additionally, the Motorola reference makes evident the fact that computer software was
`
`available that could generate output reports capable of displaying outliers (Motorola, at 3). Even
`
`if the Motorola reference discusses the goal of removing outliers, or that some of the figures
`
`show that the outliers were not identified by the software, the fact remains that the Motorola
`
`reference suggests that it would have been obvious to one of ordinary skill in the art to simply
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`instruct the software to mark the outliers in an output report. In the unlikely event that the
`
`examiner found that the Motorola reference lacked all of the elements of Claim I, certainly, one
`of ordinary skill in the art would have been motivated to combine the teachings of the Stoneking
`reference with the Motorola reference to obtain all elements in Claim 1.
`
`iii.
`
`Stoneking in view of Nigh
`
`The same is true for combining the teachings in the Stoneking patent with the Nigh
`reference. The Nigh reference, published in 2000, is relevant prior art as it describes statistical
`
`methods and includes a discussion on the elimination of outliers in a manufacturing process of
`semiconductor devices. The Nigh reference both includes a discussion and discloses output
`reports showing outliers on page 7 and includes a discussion on the use of spatial analysis to
`
`remove outliers. Because there was a motivation to combine the teachings of the two
`
`references, Claim 1 would be rendered obvious under § 103(a).
`
`iv.
`
`Stoneking in view of Romanchik
`
`Claim 1 would also be obvious by combining the teachings in the Stoneking patent with
`the teachings in the Romanchik reference originally published in August 2000. The Romanchik
`
`reference is relevant as it describes the use of PAT to improve production processes for
`
`goal of PAT is to eliminate outliers to improve the process. Because there was a motivation to
`
`combine the teachings of the two references, Claim 1 would be rendered obvious under § 103(a).
`v.
`Stoneking in view of IC-CAP 5.0
`
`Claim 1 is also obvious by combining the teachings of the Stoneking patent with the
`
`teachings in the IC-CAP 5.0 reference. The IC CAP reference was originally known and
`disclosed in March, 1997 and describes the feature of a statistical analysis software package
`originally developed and sold by Hewlett Packard Corporation. As shown on page 7 of the
`reference, the bottom figure includes an output report and is clearly obtainable from the software
`
`that includes outliers. Because there was a motivation to combine the teachings of the two
`references, Claim 1 would be rendered obvious under § 103(a).
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`vi.
`
`Stoneking in view of Michelson
`
`Claim 1 is also obvious by combining the teachings of the Stoneking patent with the
`
`teachings in the Michelson reference. The Michelson reference was originally published in 1997
`
`and discloses a method of statistically calculating reject limits in parametric testing in
`
`manufacturing of semiconductors. As shown on page 3 of the reference, figure 1 illustrates an
`
`output report generated by a computer includes outliers which are subsequently removed in
`
`figure 2. Because there was a motivation to combine the teachings of the two references, Claim
`
`1 would be rendered obvious under § l03(a).
`
`vii.
`
`Stoneking in view of Bauer
`
`Claim 1 is also obvious by combining the teachings of the Stoneking patent with the
`
`teachings of the Bauer reference. The Bauer reference was originally published in 1999 and
`
`discloses a graphical procedure for routine detection of isolated and patchy outliers in univariate
`
`time series. As shown on pages 16-17, figures 4 and 5 illustrate a computer generated output
`
`report containing outliers. The reference also discloses on page 19 the use of a "retrospective"
`
`analysis, which is essentially looking at the entire data population (or subset of the historical
`
`population). This would be equivalent of performing the analysis on tester data, which is
`
`collected in real-time and then analyzed by a statistical analysis software product in a
`
`retrospective maimer. Because there was a motivation to combine the teachings of the two
`
`references, Claim 1 would be rendered obvious under § 103(a).
`
`Claim 2 reads as follows:
`
`A test system according to claim 1 wherein:
`
`the computer is configured to operate in conjunction with a set of configuration
`
`data in a recipe file.
`
`A. Claim 2 is obvious to one of ordinary skill in the art pursuant to 35 U.S.C. § l03(a) in
`view of several references.
`
`i.
`
`Obvious in view of Motorola
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`A recipe file is a common semiconductor industry term used to describe a configuration
`file which contains parameters, instructions, rules, etc. which instruct a computer to control
`software to perform specific functions. A "recipe" file is equivalent to a Windows application or
`Java application "INI" file which contains configuration parameters that affect the behavior of a
`software program. "INI" files are very common and variations are used in widespread
`applications. Because the knowledge of using recipe files to instruct a computer to perform
`functions has been known for several years before the effective date of the patent at issue, it
`would have been obvious to one of ordinary skill in the art to combine the teachings of the
`Motorola, reference with commonly known methods of using recipe files. There would have
`been a motivation to do so based on the desire to use data files with preexisting data to control
`the testing and analysis process.
`
`ii.
`
`Obvious in view of Gneiting
`
`For the reasons stated in Claim 2, (A)(i) above, it would have been obvious to one of
`ordinary skill in the art to combine the teachings of the Gneiting reference with commonly
`known methods of using recipe files.
`
`iii.
`
`Obvious in view of Bauer
`
`For the reasons stated in Claim 2, (A)(i) above, it would have been obvious to one of
`ordinary skill in the art to combine the teachings of the Bauer reference with commonly known
`methods of using recipe files.
`
`iv.
`
`Obvious over Motorola in View of Bilosi
`
`Additionally, the Bilosi reference, originally disclosed in July 2000, describes a defect
`reduction strategy for use in semiconductor processing and manufacturing. On page 4,
`paragraph 3, states:
`
`“New defect detection recipes for pattemed-wafer inspection at both pre-
`and post etch steps were created so that partition experiments could begin. The
`short-loop monitor closely tracked production defects and had no prior-level
`problems that could obscure the results. This monitoring procedure not only
`pointed to the main etch chamber as the source of the particles but also allowed
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`the manufacturing line to qualify production after a wet clean or other chamber-
`
`open event. Later in the defect reduction program, the short-loop monitor
`indicated that the production wafer-defect detection recipes were counting the
`prior defects as deposited on the wafer surface.”
`
`Because there was a motivation to combine the teachings of the Bilosi reference with the
`Motorola reference, Claim 2 would be rendered obvious under § 103(a).
`
`v.
`
`Obvious over Gneting in view of Bilosi
`
`For the reasons stated in Claim 2, (A)(iv) above, it would have been obvious to one of
`ordinary skill in the art to combine the teachings of the Gneiting reference with the teachings of
`the Bilosi reference regarding recipe files.
`
`vi.
`
`Obvious over Bauer in View of Bilosi
`
`For the reasons stated in Claim 2, (A)(iv) above, it would have been obvious to one of
`ordinary skill in the art to combine the teachings of the Bauer reference with the teachings of the
`Bilosi reference regarding recipe files.
`
`Claim 3 reads as follows:
`
`A test system according to claim 1 wherein:
`
`the test data corresponds to a section group of components on a wafer.
`
`A. Claim 3 is obvious to one of ordinary skill in the art pursuant to 35 U.S.C. §
`103 (a) in view of several references
`
`i.
`
`Obvious over Stoneking in view of Daasch.
`
`The use of a predefined section. of a test element that has been grouped together to
`analyze data has been well known by those skilled in the art well before the invention date of the
`Tabor patent. By one example, as illustrated and disclosed on page 6, col. 1 of the Daasch
`reference, test data from a section group of a wafer was analyzed.
`
`During prosecution, the examiner rejected claim 3 of the application based on the
`Stoneking reference. The patentee successfully traversed the rejection arguing that the
`Stoneking reference lacked the use element of utilizing data from a section group of data.
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`However, either it would have been obvious to one skilled in the art to combine the use of
`
`utilizing data from a “section group” solely in view of the Stoneking reference with the teachings
`
`of the Daasch reference. The Daasch reference is clearly relevant prior art under § 103.
`
`ii.
`
`Obvious over Gneiting in view of Daasch
`
`For the reasons stated in Claim 3, (A)(i) above, it would have been obvious to one of
`
`ordinary skill in the art to combine the teachings of the Gneiting reference with the teachings of
`
`the Daash reference regarding the utilizing data from a section group of data.
`
`iii.
`
`Obvious over Motorola in view of Daasch
`
`For the reasons stated in Claim 3, (A)(i) above, it would have been obvious to one of
`
`ordinary skill in the art to combine the teachings of the Motorola reference with the teachings of
`
`the Daash reference regarding the utilizing data from a section group of data.
`
`iv.
`
`Obvious over Bauer in view of Daasch
`
`For the reasons stated in Claim 3, (A)(i) above, it would have been obvious to one of
`
`ordinary skill in the art to combine the teachings of the Bauer reference with the teachings of the
`
`Daash reference regarding the utilizing data from a section group of data.
`
`Claim 4 reads as follows:
`
`A test system according to claim 1 wherein:
`
`the computer is configured to automatically calibrate a sensitivity of the computer
`
`to the test data.
`
`A. Claim 4 is fully anticipated pursuant to 35 U.S.C. § 102(a) in view of the
`Gneiting reference.
`
`All of the limitations of claim 1, including a disclosure of a computer that is configured
`
`to automatically calibrate a sensitivity of the computer to the test data are included in the
`
`Gneiting reference. On page 3, final paragraph it states:
`
`“Referring to the IC-CAP file stats_during_meas.mdl, the measurements are performed,
`
`and, provided they were valid, the data is added to the existing mean and sigma data array. The
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`statistics plot then shows the actual measurement and the updated mean and mean : sigma
`plots.”
`
`The terms “updated mean and mean 1- sigma plots” refer to automatically calibrating
`sensitivity to the test data from the IC-CAP program running on a computer configured to
`receive the test data. Therefore, all of the elements of the claim are anticipated pursuant to § ‘
`102.
`
`B. Claim 4 is fully anticipated pursuant to 35 U.S.C. § 102(b) in view of the
`Motorola reference.
`
`As previously stated, the Motorola reference contains all of the elements described in
`claim 1. Additionally, page 5, paragraph 5.2.2 of the Motorola PAT reference states: “Before
`dynamic limits can be established, static limits, as defined in Section 3.1.1, must be established.”
`
`The calculation of static limits constitutes a “calibration” to the test datum such that dynamic
`limits can then be subsequently calculated. This is further described in the context of the
`
`Motorola PAT reference. Therefore, all of the elements of claim 4 are anticipated pursuant to
`§102(b).
`
`C. Claim 4 is obvious pursuant to 35 U.S.C. § 103(a) in view of the Bauer
`reference.
`
`Finally, the additional element of configuring a computer to automatically calibrate a
`sensitivity of the computer to the test data would have been obvious to one skilled in the art over
`
`the Bauer reference pursuant to 35 U.S.C. § 103(a).
`
`Claim 5 reads as follows:
`
`' A test system according to claim 1 wherein:
`
`the computer further comprises a data correlation element configured to correlate
`the test data.
`
`A. Claim 5 is fully anticipated pursuant to 35 U.S.C. § 102(a) in view of the
`Gneiting reference.
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`During the prosecution of the Tabor patent, the examiner rejected claim 5 in View of the
`Becker reference. The patentee successfully traversed the rejection by alleging that the Becker
`reference lacked the data correlation element found in claim 5.
`
`The addition of a data correlation element that is configured to correlate test data is a
`standard and well-known technique used throughout the semiconductor test industry which is
`employed by numerous software packages and individuals for numerous purposes.
`In the
`Gneiting reference, page 12, figure 9 shows a scatter plot. The figure indicates that a correlation
`is taking place between two test data parameters.
`
`Furthermore, on page 18, paragraph 3, the reference describes correlation of test data:
`“Beginning with N correlated statistical variables (model parameters), this method calculates a
`user-defined amount of m_<_n uncorrelated variables: the principal components. These new
`principal components describe the statistical spread of the original n correlated variables. The
`important fact is, however, that in practice, less than n principal components are required to
`describe the original 11 correlated variables!” Therefore, because the Gneiting reference discloses
`all of the elements of claim 1 as set forth above, and contains the additional elements disclosed in
`claim 5, claim 5 is fully anticipated pursuant to § 102(a).
`
`B. Claim 5 is fully anticipated pursuant to 35 U.S.C. § 102(b) in view of the
`Motorola reference.
`
`As previously stated, the Motorola reference contains all of the elements described in
`claim 1. Additionally, page 5, paragraph 5.2.2 of the Motorola PAT reference states: “Before
`
`§102(b).
`
`C. Claim 5 is obvious pursuant to 35 U.S.C. § 103(a) in view of the Bauer
`reference.
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`Finally, the additional element of a data correlation element configured to correlate the
`
`test data would have been obvious to one skilled in the art over the Bauer reference pursuant to
`35 U.S.C. § 103(a).
`
`Claim 6 reads as follows:
`
`A test system according to claim 1 wherein:
`
`the computer is configured to identify the outlier at run time.
`
`A. Claim 6 is fully anticipated pursuant to 35 U.S.C. § 102(b) in view of the
`Motorola reference.
`
`During the prosecution of the Tabor patent, the examiner rejected claim 6 in view of the
`
`Becker and Stoneking references. The patentee successfully traversed the rejection by alleging
`that the Becker and Stoneking references lacked the run time identification element found in
`
`claim 6.
`
`In the Motorola PAT reference, page 5, paragraph 5.2.2 states, “. .. [D]ynamic PAT limits
`
`are determined in the same manner as static PAT limits except that the limits are established
`
`using the data from the current lot (or wafer) of parts under test that have passed the static limits.
`
`To use this method, after the lot (or wafer) of parts have been tested to the static limits they must
`be held in a manner that allows further statistical analysis of the test data.” It is clear that a
`
`person of ordinary skill in the art would interpret “they must be held in a manner that allows
`
`further statistical analysis of the test data” as post-processing at run time.
`
`Therefore, because the Motorola reference discloses all of the elements of claim 1 as set
`
`forth above, and contains the additional elements disclosed in claim 6, claim 6 is fully
`anticipated pursuant to § 102(b).
`
`B. Claim 6 was obvious to one of ordinary skill in the art pursuant to 35 U.S.C. §
`103 (a) over the Motorola reference in view of the Daasch reference.
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`In the Daasch reference, on page 5, figure 8 demonstrates that the NNR outlier analysis
`technique is performed on a post processing basis, but at run-time as part of the test process flow.
`Thus, it would have been obvious to a person of ordinary skill in the art to combine the teachings
`of Motorola reference with the teachings of Daasch to obtain all of the elements in claim 1
`
`coupled with the limitations in claim 6.
`
`C. Claim 6 was obvious to one of ordinary skill in the art pursuant to 35 U.S.C. §
`103 (a) over the Gneiting reference in view of the Daasch reference.
`
`For the reasons described in Claim 6, part B, it would have been obvious to one skilled in
`
`the art to view the teachings in the Gneiting, reference in view of the Daasch reference by adding
`the limitation of configuring a computer to identify outliers at run time.
`
`D. Claim 6 was obvious to one of ordinary skill in the art pursuant to 35 U.S.C. §
`103 (a) over the Bauer reference in view of the Daasch reference.
`
`For the reasons described in Claim 6, part B, it would have been obvious to one skilled in
`
`the art to view the teachings in the Bauer, reference in view of the Daasch reference by adding
`the limitation of configuring a computer to identify outliers at run time.
`
`Claim 7 reads as follows:
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`A test system according to claim 1 wherein:
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`the computer further comprises a data smoothing element configured to receive
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`the test data and smooth the test data, and
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`wherein the computer is configured to receive the smoothed test data and identify
`the outlier in the smoothed test data.
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`A. Claim 7 would have been obvious to one skilled in the art pursuant to 35
`U.S.C. § 103 (a) in view of the Motorola, reference when combined with the
`Daasch reference.
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`Page 15 of 49
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`During the prosecution of the Tabor patent, the examiner rejected claim 7 in view of the
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`Page 2, paragraph 3 of the Daasch reference states “[N]eighboring die are independent
`samples of local process parameters and considering them will have a smoothing effect and
`locally reduce the variance.” In this context, a die is equivalent to components which are
`equivalent to devices. The parameters are referring to test data.
`
`Furthermore, page 5, under the section titled Variance Reduction using Nearest
`Neighbors, the Daasch reference states, “[T]he nearest neighbor estimate of Iddq is a smoothed
`version of the original data. The basic idea is to use this smoothed version to detect a faulty die
`that has a significantly larger average value compared to average values of its closest neighbors.”
`Thus, it would have been obvious to one skilled in the art to combine the teachings of the
`Motorola reference, which contains all of the elements of Claim 1, with the teachings of Daasch
`to obtain all of the elements of claim 7, namely a computer having a data smoothing element that
`is configured to receive the test data and smooth the test data. Furthermore, it is obvious to one
`skilled in the art that the computer could have been easily configured to receive the smoothed
`test data and identify the outlier in the smoothed test data. Therefore, it would have been
`obvious to one skilled in the art to combine the teachings of the Motorola reference with the
`teachings of Daasch to obtain all of the elements of claim 7, namely a computer having a data
`smoothing element that is configured to receive the test data and smooth the test data.
`Furthermore, it is obvious to one skilled in the art that the computer could have been easily
`configured to receive the smoothed -test data and identify the outlier in the smoothed test data.
`
`B. Claim 7 would have been obvious to one skilled in the art pursuant to 35
`U.S.C. § 103 (a) in view of the Gneiting reference when combined with the
`Daasch reference.
`
`For the reasons described in Claim 7, part A, it would have been obvious to one skilled in
`the art to view the teachings in the Gneiting, reference in view of the Daasch reference.
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`Page 16 of 49
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`C. Claim 7 would have been obvious to one skilled in the art pursuant to 35
`U.S.C. § 103(a) in view of the Bauer reference when combined with the
`Daasch reference.
`
`For the reasons described in Claim 7, part A, it would have been obvious to one skilled in
`
`the art to View the teachings in the Bauer, reference in view of the Daasch reference.
`
`Claim 8 reads as follows:
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`A test system comprising:
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`a computer system, wherein the computer system is configured to operate:
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`a supplementary data analysis element configured to identify outliers in the
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`semiconductor test data; and
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`an output element configured to generate an output report including the identified
`outliers.
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`A. Claim 8 fully anticipated by the Gneiting Reference pursuant to 35 U.S.C. § 102(a).
`
`Claim 8 is highly similar to that of claim 1. Claim 8 differs in that the claim is directed to
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`a data analysis system for semiconductor test data, rather than just a test system. Also, unlike
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`claim 1, a “tester” is not a necessary element to the system. Simply stated, the claim is directed
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`to a computer system that is capable of performing a supplementary data analysis to identify
`outliers and then generate a report with the identified outliers.
`
`The Gneiting reference, in general, discloses a software test system for measuring and
`analyzing test data for semiconductor wafers (a test system as set forth in the preamble of the
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`claim). On page 3, the reference further describes “A wafer, containing different dies