Paper No. __
`Filed: September 22, 2015
`
`UNITED STATES PATENT AND TRADEMARK OFFICE
`
`BEFORE THE PATENT TRIAL AND APPEAL BOARD
`
`
`Samsung Electronics Co., Ltd., and
`Samsung Electronics America, Inc.
`Petitioners
`
`v.
`
`
`
`Parthenon Unified Memory Architecture LLC
`Patent Owner
`
`INTER PARTES REVIEW OF U.S. PATENT NO. 5,960,464
`Case IPR No.: To Be Assigned
`
`PETITION FOR INTER PARTES REVIEW OF U.S. PATENT NO. 5,960,464
`UNDER 35 U.S.C. §§ 311-19 AND 37 C.F.R. § 42.100 et seq.
`
`
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`

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`Petition for Inter Partes Review of U.S. Pat. No. 5,960,464
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`TABLE OF CONTENTS
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`
`
`IDENTIFICATION OF CHALLENGES UNDER 37 C.F.R.
`
`INTRODUCTION ........................................................................................... 1
`I.
`II. MANDATORY NOTICES UNDER 37 C.F.R. § 42.8(b) .............................. 1
`III.
`PAYMENT OF FEES UNDER 37 C.F.R. § 42.15(a) .................................... 3
`IV. GROUNDS FOR STANDING ........................................................................ 3
`V.
`§§ 42.22 AND 42.104(b) ................................................................................. 3
`A.
`Statutory Grounds of Challenge ............................................................ 3
`B.
`The Proposed Grounds are Not Redundant ........................................... 5
`VI. THE ’464 PATENT ......................................................................................... 6
`VII. CLAIM CONSTRUCTION ............................................................................ 7
`A.
`Claim Terms To Be Construed .............................................................. 8
`1.
`“translate” .................................................................................... 8
`2.
`addresses to the contiguous addresses” ...................................... 9
`B.
`Expiration of the ’464 Patent ................................................................ 9
`VIII. LEVEL OF ORDINARY SKILL IN THE ART ........................................... 10
`IX. SPECIFIC GROUNDS OF CHALLENGE ................................................... 11
`A. Ground A: Notorianni anticipates claims 1, 3-4, 8-10, 12-
`13, 16-21, 23-24, 32-33, 35-36, and 40 ............................................... 11
`1.
`Claim 1 ...................................................................................... 11
`2.
`Claim 3 ...................................................................................... 14
`3.
`Claim 4 ...................................................................................... 14
`4.
`Claim 8 ...................................................................................... 14
`5.
`Claim 9 ...................................................................................... 15
`6.
`Claim 10 .................................................................................... 16
`7.
`Claim 12 .................................................................................... 17
`8.
`Claim 13 .................................................................................... 17
`9.
`Claim 16 .................................................................................... 17
`
`“algorithmically
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`translate
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`the noncontiguous
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`Petition for Inter Partes Review of U.S. Pat. No. 5,960,464
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`10. Claim 17 .................................................................................... 18
`11. Claim 18 .................................................................................... 18
`12. Claim 19 .................................................................................... 19
`13. Claim 20 .................................................................................... 20
`14. Claim 21 .................................................................................... 20
`15. Claim 23 .................................................................................... 21
`16. Claim 24 .................................................................................... 21
`17. Claim 32 .................................................................................... 21
`18. Claim 33 .................................................................................... 22
`19. Claim 35 .................................................................................... 23
`20. Claim 36 .................................................................................... 24
`21. Claim 40 .................................................................................... 25
`B.
`Ground B: Notorianni renders obvious claims 7 and 22 .................... 25
`1.
`Claim 7 ...................................................................................... 25
`2.
`Claim 22 .................................................................................... 27
`C.
`claims 2 and 11 .................................................................................... 27
`1.
`Claims 2 and 11 ......................................................................... 27
`D. Ground D: Notorianni in view of Rathnam renders
`obvious claim 34 ................................................................................. 28
`1.
`Claim 34 .................................................................................... 29
`E.
`18, 32, 36, and 40 ................................................................................ 30
`1.
`Claim 10 .................................................................................... 30
`2.
`Claim 16 .................................................................................... 34
`3.
`Claim 17 .................................................................................... 35
`4.
`Claim 18 .................................................................................... 36
`5.
`Claim 32 .................................................................................... 37
`6.
`Claim 36 .................................................................................... 37
`7.
`Claim 40 .................................................................................... 38
`
`Ground C: Notorianni in view of Moore renders obvious
`
`Ground E: AGP Specification anticipates claims 10, 16-
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`ii
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`Petition for Inter Partes Review of U.S. Pat. No. 5,960,464
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`Ground F: AGP Specification in view of Rhodes renders
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`obvious claims 1, 3-4, 7-9, 12-13, 19-24, 33, and 35 ......................... 39
`1.
`Claim 1 ...................................................................................... 39
`2.
`Claim 3 ...................................................................................... 46
`3.
`Claim 4 ...................................................................................... 46
`4.
`Claim 7 ...................................................................................... 48
`5.
`Claim 8 ...................................................................................... 49
`6.
`Claim 9 ...................................................................................... 50
`7.
`Claim 12 .................................................................................... 51
`8.
`Claim 13 .................................................................................... 51
`9.
`Claim 19 .................................................................................... 51
`10. Claim 20 .................................................................................... 53
`11. Claim 21 .................................................................................... 53
`12. Claim 22 .................................................................................... 53
`13. Claim 23 .................................................................................... 53
`14. Claim 24 .................................................................................... 53
`15. Claim 33 .................................................................................... 54
`16. Claim 35 .................................................................................... 55
`G. Ground G: AGP Specification in view of Moore renders
`obvious claim 11 ................................................................................. 56
`1.
`Claim 11 .................................................................................... 56
`H. Ground H: AGP Specification in view of Rhodes and
`Moore renders obvious claim 2 ........................................................... 57
`1.
`Claim 2 ...................................................................................... 57
`I.
`obvious claim 34 ................................................................................. 58
`1.
`Claim 34 .................................................................................... 58
`CONCLUSION .............................................................................................. 60
`
`F.
`
`X.
`
`
`
`Ground I: AGP Specification in view of Rathnam renders
`
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`iii
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`Petition for Inter Partes Review of U.S. Pat. No. 5,960,464
`
`
`TABLE OF AUTHORITIES
`
`
`
`Page(s)
`
`Federal Cases
`KSR Int’l Co. v. Teleflex Inc.,
`550 U.S. 398 (2007) .....................................................................................passim
`
`Phillips v. AWH Corp.,
`415 F.3d 1303 (Fed. Cir. 2005) (en banc) .......................................................... 10
`
`Parthenon Unified Memory Architecture LLC v. Apple, Inc.,
`No. 2:15-cv-00621-JRG-RSP (E.D. Tex) ............................................................. 2
`
`Parthenon Unified Memory Architecture LLC v. HTC Corp. et al.,
`No. 2:14-cv-00690-RSP (E.D. Tex.) .................................................................... 2
`
`Parthenon Unified Memory Architecture LLC v. Huawei Techs. Co.,
`Ltd. et al.,
`No. 2:14-cv-00687-JRG-RSP (E.D. Tex.) ............................................................ 1
`
`Parthenon Unified Memory Architecture LLC v. LG Elecs., Inc. et al.,
`No. 2:14-cv-00691-JRG-RSP (E.D. Tex.) ............................................................ 2
`
`Parthenon Unified Memory Architecture LLC v. Motorola Mobility,
`Inc.,
`No. 2:14-cv-00689-JRG-RSP (E.D. Tex.) ............................................................ 1
`
`Parthenon Unified Memory Architecture LLC v. Qualcomm Inc. et al.,
`No. 2:14-cv-00930-JRG-RSP (E.D. Tex.) ............................................................ 2
`
`Parthenon Unified Memory Architecture LLC v. Samsung Elecs. Co.,
`Ltd. et al.,
`No. 2:14-cv-00902-JRG-RSP (E.D. Tex.) ............................................................ 2
`
`Parthenon Unified Memory Architecture LLC v. ZTE Corp. et al.,
`No. 2:15-cv-00225-JRG-RSP (E.D. Tex.) ............................................................ 2
`
`In re Rambus, Inc.,
`694 F.3d 42 (Fed. Cir. 2012) .............................................................................. 10
`
`iv
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`

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`Petition for Inter Partes Review of U.S. Pat. No. 5,960,464
`
`
`STMicroelectronics, Inc. v. Motorola Inc. et al.,
`No. 4:03-cv-00276-LED (E.D. Tex.) .................................................................... 2
`
`Toyota Motor Corp. v. Hagenbuch,
`IPR2013-00483, Paper No. 37 (Dec. 5, 2014) .................................................... 10
`
`In re Translogic Tech., Inc.,
`504 F.3d 1249 (Fed. Cir. 2007) ............................................................................ 8
`
`In re Yamamoto,
`740 F.2d 1569 (Fed. Cir. 1984) ............................................................................ 7
`
`In re Zletz,
`13 USPQ2d 1320 (Fed. Cir. 1989) ....................................................................... 7
`
`Federal Statutes
`
`35 U.S.C. 102(a) .................................................................................................... 4, 5
`
`35 U.S.C. 102(b) .................................................................................................... 3, 4
`
`35 U.S.C. § 103 .................................................................................................passim
`
`35 U.S.C. § 112 .......................................................................................................... 7
`
`35 U.S.C. § 311 ........................................................................................................ 60
`
`Regulations
`
`37 C.F.R. § 42.8(b) .................................................................................................... 1
`
`37 C.F.R. § 42.15(a) ................................................................................................... 3
`
`37 C.F.R. § 42.22 ....................................................................................................... 3
`
`37 C.F.R. § 42.101 ................................................................................................... 60
`
`37 C.F.R. § 42.104(a) ................................................................................................. 3
`
`37 C.F.R. § 42.104(b) ................................................................................................ 3
`
`77 Fed. Reg. 48,756 (Aug. 14, 2012) ........................................................................ 8
`
`
`
`
`
`v
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`

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`Petition for Inter Partes Review of U.S. Pat. No. 5,960,464
`
`LIST OF EXHIBITS
`
`Ex. 1005
`
`S. Rathnam et al., “An Architectural Overview of the Programmable
`Multimedia Processor, TM—1,” IEEE Proceedings of COMPCON ’96,
`pp. 319-326 (1996) (“Rathnam”)
`
`R.J. Gove, “The MVP: A Highly-Integrated Video Compression
`Chip,” Proceedings of the IEEE Data Compression Conference (DCC
`‘94), pp. 215-224 (March 29-31, 1994).
`
`Ex. 1008 Reserved
`
`Ex-1022
`Ex-1023
`Ex. 1024
`
`“Accelerated Graphics Port Interface Specification,” Intel
`Corporation, July 31, 1996 (Revision 1.0) (“AGP Specification”)
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`vi
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`Petition for Inter Partes Review of U_S_ Pat. No. 5,960,464
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`U.S. Patent No. 5,404,511 (“Notorianni”)
`
`Ex-1034
`Ex. 1035 G. Moore, “Cramming more components onto integrated circuits,”
`Electronics, Vol. 38, No. 8, Apr. 19, 1965 (“Moore”)
`
`Ex-1036
`Ex-1037
`Ex. 1038
`
`P.R. 4—5(d) — Joint Claim Construction Chart in Case No. 2: 14—cv—902.
`
`Ex. 1039
`
`Intel, Press Release: “INTEL ANNOUNCES ACCELERATED
`
`GRAPHICS PORT 1.0 SPECIFICATION,” August 5, 1996.
`
`Ex. 1040 U.S. Patent No. 5,303,378 to Cohen
`
`vii
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`

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`Petition for Inter Partes Review of U.S. Pat. No. 5,960,464
`
`
`I.
`
`INTRODUCTION
`Petitioners1 respectfully request inter partes review of claims 1-4, 7-13, 16-
`
`24, 32-36, and 40 (the “Challenged Claims”) of U.S. Patent No. 5,960,464 (“the
`
`’464 patent”) (Ex. 1001). This Petition shows that there is a reasonable likelihood
`
`that Petitioner will prevail on the Challenged Claims of the ’464 patent based on
`
`prior art that was not considered during prosecution. This Petition also shows by a
`
`preponderance of the evidence that the prior art anticipates or renders obvious the
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`Challenged Claims of the ’464 patent. The Challenged Claims of the ’464 patent
`
`should be found unpatentable and cancelled.
`
`II. MANDATORY NOTICES UNDER 37 C.F.R. § 42.8(b)
`Real Party-in-Interest: The real parties-in-interest are Samsung Electronics
`
`Co., Ltd. and Samsung Electronics America, Inc.
`
`Related Matters: The following would affect, or be affected by, a decision in
`
`this proceeding:
`
`1.
`
`U.S. district court actions in which Patent Owner asserted the ’464
`
`patent: Parthenon Unified Memory Architecture LLC v. Huawei Techs. Co., Ltd. et
`
`al., No. 2:14-cv-00687-JRG-RSP (E.D. Tex.); Parthenon Unified Memory
`
`Architecture LLC v. Motorola Mobility, Inc., No. 2:14-cv-00689-JRG-RSP (E.D.
`
`
`1 “Petitioners” refers Samsung Electronics Co., Ltd. and Samsung Electronics
`
`America, Inc.
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`Petition for Inter Partes Review of U.S. Pat. No. 5,960,464
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`Tex.); Parthenon Unified Memory Architecture LLC v. HTC Corp. et al., No. 2:14-
`
`cv-00690-RSP (E.D. Tex.); Parthenon Unified Memory Architecture LLC v. LG
`
`Elecs., Inc. et al., No. 2:14-cv-00691-JRG-RSP (E.D. Tex.); Parthenon Unified
`
`Memory Architecture LLC v. Samsung Elecs. Co., Ltd. et al., No. 2:14-cv-00902-
`
`JRG-RSP (E.D. Tex.); Parthenon Unified Memory Architecture LLC v. Qualcomm
`
`Inc. et al., No. 2:14-cv-00930-JRG-RSP (E.D. Tex.); Parthenon Unified Memory
`
`Architecture LLC v. ZTE Corp. et al., No. 2:15-cv-00225-JRG-RSP (E.D. Tex.);
`
`and Parthenon Unified Memory Architecture LLC v. Apple, Inc., No. 2:15-cv-
`
`00621-JRG-RSP (E.D. Tex).
`
`2.
`
`STMicroelectronics, Inc. v. Motorola Inc. et al., No. 4:03-cv-00276-
`
`LED (E.D. Tex.), in which Patent Owner’s predecessor-in-interest asserted U.S.
`
`Patent No. 5,812,789, which is related by subject matter to the ’464 patent.
`
`Petitioners have been involved in the filing of inter partes review petitions
`
`against five related patents: U.S. Patent Nos. 7,321,368 (IPR2015-01500);
`
`7,777,753 (IPR2015-01501); 7,542,045 (IPR2015-01502); 8,054,315 (IPR2015-
`
`01494); and 8,681,164 (IPR2015-01503), In addition, concurrent with the filing of
`
`this Petition, Petitioners are filing an inter partes review petition against another
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`related patent: U.S. Patent No. 5,812,789.
`
`Lead and Back-Up Counsel and Service Information: Lead counsel is Allan
`
`M. Soobert (Reg. No. 36,284), and back-up counsel is Naveen Modi (Reg. No.
`
`-2-
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`

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`Petition for Inter Partes Review of U.S. Pat. No. 5,960,464
`
`46,224). Service information is Paul Hastings LLP, 875 15th Street NW,
`
`Washington, DC 20005, Telephone: 202-551-1700, Fax: 202-551-1705, E-mail:
`
`Samsung-PUMA-IPR@paulhastings.com. Petitioners consent to electronic service.
`
`III. PAYMENT OF FEES UNDER 37 C.F.R. § 42.15(a)
`The required fees are submitted herewith. The PTO is authorized to charge
`
`any additional fees due at any time during this proceeding to Deposit Account No.
`
`50-2613.
`
`IV. GROUNDS FOR STANDING
`Petitioners certify, under 37 C.F.R. § 42.104(a), that the ’464 patent is
`
`available for inter partes review, and that Petitioners are not barred or estopped
`
`from requesting inter partes review of the ’464 patent on the grounds identified.
`
`V.
`IDENTIFICATION OF CHALLENGES UNDER 37 C.F.R. §§ 42.22
`AND 42.104(b)
`A.
`The Challenged Claims are unpatentable on the following grounds:
`
`Statutory Grounds of Challenge
`
`Ground A. Under pre-AIA 35 U.S.C. § 102(b), Notorianni (Ex. 1031) anticipates
`
`claims 1, 3-4, 8-10, 12-13, 16-21, 23-24, 32-33, 35-36, and 40 (see
`
`Section IX.A)
`
`Ground B. Under pre-AIA 35 U.S.C. § 103, Notorianni (Ex. 1031) renders
`
`obvious claims 7 and 22 (see Section IX.B)
`
`Ground C. Under pre-AIA 35 U.S.C. § 103, Notorianni (Ex. 1031) in view of
`
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`Petition for Inter Partes Review of U.S. Pat. No. 5,960,464
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`
`Moore (Ex. 1035) renders obvious claims 2 and 11 (see Section IX.C)
`
`Ground D. Under pre-AIA 35 U.S.C. § 103, Notorianni (Ex. 1031) in view of
`
`Rathnam (Ex. 1005) renders obvious claim 34 (see Section IX.D)
`
`Ground E. Under 35 U.S.C. § 102, AGP Specification (Ex. 1024) anticipates
`
`claims 10, 16-18, 32, 36, and 40 (see Section IX.E)
`
`Ground F. Under pre-AIA 35 U.S.C. § 103, AGP Specification (Ex. 1024) in
`
`view of Rhodes (Ex. 1028) renders obvious claims 1, 3-4, 7-9, 12-13,
`
`19-24, 33, and 35 (see Section IX.F)
`
`Ground G. Under 35 U.S.C. § 103, AGP Specification (Ex. 1024) in view of
`
`Moore (Ex. 1035) renders obvious claim 11 (see Section IX.G)
`
`Ground H. Under 35 U.S.C. § 103, AGP Specification (Ex. 1024), in view of
`
`Rhodes (Ex. 1028) and Moore (Ex. 1035) renders obvious claim 2
`
`(see Section IX.H)
`
`Ground I. Under U.S.C. § 103, AGP Specification (Ex. 1024), in view of
`
`Rathnam (Ex. 1005) renders obvious claim 34 (see Section IX.I)
`
`Notorianni was filed on June 26, 1992, and issued April 4, 1995, thus
`
`qualifying as prior art at least under pre-AIA 35 U.S.C. § 102(a), (b), and (e). AGP
`
`Specification is dated July 31, 1996 and was published and available online at least
`
`as early as August 5, 1996 as evidenced by an Intel Press Release (see Ex. 1024 at
`
`1, Ex. 1039 at 1), thus qualifying as prior art at least under pre-AIA 35 U.S.C.
`
`-4-
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`Petition for Inter Partes Review of U.S. Pat. No. 5,960,464
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`§ 102(a). Moore was published in Electronics, Vol. 38, No. 8, on April 19, 1965,
`
`thus qualifying as prior art at least under pre-AIA 35 U.S.C. 102(b). Rathnam was
`
`published during the IEEE COMPCON ’96 Conference in February 1996 (see Ex.
`
`1005 at 4), was available at the Library of Congress at least as of April 4, 1996 (see
`
`id. at 2), and was indexed in the WorldCat library on April 23, 1996 (Ex. 1010 at
`
`1), thus qualifying as prior art at least under pre-AIA 35 U.S.C. § 102(a). Rhodes
`
`was filed on June 16, 1994, and issued July 11, 1995 thus qualifying as prior art at
`
`least under pre-AIA 35 U.S.C. § 102(a), (b), and (e).
`
`The Proposed Grounds are Not Redundant
`
`B.
`Grounds A-D and Grounds E-I both challenge claims 1-4, 7-13, 16-24, 32-
`
`36, and 40 of the ’464 patent. However, the grounds are not redundant because of
`
`several significant differences. For example, the primary references applied,
`
`Notorianni (Ex. 1031) for Grounds A-D and AGP Specification (Ex. 1024) for
`
`Grounds E-I, are distinct and challenge many of the claims under different
`
`statutory bases. Therefore, Patent Owner may be entitled to different defenses for
`
`the references applied in those grounds. In addition, while Notorianni and AGP
`
`Specification each address decoding and memory management, each reference is
`
`directed to distinct specific applications - e.g., Notorianni is directed to a “compact
`
`disc player” system while AGP Specification is directed more generally to “3D
`
`graphical display applications” and the interconnects enabling “high performance”
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`-5-
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`Petition for Inter Partes Review of U.S. Pat. No. 5,960,464
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`for these applications. See, e.g., Ex. 1031 at Abstract; Ex. 1024 at p. 1. Therefore,
`
`Notorianni and AGP Specification have different strengths and weaknesses, and
`
`thus map to the ’464 patent claims in different ways. Therefore, for at least these
`
`reasons, Petitioners respectfully request the Board adopt all proposed Grounds in
`
`this Petition, particularly because not adopting one of the grounds may potentially
`
`affect how Petitioners may later challenge the validity of the ’464 patent.
`
`VI. THE ’464 PATENT
`The ’464 Patent, entitled “Memory Sharing Architecture for a Decoding in a
`
`Computer System,” issued on September 28, 1999. The ’464 Patent resulted from
`
`an application filed on August 23, 1996. The ’464 Patent has 40 claims, including
`
`independent claims 1, 10, 19, and 32. The ’464 patent concerns a memory
`
`management system to construct a contiguous block of memory from two or more
`
`noncontiguous blocks of memory. See Ex. 1001, Abstract. According to the ’464
`
`patent, conventional operating systems, such as Windows 95®, “do not permit
`
`large blocks of memory to be permanently allocated for a given application or
`
`operation after booting up the computer.” Id. at 2:52-56. According to the ’464
`
`patent, conventional operating systems present problems with MPEG 2 decoding
`
`because “MPEG 2 decoding requires 2 megabytes of contiguous memory” and
`
`available memory locations are often “scattered” or fragmented throughout the
`
`memory. See, e.g., id. at 2:59-63. The ’464 patent alleges to solve this problem
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`-6-
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`Petition for Inter Partes Review of U.S. Pat. No. 5,960,464
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`through the use of a memory management system that includes a control circuit
`
`configured to both request continuous use of the main memory from the operating
`
`system and translate those fragmented, or in other words noncontiguous, memory
`
`location addresses of the main memory to contiguous addresses of a block of
`
`memory. See id. at 3:37-48. But by the ’464 patent’s priority date, others had
`
`solved the same problem of being able to form a contiguous set of memory
`
`addresses from a noncontiguous set of memory addresses. See Stone Decl., Ex.
`
`1030, ¶¶ 47-97. None of the references applied below was considered during
`
`prosecution of the ’464 patent. See, e.g., Ex. 1001 at 1-2 (References Cited); see
`
`generally Ex. 1002.
`
`VII. CLAIM CONSTRUCTION
`inter partes review,
`In
`the Board applies the broadest reasonable
`
`interpretation (“BRI”) standard to construe claim terms of an unexpired patent.2
`
`Under the BRI standard, terms are given their “broadest reasonable interpretation,
`
`consistent with the specification.” In re Yamamoto, 740 F.2d 1569, 1571 (Fed. Cir.
`
`2 Because the standards applied in litigation differ from PTO proceedings, any
`
`interpretation of claim terms herein is not binding upon Petitioners in any related
`
`litigation. See In re Zletz, 13 USPQ2d 1320, 1322 (Fed. Cir. 1989). Petitioners
`
`reserve their rights to make all arguments in the district court with respect to claim
`
`construction and on other grounds (e.g., 35 U.S.C. § 112).
`
`-7-
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`Petition for Inter Partes Review of U.S. Pat. No. 5,960,464
`
`1984); Office Patent Trial Practice Guide, 77 Fed. Reg. 48,756, 48,764 (Aug. 14,
`
`2012). Claim terms are “generally given their ordinary and customary meaning,”
`
`which is the meaning that the term would have to a person of ordinary skill in the
`
`art. See In re Translogic Tech., Inc., 504 F.3d 1249, 1257 (Fed. Cir. 2007) (quoting
`
`Phillips v. AWH Corp., 415 F.3d 1303, 1312, 1313 (Fed. Cir. 2005) (en banc)).
`
`A. Claim Terms To Be Construed
`For purposes of this proceeding only, Petitioners propose BRI constructions
`
`for the following terms. All remaining terms should be given their plain meaning.
`
` “translate”
`
`1.
`The term “translate” appears in independent claims 1, 10, 19, and 32. For
`
`purposes of this proceeding, the term “translate” should be interpreted as
`
`“convert.” This understanding is consistent with how “translate” is used in the
`
`claims and specification of the ’464 patent. For example, the patent uses both
`
`“translate” and “convert” interchangeably. See, e.g., Ex. 1001 at Abstract (“the
`
`video decoder circuit can perform operations on a 2-megabyte contiguous block of
`
`memory, where the microcontroller employs the lookup table to translate each 2-
`
`megabyte contiguous address requested by the video decoder circuit to its
`
`appropriate page in the main memory”), 8:35-40 (“the microcontroller 120 receives
`
`memory read/write requests from the video decoding circuit 126 and/or audio
`
`decoding circuit 128, and converts these requests to their appropriate page
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`-8-
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`Petition for Inter Partes Review of U.S. Pat. No. 5,960,464
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`descriptor addresses based on the lookup table”). In related litigation, the parties
`
`have also agreed that the term “translate” should be construed as “convert.” See,
`
`e.g., Ex. 1038 at 6.
`
`2.
`“algorithmically translate the noncontiguous addresses to
`the contiguous addresses”
`
`The term “algorithmically translate the noncontiguous addresses to the
`
`contiguous addresses” appears in dependent claims 7 and 22. For purposes of this
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`proceeding, the term “algorithmically translate the noncontiguous addresses to the
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`contiguous addresses” should be interpreted as “convert using at least one
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`mathematical operation.” This understanding is consistent with how the term is
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`used in the claims and specification of the ’464 patent. For example, the patent
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`both distinguishes address “translation” using a lookup table from “algorithmic
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`translation” and indicates that “algorithmic translation” involves the use of at least
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`one “mathematical operation.” See, e.g., Ex. 1001 at 8:15-28. In related litigation,
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`the parties have also agreed that the term “algorithmically translate the
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`noncontiguous addresses to the contiguous addresses” should be construed as
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`“convert using at least one mathematical operation.” See, e.g., Ex. 1038 at 6.
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`Expiration of the ’464 Patent
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`B.
`In addition to the BRI analysis above, Petitioners recognize that the ’464
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`patent appears set to expire in August 2016, which will be subsequent to the
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`requested institution of trial in this proceeding, but may precede a final decision. In
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`Petition for Inter Partes Review of U.S. Pat. No. 5,960,464
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`such cases, the Board has held (citing In re Rambus, Inc., 694 F.3d 42, 46 (Fed.
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`Cir. 2012)), that it will construe patent claims, once expired, according to the
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`standard applied by the district courts by applying the principles set forth in
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`Phillips, 415 F.3d at 1312. See, e.g., Toyota Motor Corp. v. Hagenbuch, IPR2013-
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`00483, Paper No. 37 at 5 (Dec. 5, 2014). Petitioners respectfully submit that this
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`change in standards would not affect any of the proposed grounds in this Petition,
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`especially in view of Patent Owner’s interpretations of the claims under the
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`Phillips standard.
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`VIII. LEVEL OF ORDINARY SKILL IN THE ART
`A person of ordinary skill in the art at the time of the alleged invention of
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`the ’464 patent would have had an accredited Bachelor’s degree in Electrical
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`Engineering and/or Computer Science and/or Computer Engineering and had three
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`years’ experience in the fields of data compression and overall computer system
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`architecture. This person would have been capable of understanding and applying
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`the prior art references described herein. Ex. 1030, ¶¶ 43-46.
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`Petition for Inter Partes Review of U.S. Pat. No. 5,960,464
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`IX. SPECIFIC GROUNDS OF CHALLENGE
`A. Ground A: Notorianni anticipates claims 1, 3-4, 8-10, 12-13, 16-21,
`23-24, 32-33, 35-36, and 40
`1.
`a.
`1[pre]: “In a computer system having a main memory, a storage device
`having encoded data stored therein and a processor controlled by an
`operating system, an electronic device comprising:”
`Notorianni discloses this limitation. See, e.g., Ex. 1031 at 3:45-61, Fig. 1,
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`Claim 1
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`Abstract; see also Ex. 1030 at ¶ 47. For example, Notorianni teaches a compact
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`disc player that includes a main memory (e.g., random access memory RAM), a
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`storage device (e.g., ROM), and a processor (e.g., microprocessor unit MPU). See,
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`e.g., Ex. 1031 at 3:45-61. The microprocessor unit MPU is controlled by an
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`operating system, CDRTOS. See, e.g., id.; see also id. at Fig. 1. The compact disc
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`ROM is a storage device that has encoded data stored within it. See, e.g., Ex. 1031
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`at Abstract (“In particular, image and audio files are to be read from a CD-ROM
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`disc and decoded in real-time.”) (emphasis added); see also Ex. 1030 at ¶ 47;
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`analysis and citations below for other claim elements.
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`b.
`1[a]: “a decoding circuit coupled to receive and decode the encoded data
`from the storage device; and”
`Notorianni discloses this limitation. See, e.g., Ex. 1031 at 3:45-66, Fig. 1,
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`Abstract; see also Ex. 1030 at ¶ 47. Notorianni discloses multiple decoding
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`circuits, including a video decoder and an adaptive pulse code modulation decoder
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`(“ADPCM”). See, e.g., Ex. 1031 at 3:45-66. The decoders are each coupled to
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`Petition for Inter Partes Review of U.S. Pat. No. 5,960,464
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`receive encoded data from the storage device (i.e., CD-ROM). See, e.g., Ex. 1031
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`at Abstract (“In particular, image and audio files are to be read from a CD-ROM
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`disc and decoded in real-time.”) (emphasis added); see also Ex. 1030 at ¶ 47.
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`c.
`1[b]: “a control circuit coupled to the decoding circuit, the processor
`and the main memory, the control circuit being configured to request
`continuous use of several portions of the main memory from the operating
`system, the portions of the main memory having noncontiguous addresses,
`and being configured to translate the noncontiguous addresses to contiguous
`addresses of a block of memory, and”
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`Notorianni teaches this element. See Ex. 1030 at ¶ 47. For example,
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`Notorianni discloses an access controller (“AC”) that is coupled by a system bus to
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`the decoding circuit (e.g., the video decoder and the adaptive pulse code
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`modulation decoder), the processor (e.g., microprocessor unit MPU) and the main
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`memory (e.g., RAM). See, e.g., Ex. 1031 at 3:45-67; see also id. at Fig. 1.
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`The control circuit is configured to request continuous use of several
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`portions of the main memory from the operating system by “reserv[ing] blocks of
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`memory in a desired plane of the memory.” See, e.g., Ex. 1031 at 4:3-41 (emphasis
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`added); see also Ex. 1030 at ¶ 47. The portions of memories that are requested
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`have noncontiguous addresses. See, e.g., Ex. 1031 at 6:15-22 (“[B]uffers of
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`different sizes are allocated and released many times. This leads to the problem of
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`memory fragmentation … as illustrated in FIG. 3. The unallocated areas (cross-
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`hatched) are small and scattered between the allocated blocks.”) (emphasis added).
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`The control circui