Conference Materials
`
`Fainnont Hotel, San Jose
`October 10-11, 1995
`
`‘O
`
`Sponsored by
`MICRODESIGN
`Resounces
`
`5i3‘E1Tr‘1‘]53L.1 n g :.:<:hifoit il
`
`f._i);:1>>/1
`
`

`
`AGENDA
`
`WELCOME Michael Slater
`
`KEYNOTE: SEMICONDUCTOR TECHNOLOGY AND THE GROWTH OF THE PC INDUSTRY
`
`Craig Banett, Intel
`
`X86 MICROPROCESSORS Moderator: Michael Slater, MicroDesign Resources
`
`Shifting Sands in the x86 Landscape
`Michael Slater
`
`P6: The Myths and Realities
`Robert Colwell, Intel
`
`BREAK: SPONSORED BY NEC ELECTRONICS
`
`AMD-K5 Performance and Microarchitecture Tradeoffs
`David Witt, AMD
`
`Optimizing the M1 for Windows 95
`Mark Bluhm, Cyrix
`
`_ Overview of the Nx686 Processor
`
`1 Greg Favor, NexGen
`Q&A Panel
`All Speakers above
`LUNCH
`
`Market Trends for x86 Microprocessors
`Aaron Goldberg, Computer Intelligence InfoCorp
`
`PROCESSORS FOR MULTIMEDIA Moderator: Yong Yao, MicroDesign Resources
`
`Implementation Strategies for Multimedia
`Yong Yao
`
`Architecture of a Broadband Mediaprocessor
`John Moussouris, Microunity
`
`A VLIW and SIMD Vector Processor for PC Multimedia
`
`Stephen Purcell, Chromatic
`The TriMedia VLIW-Based PCI Multimedia Processor
`Gerrit Slavenburg, Philips Semiconductors
`BREAK: SPONSORED BY LSI LOGIC
`
`M.F.A.S.'I': A Highly Parallel, Scalable, Single-Chip DSP
`Gerald Pechaneh, IBM Microelectronics
`
`UltraSPARC’s Instruction Set Extensions for Multimedia
`Marc Tremblay, Sun Microsystems
`A Multimedia 586 Processor for Consumer PCs
`Forrest Normd, Cyrix
`
`5200
`
`QSIA Panel
`All speakers above
`MICROPROCESSOR REPORT AWARDS
`Nick Tredermick, Tredenniclz, Inc.
`
`5:30
`
`RECEPTIONILITERATURE & DEMONSTRATION CENTER OPENING
`
`8:30PM-10:30PM
`
`AFFINITY SESSIONS
`
`Open Session on Cryptography
`
`Benchmarks & Workloads Roundtable
`
`Packaging Technology Directions
`
`The Issue of Branding Microprocessors
`
`Sponsored by
`IVIICRODESIGN
`if
`
`1995 Microprocessor Forum
`
`Page 2 of 16
`
`

`
`
`
`AGENDA
`
`EMBEDDED PROCESSORS
`
`Moderator: james L. Turley, MicroDesign Resources
`
`Ubiquitous Computers: The New Embedded Applications
`James L. Turley
`
`Bringing RISC Technology to Communications
`Robert O'Dell, Motorola
`
`An Integrated i960 to Enhance Server and Network I/O
`Elliot Garbus, Intel
`
`SH-DSP & SH-FPU: Optimized Communication & Consumer Microprocessors
`Jim Slager, Hitachi
`
`StrongARM Reaches for Ever Higher Performance
`Rich Witch, Digital
`
`10:20
`
`BREAK: SPONSORED BY FUJITSU MICROELECTRONICS
`
`A Scalable 64-bit RISC for Custom Designs
`Bob Caulk, LSI Logic
`
`A PowerPC Core for Cost-Sensitive Consumer Applications
`Kim O'Donnell, IBM
`
`A Next-Generation DSP Solution for Communications Applications & Beyond
`Roman Robles, Motorola
`
`12:00
`
`1:10
`
`Q&A Panel
`
`All speakers above
`
`LUNCH
`
`HIGH-PERFORMANCE RISC MICROPROCESSORS
`
`Moderator: Linley Gwennap, MicroDesign Resources
`RISC Processors: Generations
`
`Linley Gwenrlap
`
`PA-73OOI.C: A Highly Integrated System on a Chip
`Tom Meyer; Hewlett-Packard
`
`The Performance of PowerPC 603a and 604e Microprocessors
`Kaivalya Dixit, IBM
`Colorado 4- Extends 32-bit SPARC Performance
`
`2:30
`
`Mitch Alsup, Ross Technology
`BREAK: SPONSORED BY MIPS TECHNOLOGIES
`
`UltraSPARC2: Advancing SPARC Performance
`Anant Agrawal, Sun Microsystems
`
`Alpha 21 164A: Continued Performance Leadership
`Pete Bannon, Digital Semiconductor
`
`4:10
`
`Q&r:A Panel
`All speakers above
`PANEL: FUTURE OF MICROPROCESSOR SYSTEM ARCHITECTURE
`Moderator: Michael Slater
`
`Dirk Meyer; Digital
`Lin Nease, Hewlett—Packard
`Don North, Apple
`
`Richard Oehler; IBM
`Fred Pollack, Intel
`George White, Corollary
`
`5:00
`
`5:10
`
`WRAP-UP Michael Slater
`
`CONFERENCE ADJOURNED
`
`Sponsored by
`MICRODESIGN
`EEEIEIE
`
`1995 Microprocessor Forum
`
`-
`
`Page 3 of 16
`
`‘
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`2
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`Page 4 of 16
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`Page 5 of 16
`
`

`
`
`
`The TriMedia VLIW-Based
`
`PCI Multimedia Processor
`
`................................................................... --,
`
`Gerrit Slavenburg
`Philips Semiconductors
`
`Sponsored by
`
`MICRODESIGN
`
`Page 6 of 16
`
`12
`
`

`
`The Trimedia VLIW—Based PCI Multimedia Processor
`
`The Trimedia VLIW-based PCI
`
`Multimedia Processor System
`
`Gerrit Slavenburg - Philips Semiconductors
`
`TM-1 : outside
`
`multl-standard, as In “any"
`
`Video and Audio (de)compression
`3D graphics
`customer programmable, using
`standard C
`
`CCIR 601/656
`
`ccm 501/555
`YUV 4:2:2
`
`Microprocessor Forum
`
`October 10-11, 1995
`
`Page 7 of 16
`
`

`
`The Trimedia VLIW-Based PCI Multimedia Processor
`
`TM-1 configurations
`
`accellerator
`
`(dig) VCR
`TV monitor
`audio
`
`stand alone
`
`TV m°nit°r
`
`TM-1 : inside
`
`Serial
`digital audio
`
`synchronous
`setial in for
`
`Pclmuurlslnvo "
`
`Microprocessor Forum
`
`12-2
`
`October 10-11, 1995
`
`Page 8 of 16
`
`

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`Page 9 of 16
`
`

`
`The Trimedia VLIW—Based PCI Multimedia Processor
`
`Image Co-Processor capabilities
`
`+ unlimited number of
`live video windows
`+ arbitmry H & V scaling
`using quality filters
`+ can drive RGB or YUV
`
`graphics cards
`+ up to 50 Mpixel/sec refresh
`
`AudioNideo synchronization
`
`Video In :
`Video Out :
`
`Audio In,
`
`cameraloutside world is pixel clock master
`programmable 1 0 MHz - 38 MHz, resolution 0.02 Hz
`(very low jitter synthesizer)
`
`Audio Out:
`
`programmable 256 or 3841!. of 0 - 20 MHz, 0.02 Hz
`
`Synchronization is achieved by software PLL's that vary the sampling
`frequencies/phase by minute amounts. This powertul method is universal
`and avoids application speclflc external hardware.
`
`Microprocessor Forum
`
`12-4
`
`October 10-11, 1995
`
`Page 10 of 16
`
`

`
`The Trimedia VLIVV-Based PCI Multimedia Processor
`
`TM-1 DSPCPU block diagram
`
`TM-1 DSPCPU functional units
`
`Fllnctional Unit
`
`constant
`
`integer ALU
`
`load/store
`
`DSP ALU
`
`DSP MUL
`shifter
`branch
`
`intlfloat mul
`
`float. ALI!
`
`float comnare
`
`float sort/div
`
`—‘-‘I*3I~)'J3h3I~’l\)l\3LlIlII
`
`Latencv
`
`Recoverv Time
`
`;‘,--'.»:»'..a—-uN:n-—-
`
`;_n-n—A—A—A—A-nu-5-5.:
`
`Microprocessor Forum
`
`October 10-11, 1995
`
`Page 11 of 16
`
`

`
`The Trimedia VLIW-Based PCI Multimedia Processor
`
`TM-1 instruction format
`
`9 5 operations issued every clock cycle (10 nsec)
`9 Functional units are pipelined - each can start one operation per cycle
`o Issue slots are “guarded" for branch avoidance, delay slot utilization
`o lnterruptable opcodes facilitate lightweight context switching
`o Instructions compressed in memory and lcache, decornpressed on the fly
`
`umei
`
`lfir8il
`
`Trimedia programmer’s model
`
`registers
`
`'“°"'°'V map
`
`Microprocessor Forum
`
`12-6
`
`October 10-11, 1995
`
`Page 12 of 16
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`Page 13 of 16
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`Page 14 of 16
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`Page 15 of 16
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`Page 16 of 16