iflash.h
`
`1 /*
`2 * iflash.h 1.8 2000/06/12 21:27:27
`3 *
`4 * The contents of this file are subject to the Mozilla Public License
`5 * Version 1.1 (the "License"); you may not use this file except in
`6 * compliance with the License. You may obtain a copy of the License
`7 * at http://www.mozilla.org/MPL/
`8 *
`9 * Software distributed under the License is distributed on an "AS IS"
`10 * basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See
`11 * the License for the specific language governing rights and
`12 * limitations under the License.
`13 *
`14 * The initial developer of the original code is David A. Hinds
`15 * <dahinds@users.sourceforge.net>. Portions created by David A. Hinds
`16 * are Copyright (C) 1999 David A. Hinds. All Rights Reserved.
`17 *
`18 * Alternatively, the contents of this file may be used under the
`19 * terms of the GNU Public License version 2 (the "GPL"), in which
`20 * case the provisions of the GPL are applicable instead of the
`21 * above. If you wish to allow the use of your version of this file
`22 * only under the terms of the GPL and not to allow others to use
`23 * your version of this file under the MPL, indicate your decision by
`24 * deleting the provisions above and replace them with the notice and
`25 * other provisions required by the GPL. If you do not delete the
`26 * provisions above, a recipient may use your version of this file
`27 * under either the MPL or the GPL.
`28 */
`29
`30 #ifndef _LINUX_IFLASH_H
`31 #define _LINUX_IFLASH_H
`32
`33 /* Extended CIS registers for Series 2 and 2+ cards */
`34 /* The registers are all offsets from 0x4000 */
`35 #define CISREG_CSR
`0x0100
`36 #define CISREG_WP
`0x0104
`37 #define CISREG_RDYBSY
`0x0140
`38
`39 /* Extended CIS registers for Series 2 cards */
`40 #define CISREG_SLEEP
`0x0118
`41 #define CISREG_RDY_MASK
`0x0120
`42 #define CISREG_RDY_STATUS
`0x0130
`43
`44 /* Extended CIS registers for Series 2+ cards */
`45 #define CISREG_VCR
`0x010c
`46
`47 /* Card Status Register */
`48 #define CSR_SRESET
`0x20
`49 #define CSR_CMWP
`0x10
`50 #define CSR_PWRDOWN
`0x08
`51 #define CSR_CISWP
`0x04
`52 #define CSR_WP
`0x02
`53 #define CSR_READY
`0x01
`
`/* Soft reset */
`/* Common memory write protect */
`/* Power down status */
`/* Common memory CIS WP */
`/* Mechanical write protect */
`/* Ready/busy status */
`
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`iflash.h
`
`0x01
`
`/* Ready acknowledge */
`/* 1 = high performance */
`
`/* Enable block locking */
`/* Common memory write protect */
`/* Common memory CIS WP */
`
`54
`55 /* Write Protection Register */
`56 #define WP_BLKEN
`0x04
`57 #define WP_CMWP
`0x02
`58 #define WP_CISWP
`0x01
`59
`60 /* Voltage Control Register */
`/* 0 = 5V, 1 = 3.3V */
`61 #define VCR_VCC_LEVEL
`0x80
`/* Vpp Valid */
`62 #define VCR_VPP_VALID
`0x02
`63 #define VCR_VPP_GEN
`/* Integrated Vpp generator */
`64
`65 /* Ready/Busy Mode Register */
`66 #define RDYBSY_RACK
`0x02
`67 #define RDYBSY_MODE
`0x01
`68
`69 #define LOW(x) ((x) & 0xff)
`70
`71 /* 28F008SA-Compatible Command Set */
`72 #define IF_READ_ARRAY
`0xffff
`73 #define IF_INTEL_ID
`0x9090
`74 #define IF_READ_CSR
`0x7070
`75 #define IF_CLEAR_CSR
`0x5050
`76 #define IF_WRITE
`0x4040
`77 #define IF_BLOCK_ERASE
`0x2020
`78 #define IF_ERASE_SUSPEND
`0xb0b0
`79 #define IF_CONFIRM
`0xd0d0
`80
`81 /* 28F016SA Performance Enhancement Commands */
`82 #define IF_READ_PAGE
`0x7575
`83 #define IF_PAGE_SWAP
`0x7272
`84 #define IF_SINGLE_LOAD
`0x7474
`85 #define IF_SEQ_LOAD
`0xe0e0
`86 #define IF_PAGE_WRITE
`0x0c0c
`87 #define IF_RDY_MODE
`0x9696
`88 #define IF_RDY_LEVEL
`0x0101
`89 #define IF_RDY_PULSE_WRITE
`0x0202
`90 #define IF_RDY_PULSE_ERASE
`0x0303
`91 #define IF_RDY_DISABLE
`0x0404
`92 #define IF_LOCK_BLOCK
`0x7777
`93 #define IF_UPLOAD_STATUS
`0x9797
`94 #define IF_READ_ESR
`0x7171
`95 #define IF_ERASE_UNLOCKED
`0xa7a7
`96 #define IF_SLEEP
`0xf0f0
`97 #define IF_ABORT
`0x8080
`98 #define IF_UPLOAD_DEVINFO
`0x9999
`99
`100 /* Definitions for Compatible Status Register */
`101 #define CSR_WR_READY
`0x8080
`/* Write state machine status */
`102 #define CSR_ERA_SUSPEND
`0x4040 /* Erase suspend status */
`103 #define CSR_ERA_ERR
`0x2020
`/* Erase status */
`104 #define CSR_WR_ERR
`0x1010
`/* Data write status */
`105 #define CSR_VPP_LOW
`0x0808
`/* Vpp status */
`106
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`iflash.h
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`107 /* Definitions for Global Status Register */
`108 #define GSR_WR_READY
`0x8080
`/* Write state machine status */
`109 #define GSR_OP_SUSPEND
`0x4040 /* Operation suspend status */
`110 #define GSR_OP_ERR
`0x2020
`/* Device operation status */
`111 #define GSR_SLEEP
`0x1010
`/* Device sleep status */
`112 #define GSR_QUEUE_FULL
`0x0808 /* Queue status */
`113 #define GSR_PAGE_AVAIL
`0x0404 /* Page buffer available status */
`114 #define GSR_PAGE_READY
`0x0202 /* Page buffer status */
`115 #define GSR_PAGE_SELECT
`0x0101 /* Page buffer select status */
`116
`117 /* Definitions for Block Status Register */
`118 #define BSR_READY
`0x8080
`/* Block status */
`119 #define BSR_UNLOCK
`0x4040
`/* Block lock status */
`120 #define BSR_FAILED
`0x2020
`/* Block operation status */
`121 #define BSR_ABORTED
`0x1010
`/* Operation abort status */
`122 #define BSR_QUEUE_FULL
`0x0808 /* Queue status */
`123 #define BSR_VPP_LOW
`0x0404
`/* Vpp status */
`124
`125 #endif /* _LINUX_IFLASH_H */
`126
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