INTERNATIONAL
`
`ISOIIEC
`
`STANDARD
`
`7816-3
`
`First edition
`1989-09-15
`
`Identification cards — Integrated circuit(s) cards
`with contacts —
`
`Part 3 :
`
`Electronic signals and transmission protocols
`
`Cartes d’idenflflcation — Canes a circuit(s) intégré(s) a contacts -
`
`Parfle 3 : Signaux électroniques et protocoles de transmission
`
`Reference number
`ISO/IEC 7816-3 : 1989 (E)
`
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`ISO/IEC 7816-3 : 1989 (E)
`
`Contents
`
`Foreword .................................................................................... ..
`
`Introduction ................................................................................ ..
`
`1 Scope ...................................................................................... ..
`
`2 Normative references .............................................................. ..
`
`3 Definitions ............................................................................... ..
`
`4 Electrical characteristics of the contacts .................................. ..
`
`5 Operating procedure for integrated circuit(s) cards .................. ..
`
`6 Answer-to-Reset
`
`Page
`
`iii
`
`iv
`
`1
`
`1
`
`1
`
`1
`
`4
`
`7
`
`7 Protocol type selection (PTS) .................................................. ._
`
`12
`
`8 Protocol type T=0, asynchronous half duplex
`character transmission protocol .................................. ..
`9 Protocol type T=1, asynchronous half duplex
`block transmission protocol ........................................ ..
`
`12
`
`14
`
`© ISO/IEC 1989
`All rights reserved. No part of this publication may be reproduced or utilized in any form or by
`any means.
`electronic or mechanical,
`including photocopying and microfilm. without
`permission in writing from the publisher.
`ISO/IEC Copyright Office - Case postale 56 - CH-1211 Geneva 20 - Switzerland
`Printed in Switzerland
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`ISO/IEC 7816-3 : 1989 (E)
`
`Foreword
`
`ISO (the International Organization for Standardization) and IEC (the
`International Electrotechnical Commission) together form a system for
`worldwide standardization as a whole. National bodies that are members
`of ISO or IE0 participate in the development of International Standards
`through technical committees established by the respective organization
`to deal with particular fields of technical activity. ISO and IEC technical
`committees collaborate in fields of mutual
`interest. Other international
`organizations, governmental and non-governmental.
`in liaison with ISO
`and IEC. also take part in the work.
`
`In the field of information technology. ISO and IEC have established a
`joint technical committee,
`ISO/IEC JTC1. Draft International Standards
`adopted by the joint technical committee are circulated to national bodies
`for approval before their acceptance as international Standards They are
`approved in accordance with procedures requiring at least 75 % approval
`by the national bodies voting.
`
`International Standard ISO/IEC 7816-3 was prepared by Joint Technical
`Committee ISO/IEC JTC1. Information Technology.
`
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`ISO/IEC 7816-3: 1989 (E)
`
`Introduction
`
`ISO/IEC 7816 is one of a series of standards
`This part of
`describing the parameters for
`integrated—circuit(s) cards with
`contacts and the use of such cards for international interchange.
`
`information
`These cards are identification cards intended for
`exchange negoclated between the outside and the integrated
`circuit in the card. As a result of an information exchange, the card
`delivers
`information (computation results,
`stored data), and/or
`modifies its content (data storage, event memorization).
`
`information
`During the preparation of this International Standard,
`was gathered concerning relevant patents upon which application
`of this standard might depend. Relevant patents were identified in
`France and USA, the patent holder being Bull S.A.
`in each case.
`However,
`ISO cannot
`give
`authoritative
`or
`comprehensive
`information about evidence, validity or scope of patents or
`like
`rights.
`
`licences will be granted on
`The patent holder has stated that
`appropriate terms to enable application of this part of
`ISO/IEC
`7816, provided that those who seek licences agree to reciprocate.
`
`Further information is available from:
`
`BULL S.A.
`
`Division de la Propriete Industrielle
`25, avenue de la Grande Armee
`75016 PARIS
`FRANCE
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`INTERNATIONAL STANDARD
`
`ISO/IEC 7816-3 : 1989 (E)
`
`Identification cards - Integrated circuit(s) cards with
`contacts -
`
`Part3:
`
`Electronic signals and transmission protocols
`
`Scope
`
`3 Definitions
`
`ISO/IEC 7816 specifies the power and
`This part of
`signal structures, and information exchange between an
`integrated circuit(s) card and an interface device such
`as a terminal.
`
`rates, voltage levels, current
`It also covers signal
`values,
`parity
`conventions,
`operation
`procedures,
`transmission mechanisms and communication with the
`integrated circuit(s) card.
`
`It does not cover information and instruction content,
`such as identification of issuers and users, services and
`limits,
`security features,
`journaling and instruction
`definitions.
`
`The term identification card is defined in ISO 7810. For
`the purpose of this part of ISO/IEC 7816, the following
`definitions apply:
`
`Interface device: A terminal, communication device or
`machine to which the integrated circuit(s)
`card is
`electrically connected during operation.
`
`State H : High state logic level.
`
`State L :
`
`Low state logic level.
`
`State Z : Mark (as defined in ISO 1177).
`
`State A:
`
`Space (as defined in ISO 1177).
`
`2 Normative references
`
`contain provisions which,
`following standards
`The
`through reference in this text, constitute provisions of
`this part of ISO/IEC 7816.
`
`At the time of publication, the editions indicated were
`valid. All standards are subject to revision, and parties
`to agreements based on this part of ISO/IEC 7816 are
`encouraged to investigate the possibility of applying the
`most
`recent editions of the standards listed below.
`Members of IEC and ISO maintain registers of currently
`valid International Standards.
`
`'XY': Hexadecimal notation, equal to XY to the base 16.
`
`4 Electrical characteristics of the contacts
`
`4.1 Electrical functions
`
`Contacts assignments are specified in ISO 7816-2,
`supporting at least the following electrical circuits:
`
`IIO:
`
`VPP:
`
`Input or output for serial data to the integrated
`circuit inside the card.
`
`Programming voltage input (optional use by the
`card).
`
`GND: Ground (reference voltage).
`
`ISO 1177 : 1985, Information processing — Character
`structure for start/stop and synchronous character
`oriented transmission.
`
`CLK;
`
`RST:
`
`ISO 7810 : 1985. characteristics.
`
`Identification cards — Physical
`
`identification cards — Integrated
`ISO 7816-1:1987,
`circuits) cards with contacts — Pan‘
`1
`.' Physical
`characteristics.
`
`Identification cards — Integrated
`ISO 7816-2:1988,
`circuit(s) cards with contacts — Pan‘ 2: Dimensions and
`location of the contacts.
`
`Clocking or timing signal (optional use by the
`card).
`
`Either used by itself (reset signal supplied from
`the interface device) or in combination with an
`additional
`internal reset control circuit (optional
`use
`by
`the
`card).
`If
`internal
`reset
`is
`implemented,
`the voltage supply on VCC is
`mandatory.
`
`VCC:
`
`Power supply input (optional use by the card).
`
`NOTE — The use of two remaining contacts will be
`defined in the appropriate application standards.
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`
`4.2 Voltage and current values
`
`4.2.1 Measurement conventions
`
`All measurements are defined with respect to contact GND and in an ambient temperature range of 0° C to 50° C.
`
`All currents flowing into the card are considered positive.
`
`All timings shall be measured relative to the appropriate threshold levels as defined in 4.2.3 to 4.2.7.
`A contact is inactive when it remains between 0V and 0.4V referenced to contact GND for currents less than 1 mA.
`
`4.2.2 Abbreviations
`
`Vll-l High level input voltage
`l/.L
`Low level input voltage
`VCC Power supply voltage at VCC
`Vpp Programming voltage at VPP
`VOH High level output voltage
`VOL Low level output voltage
`fa
`Rise time between 10 % and 90 % of signal amplitude
`tF
`Fall time between 90 % and 10 % of signal amplitude
`4.2.3
`I/O
`
`High level input current
`IIH
`Low level input current
`l.L
`Supply current at VCC
`[cc
`Programming current at VPP
`Ipp
`High level output current
`IOH
`Low level output current
`for
`Input capacitance
`Cw
`Cour Output capacitance
`
`This contact is used as input (reception mode) or output (transmission mode) for data exchange. Two possible
`states exist for I/O :
`
`— mark or high state (state Z),
`imposed by the transmitter;
`— space or low state (state A), if this state is imposed by the transmitter.
`
`if the card and the interface device are in reception mode or if this state is
`
`When the two ends of the line are in reception mode, the line shall be maintained in state Z When the two ends are
`in non-matched transmit mode. the logic state of the line may be indeterminate. During operation, the interface
`device and the card shall not both be in transmit mode.
`
`Table 1 — Electrical characteristics of IIO under normal operation conditions
`
`
`
`V
`
`
`
`Either
`
`
`
`,,
`
`”
`
`
`
`j °
`
`
`
`——
`
`
`
`
`
`1) Forthe interface device, take into account both conditions.
`2) It is assumed that a pull-up resistor is used in the interface device (recommended value: 20 kOhm).
`3) The voltage on l/O shall remain between -0.3 V and Vcc +0.3 V.
`
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`4.2.4 VPP
`
`This contact may be used to supply the voltage required to program or to erase the internal non-volatile memory.
`Two possible states exist for VPP:
`idle state and active state, as defined in table 2. The idle state shall be
`maintained by the interface device unless the active state is required.
`Table 2 — Electrical characteristics of VPP under normal oe-ration conditions
`
`
`
`Idle state
`(programming non active)
`
`Active State
`(programming the card)
`
`X Vcc
`
`0.975 x P
`
`
`
`V
`mA
`
`V
`mA
`
`Vcc
`
`20
`
`1.025 x P
`1
`
`
`
`The card provides the interface device with the values of P and I (default values : P = 5 and I = 50).
`See 6.1.4.4.
`
`Rise or fall time: 200 /,l,S maximum. The rate of change of Vpp shall not exceed 2 V/us.
`
`The maximum power Vpp x [pp shall not exceed 1.5 W when averaged over any period of 1 s.
`4.2.5 CLK
`
`The actual frequency, delivered by the interface device on CLK, is designated either by time initial frequency during
`the answer to reset, or by fs the subsequent frequency during subsequent transmission. For frequency values, see
`6.1.4.4.
`
`Duty cycle for asynchronous operation shall be between 45 % and 55 % of the period during stable operation. Care
`shall be taken when switching frequencies (from ft to fa) to ensure that no pulse is shorter than 45 % ofthe shorter
`period.
`
`Table 3 — Electrical characteristics of CLK under normal operation conditions
`
`Conditions Maximum
`
`/ll-Imax = 2|: 10 HA
`
`0.7
`
`Vcc -
`
`2) The voltage on CLK shall remain between -0.3 V and Vcc+0.3 V.
`
`fizz
`
`tp
`
`CIN =
`
`9 % of period with a
`maximum of 0.5 as
`
`1) For the interface device, take into account the three conditions.
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`ISO/IEC 7816-3 : 1989 (E)
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`4.2.6 RST
`
`The reset signal at RST is delivered according to subclause 5.2.
`
`Table 4 — Electrical characteristics of RST under normal operation conditions
`
`Conditions
`
`Minimum
`
`Maximum
`
`/|H max = i
`
`/IA
`
`Vcc 2)
`
`
`
`1) For the interface device. take into account both conditions.
`2) The voltage on RST shall remain between -0.3 V and V¢c+0.3 V.
`
`4.2.7 VCC
`
`_
`
`This contact is used to supply the power voltage Vcc.
`
`Table 5 — Electrical characteristics of VCC under normal operation conditions
`
`
`
`V
`
`mA
`
`4.75
`
`5.25
`
`200
`
`
`
`Svmw
`Vcc
`
`[CC
`
`
`
`The electrical circuits shall not be activated until the
`contacts are connected to the interface device so as to
`
`avoid possible damage to any card meeting these
`standards.
`
`The activation of the contacts by the interface device
`shall consist of the consecutive operations:
`
`— RST is in state L;
`
`— VCC shall be powered;
`
`— IIO in the interface device shall be put
`reception mode;
`
`in
`
`— VPP shall be raised to idle state;
`
`— CLK shall be provided with a suitable and stable
`clock. See 4.2.5.
`
`5 Operating procedure for integrated circuit(s)
`cards
`
`This operating procedure applies to every integrated
`circuit(s) card with contacts.
`_
`
`The dialogue between the interface device and the card
`shall be conducted through the consecutive operations:
`
`— connection and activation of the contacts by the
`interface device;
`
`— reset of the card;
`
`— answer to reset by the card;
`
`— subsequent information exchange between the
`card and the interface device;
`
`— deactivation of the contacts by the interface
`device.
`
`operations
`These
`subclauses.
`
`are
`
`specified
`
`in
`
`the
`
`following
`
`NOTE — An active state on VPP should only be provided
`and maintained when requested by the card
`
`5.1 Connection and activation of the contacts
`
`4
`
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`/R = Internal reset
`
`AL = Active low reset
`
`SH = Synchronous active high reset
`
`ISO/IEC 7816-3: 1989 (E)
`
`
`
`
`11
`‘
`fl
`
`‘3
`l F
`
`igure 1 — Reset of the card
`
`NOTE — The hatched area indicates a period when the state of l/O is undefined.
`
`5.2 Reset of the card
`
`initiated by the interface device,
`is
`A card reset
`card
`shall
`respond
`with
`an
`whereupon
`the
`Answer-to-Reset as described in clause 6.
`
`By the end of the activation of the contacts (RST in state
`L, VCC powered and stable.
`I/O in reception mode in
`the interface device, VPP stable at
`idle state, CLK
`provided with a suitable and stable clock),
`the card
`answering asynchronously is ready for
`reset. See
`figure 1.
`
`The clock signal is applied to CLK at time To. The I/O
`line shall be set to state Z within 200 clock cycles of the
`clock signal (t2) being applied to CLK (time t2 after To).
`
`An internally reset card is reset after a few cycles of
`the clock signal. The Answer-to-Reset on I/O shall begin
`between 400 and 40000 clock cycles (t1) after the clock
`signal is applied to CLK (time t1 after To).
`
`A card with an active low reset is reset by maintaining
`RST in state L for at least 40000 clock cycles (ta) after
`the clock signal
`is applied to CLK (time ts after To).
`Thus,
`if no Answer-to-Reset begins within 40000 clock
`cycles (fa) with RST in state L, RST is put to state H (at
`
`time T1). The Answer-to-Reset on I/O shall begin
`between 400 and 40000 clock cycles (ti) after the rising
`edge ofthe signal on RST (time ti after T-.).
`
`lf the Answer-to-Reset does not begin within 40000
`clock cycles (ta) with RST in state H (ta after T1), the
`signal on RST shall be returned to state L (at time T2)
`and the contacts shall be deactivated by the interface
`device. See subclause 5.4.
`
`With a card answering synchronously, the interface
`device sets all lines to state L. See figure 2. VCC is then
`powered, VPP is set to idle state, CLK and RST remain
`in state L,
`l/O is put in reception mode in the interface
`device. RST shall be maintained in state H for at least
`50 ,us (tn), before returning to state L again.
`
`The clock pulse is applied after an interval (ho) from the
`rising edge of the reset signal. The duration for the state
`H of the clock pulse can be any value between 10 its
`and 50 us; no more than one clock pulse during reset
`high is allowed. The time interval between the falling
`edges on CLK and RST is El.
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`ISO/IEC 7816-3: 1939 (E)
`
`
`
`5;is < no
`5;¢s <r.1
`50 /15 < t12 ...................... .. Reset high
`rig < 10,u.S.......... .. Propagation delay
`
`10 its < r14 < 100 its ........... .. Clock low after reset
`10;¢s < as < 50 tts ............. .. Clock high
`10 #8 < tte < 100 #8 ........... .. Clock low
`ta < 10 ;£S ............. .. Propagation delay
`
`Figure 2 — Reset of a card when a synchronous answer is expected
`
`transmission (asynchronous or synchronous) and on the
`The first data bit is obtained as an answer on l/O while
`CLK is in state L and is valid after an interval 123 from the protocol type.
`falling edge on RST.
`NOTES
`NOTES
`
`1 The internal state of the card is assumed not to be defined
`before reset. Therefore the design of the card has to avoid
`improper operation.
`2 In order to continue the dialogue with the card. RST shall be
`maintained in the state where an answer occurs on I/O.
`
`3 Reset of a card can be initiated by the interface device at its
`discretion at any time
`
`4 Interface devices may support one or more of these types
`of reset behaviour The priority of testing for asynchronous or
`synchronous cards is not defined in this standard.
`
`5.3 Answer-to-Reset and subsequent
`exchange
`
`information
`
`transmission
`1 The asynchronous half duplex character
`protocol, with the interface device as the master, is specified
`in clause 8, the asynchronous half duplex block transmission
`protocol in clause 9. Further protocol types between the card
`and the interface device are for further study.
`
`interchange are to be
`2 The interindustry commands for
`specified in
`the next part of
`ISO/IEC 7816. Application
`specific commands are specified either in existing standards
`or in additional standards to be defined
`
`5.4 Deactivation of the contacts
`
`When information exchange is terminated or aborted
`(unresponsive card or detection of card removal), the
`electrical contacts shall be deactivated.
`
`The card answers after reset with a sequence defined in
`clause 6.
`
`The deactivation by the interface device shall consist of
`the consecutive operations:
`
`All data exchanged over the I/O circuit correspond to
`the execution of commands (via RST for reset and via
`I/O for any other command).
`
`the operating procedure of
`As for Answer-to-Reset.
`commands (except those commands to be specified in
`the next part of ISO/IEC 7816) depends on the type of
`
`— State L on RST;
`
`— State L on CLK;
`
`— VPP inactive;
`
`— State A on l/O;
`— VCC inactive,
`
`6
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`6 Answer-td-Reset
`
`Two types of transmission are considered:
`
`Asynchronous transmission
`
`In this type of transmission, characters are transmitted
`on the I/O line in an asynchronous half duplex mode.
`Each character includes an 8-bit byte. See 6.1.2.
`
`Synchronous transmission
`
`is
`series of bits
`a
`transmission,
`type of
`this
`In
`transmitted on the l/O line in half duplex mode in
`synchronisation with the clock signal on CLK.
`
`6.1 Answer-to-Reset in asynchronous transmission
`6.1.1 Bit duration
`
`The nominal bit duration used on I/O is defined as one
`Elementary Time Unit (etu).
`
`For cards having internal clock, the initial etu isfig s.
`
`For cards using the external clock, there is a linear rela-
`tionship between the Elementary Time Unit used on I/O
`and the period provided by the interface device on CLK.
`
`The initial etu is3,% s where r. is in hertz.
`See also 6.1.4.1.
`
`is provided by the interface
`frequency fl
`The initial
`device on CLK during the answerto reset, as defined in
`4.2.5.
`
`In order to read the initial character (TS), all cards shall
`initially be operated with fl
`in the range of 1 MHz to
`5 MHz.
`
`6.1.2 Character frame during answer to reset
`
`Prior to the transmission of a character,
`state Z.
`
`l/O shall be in
`
`A character consists often consecutive bits: a start bit in
`state A, eight bits of information, designated ba to bh
`and conveying a data byte, and a tenth bit bi used for
`even parity checking.
`
`A data byte consists of 8 bits designated b1 to b8, from
`the least significant bit (lsb, b1) to the most significant
`bit (msb, b8).
`
`Conventions (level coding, connecting levels EA to
`digits 1 or O; and bit significance, connecting ba—bh to
`b1—b8) are specified in the initial character, called TS,
`which is transmitted by the card in response to reset.
`
`Parity is correct when the number of ONES is even in
`the sequence from ba to bi.
`
`Within a character, the time from the leading edge of
`the start bit to the trailing edge of the nth bit shall equal
`(n:0.2) etu.
`
`ISO/IEC 7816-3: 1989 (E)
`
`When searching for a start, the receiver samples I/O
`periodically. The time origin being the mean between
`last observation of level Z and first observation of level
`A, the start shall be verified before 0.7 etu, and then ba
`is received at (1.5:l:0.2) etu, bb at (2.5:t0.2) etu,
`bi at
`(95:02) etu. Parity is checked on the fly.
`
`NOTE — When searching for a start, the sampling time
`shall be less than 0.2 etu so that all the test zones are
`distinct from the transition zones.
`
`characters
`consecutive
`two
`between
`delay
`The
`(between start leading edges) is at least 12 etu including
`a character duration (10:t0.2) etu plus a guardtime.
`While in guardtime, the interface device and the card
`remain both in reception, so that I/O is in state 2. See
`figure 3.
`
`Parity
`sea
`bit,-:_. 8 data bits .:i-_._ bit
`.
`
`z
`
`ttitiitit
`
`Ii
`A I
`t
`o I
`g--1tnt0.2ietu--in
`
`‘
`
`1,0
`
`Next
`Start
`M
`
`l
`
`Figure 3 — Character frame
`
`During the answer to reset, the delay between the start
`leading edges of two consecutive characters from the
`card shall not exceed 9600 etu. This maximum value is
`named initial waiting time.
`
`6.1.3 Error detection and character repetition
`
`the following character
`During the answer to reset,
`repetition procedure depends on the protocol type. See
`6.1.4.3. This procedure is mandatory for cards using the
`protocol type T=0; it is optional for the interface device
`and for other cards.
`
`(1110.12) etu after the start
`
`in state Z,
`
`the correct reception is
`
`The transmitter tests I/O.
`leading edge:
`— If
`I/O is
`assumed.
`— If I/O is in state A, the transmission is assumed
`to have been incorrect. The disputed character
`shall be repeated after a delay of at least 2 etu after
`detection of the error signal.
`
`the
`from (10.5t0.2) etu,
`incorrect,
`When parity is
`receiver transmits an error signal as state A for 1 etu
`minimum and 2 etu maximum. The receiver then shall
`expect a
`repetition of
`the disputed character. See
`figure 8.
`
`If no character repetition is provided by the card,
`— the card ignores and shall not suffer damage
`from the error signal coming from the interface
`device;
`— the interface device shall be able to initiate the
`
`repetition of the whole Answer-to-Reset sequence.
`
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`
`
`
`The Initial Character
`
`The Format Character
`codes Y. and K
`
`The Interface Characters
`
`global, codes FI and DI
`
`global, codes ll and P11 .
`
`global. codes N
`
`_ codes Y2 and T
`
`specific
`
`global, codes Pl2
`
`specific
`
`.
`
`_ codes Y3, and T
`
`TA. TB. TC. are specific
`' TD. codesY.+.. and T
`
`I
`
`The Historic Characters
`
`(max. 15 characters)
`
`The Check Character
`
`ISO/IEC 7816-3: 1989 (E)
`
`6. 1. 4 Structure and content
`
`A reset operation results in an answer from the card
`consisting of the initial character TS. followed by at most
`32 characters in the following order:
`
`— T0 ................... .. Format character .... .. Mandatory
`
`— TA. TB. TC. TD...
`
`Interface characters..... Optional
`
`— T1 T2... TK ..... .. Historical characters..... Optional
`
`— TCK ................ .. Check character.... .. Conditional
`
`See 6.1.4.1 to 6.1.4.4 and figure 4.
`
`The interface characters specify physical parameters of
`the
`integrated
`circuit
`in
`the
`card
`and
`logical
`characteristics of the subsequent exchange protocol.
`
`The historical characters designate general information.
`for example, the card manufacturer, the chip inserted in
`the card, the masked ROM in the chip. the state of the
`life of the ,card. The specification of
`the historical
`characters falls outside the scope of this part of ISO/IEC
`7816.
`
`simplicity, T0 TA... T1... TCK will
`For notational
`designate the bytes a; well as the characters in which
`they are contained.
`
`6. 1. 4. 1 Structure of T8, the initial character
`
`The initial character TS provides a bit synchronisation
`sequence and defines the conventions to code data
`bytes in all subsequent characters. These conventions
`referto ISO 1177.
`
`l/O is initially in state Z. A bit synchronization sequence
`(Z)AZZA is defined for the start bit and bits ba bb bc.
`See figure 5.
`
`The 3 bits bd be bf specify inverse or direct convention.
`with values of AAA or ZZZ, respectively.
`
`The last 3 bits bg bh bi shall be AAZ for checking parity.
`NOTE — This allows the interface device to determine the
`etu initially used by the card. An alternate measurement of
`etu is a third of the delay between the first two falling edges in
`T8. Transmission and reception mechanisms in the card
`(including the tolerances described in 6.1.2 and 6.1.3) shall
`be consistent with this alternate definition of etu.
`
`The two possible values of TS (ten consecutive bits
`from start to bi and corresponding hexadecimal value)
`
`_.gugsEQUENT
`TRANSMISSION
`
`are
`
`(Z)AZZAAAAAAZ where
`— Inverse convention:
`logic level ONE is A, ba is b8 (msb is first), equal to
`'3F' when decoded by Inverse convention.
`— Direct convention: (Z)AZZAZZZAAZ where logic
`level ONE is Z. ba is b1 (lsb is first), equal to ‘3B'
`when decoded by direct convention.
`
`Figure 4 — General configuration of the
`Answe.-_to-Re3et
`
`SM In at
`
`In M M H W ah
`
`2
`
`._i
`
`‘I
`
`I
`'1?)
`
`Figure 5 — Initial character TS
`
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`
`6.1.4.2 Structure of the subsequent characters in
`the Answer-to-Reset
`
`The initial character TS is followed by a variable number
`of subsequent characters in the following order:
`the
`format character TO and, optionally,
`the interface
`characters TA, TB, TC, TD. and the historical characters
`T1 T2... TK and, conditionally, the check character TCK.
`
`The presence of the interface characters is indicated by
`a bit map technique explained below.
`
`The presence of the historical characters is indicated by
`the number of bytes as specified in the format character
`defined below.
`
`The presence of the check character TCK depends on
`the protocol type(s) as defined below.
`Format character T0
`
`The T0 character contains two parts:
`
`— The most significant half byte (b5 b6 b7 b8) is
`named Y1 and indicates with a logic level ONE the
`presence of subsequent
`interface characters TA1
`TB1TC1 TD1 respectively.
`
`IS
`— The least significant half byte (b4 to
`named K and indicates the number (0 to 15) of
`historical characters. See figure 6.
`
`
`flflfififlfiflfl
`
`
`
`K
`Y,
`indicator forthe presence of interface characters
`TA1 is transmitted when b5=1.
`TB1 is transmitted when b6=1.
`TC1 is transmitted when b7=1.
`TD1 is transmitted when b8=1.
`Number (0 to 15) of historical characters
`
`Figure 6 — Information provided by T0
`
`Interface characters TAr TBr TCr TD;
`
`indicate the protocol
`2, 3...)
`1,
`(i =
`TA; TB. TCr
`parameters. TD,
`indicates the protocol
`type T, as
`defined in 6.1.4.3, and the presence of subsequent
`interface characters.
`
`Bits b5 b6 b7 b8 of the byte containing Yr (TO contains
`Y-.; TDr contains Ym) state whether character TA for b5,
`character TBr for b6, character T0, for b7, character TD;
`for b8 are or are not (depending on whether the relevant
`bit is 1 or 0) transmitted subsequently in this order after
`the character containing Y,.
`
`When needed, the interface device shall attribute a
`default value to information corresponding to a non
`transmitted interface character.
`
`ISO/IEC 7816-3: 1989 (E)
`
`When TD: is not transmitted, the default value of Yi+1 is
`null, indicating that no further interface characters TAM
`TB,” TC,+«. TDM will be transmitted. See figure 7.
`
`
`
`fiflfififlfiflfl
`
`fin —-**‘*-- T
`
`
`
`Ym.. indicator for the presence of interface characters
`TAM is transmitted when b5=1.
`TBH1 is transmitted when b6=1.
`TCH1 is transmitted when b7=1.
`TD,“ is transmitted when b8=1.
`Protocol type for subsequent transmission
`See 6.1.4.3.
`
`Figure 7 — Information provided by TD:
`Historical characters T1 T2... TK
`
`When K is not null, the Answer-to-Reset is continued by
`transmitting K historical characters T1 T2... TK.
`Check character TCK
`
`The value of TCK shall be such that the exclusive-oring
`of all bytes from T0 to TCK included is null.
`
`is complete 12 etu after the
`The Answer-to-Reset
`leading edge of the last character.
`
`6.1.4.3 Protocol type T
`
`The four least significant bits of any interface byte TDr
`indicate a protocol type T, specifying rules to be used to
`process
`transmission protocols. When TD1
`is not
`transmitted, T=0 is used.
`
`the asynchronous half duplex character
`T = O is
`transmission protocol specified in clause 8.
`
`half duplex
`asynchronous
`the
`is
`1
`T =
`transmission protocol specified in clause 9.
`
`block
`
`T = 2 and T = 3 are reserved for future full duplex
`Operations.
`
`T = 4 is reserved for an enhanced asynchronous half
`duplex character transmission protocol.
`T = 5 to T =13 are reserved for future use.
`
`T = 14 is reserved for protocols not standardized by
`ISO.
`
`T = 15 is reserved for future extension.
`
`interface bytes
`TA1 TB1 TC1 and TB2 are the global
`specified in 6.1.4.4. These global interface bytes shall
`be interpreted in order to process any transmission
`protocol correctly.
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`
`ISO/IEC 7815-3: 1989 (E)
`
`The other interface bytes TAr TBr TC: are the specific
`interface bytes. Their
`interpretation depends on the
`protocol type indicated by T in TD,.,.
`
`If more than three interface bytes TA, TB, TC, are
`defined for a specific protocol type and are to be sent in
`the Answer-to-Reset sequence,
`they shall be sent
`subsequently by using TD-bytes which all
`indicate the
`same protocol type.
`
`If more than one protocol type is indicated and T=0 is
`one ofthem, T=0 shall be indicated first.
`
`If only T=O is indicated. TCK shall not be sent.
`other cases. TCK shall be sent
`
`in all
`
`6.1.4.4 Specifications of the global interface bytes
`
`Among the interface bytes possibly transmitted by the
`card in Answer-to-Reset, this subclause defines only the
`global interface bytes TA1 TB. TC1 TB2.
`
`interface bytes convey information to
`These global
`determine parameters which the interface device shall
`take into account.
`
`Parameters F, D, I, P, N
`
`The initial etu used during Answer-to-Reset is replaced
`by the work etu during subsequent transmissions. F is
`the clock rate conversion factor and D is the bit rate
`adjustment
`factor
`to determine the work
`etu
`in
`subsequent transmissions.
`For internal clock cards:
`1
`Initial etu =W s
`For external clock cards:
`
`Work etu = % x 3% s
`
`Worketu=T1)-xfi s
`s
`Initial etu
`where f, and 1; in hertz are defined in 4.2.5.
`
`The minimum value of f5 shall be 1 MHz. The maximum
`value of f5 is given by table 6.
`
`I and P define the active state at VPP.
`
`— Maximum programming current: lpp = 1 mA.
`— Programming voltage: Vpp = P V.
`
`N is an extra guardtime requested by the card. Before
`receiving the next character, the card requires a delay of
`at least (12+N) etu from the start leading edge of the
`previous character. No extra guardtime is used to send
`characters from the card to the interface device.
`
`The default values of these parameters are
`
`F=372;D=1;I=50;P=5;N=0.
`
`These parameters are described in greater detail at the
`end
`of
`this
`subclause under
`integer Values
`to
`Parameters Correspondence.
`
`Integer values in the global interface bytes
`
`The global interface bytes TA1 TB1 TC« TB2 code integer
`values Fl, DI,
`ll, PI1, N, Pl2 which are either equal to or
`used to compute the values of the parameters F, D, I, P,
`N presented above.
`
`TA. codes Fl over the most significant half byte (b8 to
`b5), and DI overthe least significant half byte (D4 to b1).
`See tables 6 and 7.
`
`TB, codes ll over the bits b7 and b6, and Pl1 overthe 5
`least significant bits b5 to bl. See table 8. The most
`significant bit b8 equals 0.
`
`NOTE — The interface device may ignore the bit b8 of TB,.
`
`TC1 codes N over the eight bits (D8 to D1).
`
`TB; codes P|2 over the eight bits (b8 to D1).
`
`All undefined values of the following parameters are
`reserved for future use by ISO/lEC JTC1/SC17.
`
`Integer values to parameters correspondence
`
`I. P,
`The correspondence between the parameters F, D,
`N and the integer values Fl, DI.
`ll, PI1, N, Pl2 is given
`below.
`
`Table 6 — Clock rate conversion factor F
`
`0010
`
`0011
`
`
`
`internal Clock
`372
`744
`5 Illl
`1s<ma><>MHz E-
`RFU = Reserved for Future Use
`
`
`
`
`
`
`Fl
`
` f, (max) MHZ
`
`10
`
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`
`ISO/IEC 7816-3: 1989 (E)
`
`Table 7 — Bit rate adjustment factor D
`
`DI
`
`D
`
`Di
`
`13
`
`0000
`
`RFU
`
`0001
`
`I
`
`0010
`
`l
`
`1
`
`2
`
`0011
`4
`
`i
`l
`
`0100
`8
`
`0101
`16
`
`0110
`i
`l RFU
`
`011W
`RFU l
`
`
`
`Programming voltage factor P
`
`PI1 from 5 to 25 gives the value of P in volts. Pl1=0
`indicates that VPP is not connected in the card which
`
`numerical meaning corresponding to each information
`bit considered in isolation is that ofthe digit
`
`— 0 for a unit corresponding to state A (space);
`
`— 1 for a unit corresponding to state Z (mark).
`
`generates an internal programming voltage from VCC.
`Other values of PI1 are reserved for future use.