`
`Southern Methodist University, 1975
`Southern Methodist University, 1977
`University of Arizona, 1981
`
`Jack W. Davidson
`Department of Computer Science
`85 Engineer’s Way
`P.O. Box 400740
`Charlottesville, VA 22904–4740
`Education
`B.A.S. (Computer Science)
`M.S. (Computer Science)
`Ph.D. (Computer Science)
`Employment History
`1998–present Professor of Computer Science, University of Virginia, Charlottesville, VA.
`2000–2001
`Visiting Researcher, Microsoft Research, Redmond, WA.
`1993–1998
`Associate Professor of Computer Science, University of Virginia, Charlottesville, VA.
`1992–1993
`Visiting Associate Professor of Computer Science, Princeton University, Princeton, NJ.
`1988–1992
`Associate Professor of Computer Science, University of Virginia, Charlottesville, VA.
`1982–1988
`Assistant Professor of Computer Science, University of Virginia, Charlottesville, VA.
`1973–1977
`Programmer Analyst III, The University of Texas Health Science Center, Dallas, TX.
`Professional Activities
`ACM Publications Board, 2008–2011. (Publications Board Co-chair 2010–present.)
`ACM Executive Council and Council, 2010—present.
`CGO Steering Committee, 2012–2014.
`Treasurer and Founding Member, Digital Asset Protection Association, 2011–present.
`Associate Editor, Transactions on Architecture and Code Optimization, 2005–2014.
`ACM SGB Council Representative, 2008–2010.
`ACM SIG Governing Board Member-at-large, 2006–2008.
`Chair, ACM Special Interest Group on Programming Languages (SIGPLAN), 2005–2007.
`Program Committees, Awards Committees and Other External Activities (2015)
`Program Committee Member, 2015 Program Protection and Reverse Engineering Workshop (PPREW-5), Los
`Angeles, California.
`Program Committee Member, 2015 International Symposium on Code Generation and Optimization (CGO
`2015), San Francisco, California.
`Organizer, 6th International Summer School on Information Security and Protection (ISSISP 2015), July 2015,
`São Paulo, Brazil.
`Program Committees, Awards Committees and Other External Activities (2014)
`Organized 2014 Army Research Office Workshop on Continuously Upgradeable Software Security and Protec-
`tion, November 2014, co-located with CCS 2014 in Scottsdale, Arizona (obtained grant from ARO to fund
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`Organizer, 5th International Summer School on Information Security and Protection (ISSISP 2014), August
`2014, Verona, Italy.
`Selection Committee, 2014 IEEE Taylor L. Booth Education Award.
`Judge, 2014 Grand Finals of the ACM Student Research Competition.
`Judge, 2014 ACM Best Chapter Award.
`Organized Invited Workshop on Continuously Upgradeable Software Secirity and Protection. Held in conjunc-
`tion with Computer and Communications Security (CCS 2014), November 2014, Scottsdale, Arizona.
`Program Committee Member, 2014 International Symposium on Code Generation and Optimization (CGO
`2014), Orlando, Florida.
`Program Committee Member, 2014 ACM Workshop on Reproducible Research Methodologies and New Pub-
`lication Models in Computer Engineering (TRUST 2014), June 2014, Edinburgh, UK.
`Program Committee Member, 2014 Program Protection and Reverse Engineering Workshop (PPREW-4),
`December 2014, New Orleans, Louisiana.
`Invited panelist, The Coming Publication Models, 2014 CRA Snowbird Conference, July 2014.
`Program Committees, Awards Committees and Other External Activities (2013)
`Organizer, 4th International Summer School on Information Security and Protection (ISSISP 2013), August
`2013, Xi’an, China.
`Selection Committee, 2013 IEEE Taylor L. Booth Education Award.
`Judge, 2013 Grand Finals of the ACM Student Research Competition.
`Judge, 2013 ACM Best Chapter Award.
`Judge, 2013 Parallel Architectures and Compilation Technique (PACT) Student Research Competition.
`Co-General Chair, 2013 International Symposium on Code Generation and Optimization, Shenzhen, China.
`Program Committee Member, 2013 International Workshop on Program Protection and Reverse Engineering,
`San Diego, California.
`Program Committees, Awards Committees and Other External Activities (2012)
`Organizer, 3rd International Summer School on Information Security and Protection (ISSISP 2012), Tucson,
`Arizona, July 2012.
`Program Committees, Awards Committees and Other External Activities (2011)
`Organizer, 2nd International Summer School on Information Security and Protection (ISSISP 2011), July 2011,
`Ghent, Belgium.
`Program Committee Member, 2011 International Conference on Languages, Compilers, Tools and Theory for
`Embedded Systems (LCTES 2011), Chicago, Illinois.
`Program Commitee Member, 2011 International Symposium on Code Generation and Optimization (CGO
`2011), Chamonix France.
`Program Committees, Awards Committees and Other External Activities (2010)
`Organizer, 2010 International Summer School on Software Security, July 2010, Beijing, China.
`Judge, Grand Finals of the ACM Student Research Competition.
`Judge, ACM Best Chapter Award.
`Program Committee Member, 2010 International Symposium on Code Generation and Optimization (CGO
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`2010), Toronto Canada.
`Program Commitee Member, 2010 International Conference on High-Performance and Embedded Architec-
`tures and Compilers (HiPEAC 2010), Pisa Italy.
`Program Committe Member, International Conference on Compiler Construction (CC 2010), Paphos, Cyprus.
`Program Committees, Awards Committees and Other External Activities (2009)
`Program Committee Member, 2009 International Conference on Parallel Architectures and Compilation Tech-
`niques (PACT 2009), Raleigh, NC.
`Judge, Grand Finals of the ACM Student Research Competition.
`Judge, ACM Best Chapter Award.
`Program Committees, Awards Committees and Other External Activities (upto 2009)
`Invited Lecturer, Indo US Engineering Faculty Leadership Institute, June 2008, Mysore, India.
`Program Committee Member, 2008 International Conference on Compilers, Architecture, and Synthesis for
`Embedded Systems (CASES 2008), October 2008, Atlanta, GA.
`Program Commitee Member, 2008 International Conference on High-Performance and Embedded Architec-
`tures and Compilers (HiPEAC 2008), January 2008, Göteborg, Sweden.
`Invited lecturer, Lecturer, Third International Summer School on Advanced Architecture and Compilation for
`Embedded Systems (ACACES 2007), July 2007, L’Aquila, Italy.
`Program Committee Member, 2007 ACM SIGPLAN/SIGBED Conference on Languages, Compilers, and
`Tools for Embedded Systems (LCTES 2007), June 2007, San Diego, California.
`Program Committee Member, 2007 International ACM SIGPLAN/SIGOPS Conference on Virtual Execution
`Environments (VEE 2007), June 2007, San Diego, California.
`Program Committee Member, 2007 International Symposium on Code Generation and Optimization (CGO
`2007), March 2007, San Jose, California.
`Program Committee, 2007 International Conference on High Performance Embedded Architectures and Com-
`pilers (HiPEAC 2007), January 2007, Ghent, Belgium.
`Invited talk, Air Force Office of Scientific Research Workshop on Homogeneity, October 2007, Washington,
`D.C.
`Invited presentation, Air Force Scientific Advisory Board, March 2007, Rosslyn, Virginia.
`Program Committee Member, 2006 International Conference on Compilers, Architecture, and Synthesis for
`Embedded Systems (CASES 2006), October 2006, Seoul, South Korea.
`Program Committee Member, 2006 ACM SIGPLAN 2006 Conference on Programming Language Design and
`Implementation (PLDI 2006), June 2006, Ottawa, Canada.
`Program Committee Member, 2006 ACM SIGPLAN/SIGBED Conference on Languages, Compilers, and
`Tools for Embedded Systems (LCTES 2006), June 2006, Ottawa, Canada.
`Program Committee Member, 2006 International Symposium on Code Generation and Optimization (CGO
`2006), March 2006, Manhattan, New York.
`Program Committee Member of CASES 2005
`Program Committee Member, 2005 Conference on Parallel Architectures and Compilation Techniques (PACT
`2005), September 2005, St. Louis, Missouri.
`Program Committee Member, 2005 Conference on Programming Language Design and Implementation (PLDI
`2005), June 2005, Chicago, IL.
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`Keynote speaker at the 2nd Annual Workshop on Memory System Performance in Washington, D.C held in June
`2005.
`Program Committee Member, 2005 International Conference on Languages, Tools and Compilers for Embedded
`Systems (LCTES 2005), June 2005, Chicago, IL.
`Program Committee Member, 2005 International Conference on Autonomic Computing (ICAC 2005), June
`2005, Seattle, Washington.
`Program Committee Member, 2005 International Conference on Code Generation and Optimization (CGO
`2005), March 2005, San Jose, California.
`Program Committee Member, 2005 EMSOFT Conference (EMSOFT 2005), Jersey City, New Jersey.
`Program Committee Member, 9th International Workshop on Software and Compilers for Embedded Systems
`(SCOPES 2005), Dallas, TX.
`Finance Vice-Chair, 2004 International Conference on Compilers, Architecture, and Synthesis for Embedded
`Systems (CASES 2004), September 2004, Washington, DC.
`Program Committee Member, 2004 International Conference on Code Generation and Optimization (CGO
`2004), San Jose, CA.
`Program Committee Member, 2003 International Conference on Compilers, Architecture, and Synthesis for
`Embedded Systems (CASES 2003), San Jose, CA.
`Steering Committee, Conference on Parallel Architectures and Compilation Techniques (PACT), 2002–2005.
`SIGPLAN Member-at-Large, 1999–2001, 2003–2005.
`Program Committee Member, 2003 Conference on Parallel Architectures and Compilation Techniques (PACT
`2003), New Orleans, LA.
`Organizing Committee Member, 2003 ACM Federated Computing Research Conference (FCRC 2003), San
`Diego, CA.
`Member of editorial board for 20 Years of the ACM/SIGPLAN Conference on Programming Language Design and
`Implementation(1979–1999): A Selection 2003.
`Program Committee Member, 2003 Conference on Principles of Programming Languages (POPL 2003), New
`Orleans, LA.
`Co-general Chair, 2002 Conference on Parallel Architectures and Compilation Techniques (PACT 2002), Sep-
`tember 2002, Charlottesville, VA.
`Publications Vice-Chair, 2002 International Conference on Compilers, Architecture, and Synthesis for Embed-
`ded Systems (CASES 2002), Grenoble, France.
`Publications Vice-Chair, 2001 International Conference on Compilers, Architecture, and Synthesis for Embed-
`ded Systems (CASES 2001), Atlanta, GA.
`Steering Committee Chair, Languages, Compilers, and Tools for Embedded Systems (LCTES), 2001–2003.
`Panels Vice-Chair, International Conference on Compilers, Architecture, and Synthesis for Embedded Systems
`(CASES 2000), October 2000, San Jose, CA.
`Program Committee Member, 2000 Conference on Parallel Architectures and Compilation Techniques (PACT
`2000), October 2000, Philadelphia, Pennsylvania.
`Program Co-Chair, 2000 Workshop on Languages, Compilers, and Tools for Embedded and Real-time Systems
`(LCTES 2000), June 2000, Vancouver, Canada.
`General Chair, 1998 SIGPLAN Design and Implementation of Programming Languages Conference (PLDI
`1998), Montreal, Canada.
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`Program Committee Member, 1997 SIGPLAN Design and Implementation of Programming Languages Con-
`ference (PLDI 1997), Las Vegas, Nevada.
`Associate Editor, Transactions on Programming Languages and Systems, 1994–2000.
`Awards and Honors
`Fellow of the ACM
`IEEE Senior Member
`2010 ACM SIGPLAN Distinguished Service Award
`2008 IEEE Computer Society Taylor L. Booth Education Award
`ACM Undergraduate Teaching Award, School of Engineering and Applied Science, 2000.
`Faculty Innovation Award, National Cash Register, Inc., 1989.
`Publications
`a) Books and Book Chapters
`J. P. Cohoon and J. W. Davidson. Java Program Design, McGraw-Hill, Boston, MA, 2004.
`J. P. Cohoon and J. W. Davidson. C++ Program Design: An Introduction to Programming and Object-Oriented
`Design, 3rd Edition, McGraw-Hill, Boston, MA, 2002.
`J. P. Cohoon and J. W. Davidson. Lab Manual for use with C++ Program Design: An Introduction to Programming
`and Object-Oriented Design, 3rd Edition, McGraw-Hill, Boston, MA, 2002.
`J. P. Cohoon and J. W. Davidson. Lab Manual to accompany C++ Program Design: An Introduction to Program-
`ming and Object-Oriented Design, 2nd Edition, McGraw-Hill, Boston, 1999.
`J. P. Cohoon and J. W. Davidson. C++ Program Design: An Introduction to Programming and Object-Oriented
`Design, 2nd Edition, McGraw-Hill, Boston, 1999.
`J. P. Cohoon and J. W. Davidson. Lab Manual to Accompany C++ Program Design: An Introduction to Program-
`ming and Object-Oriented Design, Irwin, Burr Ridge, IL, 1997.
`J. P. Cohoon and J. W. Davidson. C++ Program Design: An Introduction to Programming and Object-Oriented
`Design, Irwin, Burr Ridge, IL, 1997. (In 1998, the text was the best selling introductory programming textbook.
`It had been adopted by over 130 schools).
`J. W. Davidson and R. A. Vaughan. The Effect of Instruction Set Complexity on Program Size and Memory
`Performance. Reduced Instruction Set Computers, William Stallings (editor), IEEE Computer Society Press,
`1990.
`J. W. Davidson. Fast Interpretation of Instruction Sets: Implementation and Applications. Computer Hardware
`Description Languages and Their Applications, C. J. Koomen and T. Moto-oka (editors), North Holland, Amster-
`dam, 1985, pp. 179–191.
`Journal Articles
`T. Dey, W. Wang, J. W. Davidson, M. L. Soffa. ReSense: Mapping Dynamic Workloads of Colocated Multi-
`threaded Applications Using Resource Sensitivity. ACM Transactions on Architecture and Code Optimization,
`10(4), December 2013, Article No. 41.
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`b)
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`J. A. Baiocchi, B. R. Childers, J. W. Davidson, and J. D. Hiser. Enabling Dynamic Translation in Embedded
`Systems with Scratchpad Memory. ACM Transactions on Embedded Computing Systems, 11(4), December 2012,
`Article 89.
`J. D. Hiser, D. W. Williams, W. Hu, J. W. Davidson, J. Mars and B. R. Childers. Evaluating Indirect Branch
`Handling Mechanisms in Software Dynamic Translation Systems. ACM Transactions on Architecture and Code
`Optimization, 8(2), July 2011, Article No. 9.
`P. A. Kulkarni, D. B. Whalley, G. S. Tyson, and J. W. Davidson. Practical Exhaustive Optimization Phase
`Order Exploration and Evaluation. ACM Transactions on Architecture and Code Optimization, 6(1), March 2009,
`pp. 1–36.
`D. Williams, W. Hu, J. W. Davidson, J. D. Hiser, J. C. Knight, A. Nguyen-Tuong. Security through Diversity:
`Leveraging Virtual Machine Technology. IEEE Security & Privacy, 7(1), January/February 2009, pp. 26–33.
`P. A. Kulkarni, W. Zhao, D. B. Whalley, X. Yuan, R. van Engelen, K. Gallivan, J. D. Hiser, J. W. Davidson, B.
`Cai, M. W. Bailey, H. Moon, K. Cho, Y. Paek, and D. L. Jones. VISTA: VPO Interactive System for Tuning
`Applications. ACM Transactions on Embedded Computing Systems, 5(4), November 2006, pp. 819–863.
`P. A. Kulkarni, S. R. Hines, D. B. Whalley, J. D. Hiser, J. W. Davidson, and D. L. Jones. Fast and Efficient
`Searches for Effective Optimization Phase Sequences. ACM Transactions on Architecture and Code Optimization,
`2(2), June 2005, pp. 165–198.
`N. Kumar, B. R. Childers, D. Williams, J. W. Davidson, and M. L. Soffa. Compile-Time Planning for Over-
`head Reduction in Software Dynamic Translators. International Journal of Parallel Programming, 33(2-3), June
`2005, pp. 103–114.
`B. R. Childers and J. W. Davidson. An Infrastructure for Designing Custom Embedded Wide Counterflow
`Pipelines. Microprocessors and Microsystems, 29(1), February 2005, pp. 27–40.
`B. R. Childers and J. W. Davidson. Custom Wide Counterflow Pipelines for High-performance Embedded
`Applications. IEEE Transactions on Computers, 53(2), February 2004, pp. 141–158.
`M. Bailey and J. W. Davidson. Automatic Detection and Diagnosis of Faults in Generated Code for Procedure
`Calls. IEEE Transactions on Software Engineering, 29(11), November 2003, pp. 1031–1042.
`B. B. Whalley and J. W. Davidson. A Design Environment for Addressing Architecture and Compiler Inter-
`actions. Information and Software Technology, 34(11), November 1992, pp. 707–720.
`J. W. Davidson, J. R. Rabung and D. B. Whalley. Relating Static and Dynamic Machine Code Measurements.
`IEEE Transactions on Computers, 41(4), April 1992, pp. 444–454.
`J. W. Davidson and A. M. Holler. Subprogram Inlining: A Study of its Effects on Program Execution Time.
`IEEE Transactions on Software Engineering, 18(2), February 1992, pp. 89–102.
`J. W. Davidson and D. B. Whalley. A Design Environment for Addressing Architecture and Compiler Inter-
`actions. Microprocessors and Microsystems, 15(9), November 1991, pp. 459–472.
`J. W. Davidson and D. B. Whalley. Methods for Saving and Restoring Register Values across Function Calls.
`Software—Practice & Experience, 21(2), February 1991, pp. 149–165.
`J. W. Davidson and D. B. Whalley. Quick Compilers Using Peephole Optimization. Software—Practice &
`Experience, 19(1), January 1989, pp. 79–97.
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`J. W. Davidson and A. M. Holler. A Study of a C Function Inliner. Software—Practice & Experience, 18(8),
`August 1988, pp. 775–790.
`J. W. Davidson and C. W. Fraser. Automatic Inference and Fast Interpretation of Peephole Optimization Rules.
`Software—Practice & Experience, 17(9), November 1987, pp. 801–812.
`J. W. Davidson and C. W. Fraser. Code Selection through Object Code Optimization. ACM Transactions on
`Programming Languages and Systems, 6(4), October 1984, pp. 7–32.
`J. W. Davidson and C. W. Fraser. Register Allocation and Exhaustive Peephole Optimization. Software—Prac-
`tice & Experience, 14(9), September 1984, pp. 857–865.
`J. W. Davidson and C. W. Fraser. The Design and Application of a Retargetable Peephole Optimizer. ACM
`Transactions on Programming Languages and Systems, 2(2), April 1980, pp. 191–202.
`c) Refereed Proceedings Publications
`Sudeep Ghosh, Jason D. Hiser, Jack W. Davidson. Matryoshka: Strengthening Software Portection via Nested
`Virtual Machines. Proceedings of the 1st International Workshop on Software Protection, Florence, Italy, May 2015,
`pp. 10–16.
`Sudeep Ghosh, Jason D. Hiser, Jack W. Davidson. What’s the PointISA? Proceedings of the 2nd ACM Workshop
`on Information Hiding and Multimedia Security, Salzburg, Austria, June 2014, pp. 23–34.
`A. Nguyen-Tuong, J. D. Hiser, M. Co, J. W. Davidson, J. C. Knight. To B or not to B: Blessing OS Commands
`with Software DNA Shotgun Sequencing. Proceedings of the 10th European Dependable Computing Conference,
`Newcastle upon Tyne, May 2014, pp. 238–249.
`J. D. Hiser, A. Nguyen-Tuong, M. Co, B. Rodes, M. Hall, C. L. Coleman, J. C. Knight, and J. W. Davidson.
`A Framework for Creating Binary Rewriting Tools. Proceedings of the 10th European Dependable Computing Con-
`ference, Newcastle upon Tyne, May 2014, pp. 142–145.
`W. Wang, T. Dey, J. W. Davidson, M. L. Soffa. DraMon: Predicting Memory Bandwith Usage of Multi-
`threaded Programs with High Accuracy and Low Overhead. Proceedings of the 20th IEEE International Sympo-
`sium on High-Performance Computer Architecture, Orlando, FL, February 2014, pp. 380–391.
`B. D. Rodes, A. Nguyen-Tuong, J. D. Hiser, J. C. Knight, M. Co, and J. W. Davidson. Defense Against Stack-
`Based Attacks Using Speculative Stack Layout Transformation. Proceedings of International Conference on Run-
`time Verification, Istanbul, Turkey, September 2012, pp. 308–313.
`J. Hiser, A. Nguyen-Tuong, M. Co, M. Hall, and J. W. Davidson. ILR: Where did my gadgets go? Proceedings
`of the 2012 IEEE Symposium on Security and Privacy, San Francsico, May 2012, pp. 571–585.
`W. Wang, T. Dey, J. Mars, L. Tang, J. W. Davidson, M. L. Soffa. Performance analysis of thread mappings
`with a holistic view of the hardware resources. Proceedings of the 2012 IEEE International Symposium on Perfor-
`mance Analysis of Systems and Software, New Brunswick, NJ, April, 2012, pp. 156–167.
`S. Ghosh, J. Hiser, and J. W. Davidson. Replacement Attacks against VM-protected Applications. Proceedings
`of the 8th ACM SIGPLAN/SIGOPS Conference on Virtual Execution Environments, London, UK, March 2012,
`pp. 203–214.
`W. Wang, T. Dey, R. W. Moore, M. Aktasoglu, B. R. Childers, J. W. Davidson, M. J. Irwin, M. Kandemir,
`and M. L Soffa. REEact: A Customizable Virtual Execution Manager for Multicore Platforms. Proceedings of
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`the 8th ACM SIGPLAN/SIGOPS Conference on Virtual Execution Environments, London, UK, March 2012, pp.
`27–38.
`T. Dey, W. Wang, J. W. Davidson, and M. L. Soffa. Characterizing Multi-threaded Applications based on
`Shared-Resource Contention. Proceedings of the 2011 IEEE International Symposium on Performance Analysis of
`Systems and Software, Austin, TX, April 2011, pp. 76–86.
`R. Rajkumar, A. Wang, J. D. Hiser, A. Nguyen-Tuong, J. W. Davidson, and J. C. Knight. Component-Ori-
`ented Monitoring of Binaries. Proceedings of the 44th Hawaii International Conference on System Sciences, Kauai,
`HI, January 2011, pp. 1–10.
`S. Ghosh, J. D. Hiser, and J. W. Davidson, A Secure and Robust Approach to Software Tamper Resistance,
`Proceedings of the 12th Information Hiding Conference, Calgary, Canada, June 2010, pp. 33–47.
`M. Co, C. L. Coleman, J. W. Davidson, S. Ghosh, J. D. Hiser, J. C. Knight, and A. Nguyen-Tuong. A Light-
`weight Software Control System for Cyber Awareness and Security, Proceedings of the 2nd International Sympo-
`sium on Resilient Control Systems, Idaho Falls, ID, August 2009, pp. 19–24.
`R. W. Moore, J. A. Baiocchi, B. R. Childers, J. W. Davidson, and J. D. Hiser. Addressing the Challenges of
`DBT for the ARM Architecture, Proceedings of the 2009 ACM SIGPLAN/SIGBED Conference on Languages,
`Compilers, and Tools for Embedded Systems, Dublin, Ireland, June 2009, pp. 147–156.
`J. D. Hiser, C. L. Coleman, M. Co, and J. W. Davidson. MEDS: The Memory Error Detection System, Pro-
`ceedings of the First International Symposium on Engineering Secure Software Systems, Lueven, Belgium, February,
`2009, pp. 164–179.
`J. Baiochhi, B. R. Childers, J. W. Davidson, and J. D. Hiser. Reducing Pressure in Bounded DBT Code Caches,
`Proceedings of the 2008 International Conference on Compilers, Architecture, and Synthesis for Embedded Systems,
`Atlanta, GA, October 2008, pp. 109–118.
`J. Baiochhi, B. R. Childers, J. W. Davidson, and J. D. Hiser. Reducing Pressure in Bounded DBT Code Caches,
`Proceedings of the 2008 International Conference on Compilers, Architecture, and Synthesis for Embedded Systems,
`Atlanta, GA, October 2008, pp. 109–118.
`A. Nguyen-Tuong, D. Evans, J. C. Knight, B. Cox, and J. W. Davidson. Security through Redundant Data
`Diversity, Proceedings of the 38th Annual IEEE/IFIP International Conference on Dependable Systems and Net-
`works, Anchorage, AK, June 2008, pp. 187–196.
`M. W. Bailey, C. L. Coleman, and J. W. Davidson. Defense Against The Dark Arts, SIGCSE Bulletin, 40(1),
`March 2008, pp. 315–319.
`J. Baiocchi, B. R. Childers, J. W. Davidson, J. D. Hiser and J. Misurda. Fragment Cache Management for
`Dynamic Binary Translators in Embedded Systems with Scratchpad. Proceedings of the 2007 International Con-
`ference on Compilers, Architecture, and Synthesis for Embedded Systems, Salzburg, Austria, October 2007, pp. 74-
`84.
`J. D. Hiser, J. W. Davidson, and D. B. Whalley. Fast, Accurate Design Space Exploration of Embedded Sys-
`tems Memory Configurations. Proceedings of the 22nd ACM Symposium on Applied Computing, Seoul, Korea,
`March, 2007, pp. 699–706.
`Prasad A. Kulkarni, David B. Whalley, Gary S. Tyson, and Jack W. Davidson. Evaluating Heuristic Optimiza-
`tion Phase Order Search Algorithms. Proceedings of the 2007 International Conference on Code Generation and
`Optimization, San Jose, CA, March 2007, pp. 157–169.
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`J. D. Hiser, D. Williams, W. Hu, J. W. Davidson, J. Mars, and B. R. Childers. Evaluating Indirect Branch Han-
`dling Mechanisms in Software Dynamic Translation Systems. Proceedings of the 2007 International Conference
`on Code Generation and Optimization, San Jose, CA, March 2007, pp. 61–73.
`B. Cox, D. Evans, A. Filipi, J. Rowanhill, W. Hu, J. Davidson, and J. Knight, A. Nguyen-Tuong, J. D. Hiser.
`N-Variant Systems: A Secretless Framework for Security through Diversity. Proceedings of the 15th USENIX
`Security Symposium, Vancouver, B. C., Canada, August, 2006, pp. 105–120.
`W. Hu, J. Hiser, D. Williams, A. Filipi, J. W. Davidson, D. Evans, J. C. Knight, A. Nguyen-Tuong and J. Hill.
`Secure and Practical Defense Against Code-injection Attacks Using Software Dynamic Translation. Proceed-
`ings of the 2006 International Conference on Virtual Execution Environments, Ottawa, CA, June 2006, pp. 2–12.
`J. Hiser, D. Williams, A. Filipi, J. W. Davidson and B. R. Childers. Evaluating Fragment Construction Policies
`for Software Dynamic Translation Systems. Proceedings of the 2006 International Conference on Virtual Execution
`Environments, Ottawa, CA, June 2006, pp. 122–132.
`P. A. Kulkarni, D. B. Whalley, G. S. Tyson, and J. W. Davidson. In Search of Near-Optimal Optimization
`Phase Orderings. Proceedings of the ACM Conference on Languages, Compilers, and Tools for Embedded Systems,
`Ottawa, Canada, June 2006, pages 83–92.
`M. D. Kleffner, D. L. Jones, J. D. Hiser, P. Kulkarni, J. Parent, S. Hines, D. Whalley, J. W. Davidson, K. Gal-
`livan,. On the Use of Compilers in DSP Laboratory Instruction. Proceedings of the 2006 IEEE International
`Conference on Acoustics, Speech, and Signal Processing, Volume 2, Toulouse, France, May 2006, pp. 977–980.
`P. A. Kulkarni, D. B. Whalley, G. S. Tyson and J. W. Davidson. Exhaustive Optimization Phase Order Space
`Exploration. Proceedings of the International Symposium on Code Generation and Optimization, New York, NY,
`March 2006, pp. 306–318.
`S. Hines, P. Kulkarni, D. Whalley and J. Davidson. Using De-optimization to Re-optimize Code. Proceedings
`of the 5th ACM International Conference on Embedded Software, Jersey City, NJ, September 2005, pp. 114–123.
`P. A. Kulkarni, S. Hines, J. Hiser, D. B. Whalley, J. W. Davidson and D. Jones. Fast Searches for Effective Opti-
`mization Phase Sequences. Proceedings of the 2004 SIGPLAN Conference on Programming Language Design and
`Implementation, Washington, DC, June 2004, pp. 171–182.
`J. Hiser and J. W. Davidson. EMBARC: An Efficient Memory Bank Assignment Algorithm for Retargetable
`Compilers. Proceedings of the 2004 SIGPLAN/SIGBED Conference on Languages, Compilers, and Tools for Embed-
`ded Systems, Washington, DC, June, 2004, pp. 182–191.
`S. Lee, J. Lee, S. L. Min, J. Hiser and J. W. Davidson. Code Generation for a Dual Instruction Set Processor
`Based on Selective Code Transformation. Proceedings of the 7th International Workshop on Software and Compilers
`for Embedded Systems, Vienna, Austria, September 2003, pp. 33–48.
`P. A. Kulkarni, W. Zhao, H. Moon, K. Cho, D. B. Whalley, J. W. Davidson, M. Bailey, Y. Paek, and K. Gal-
`livan. Finding Effective Optimization Phase Sequences. Proceedings of the 2003 SIGPLAN Conference on Lan-
`guages, Compilers, and Tools for Embedded Systems, San Diego, CA, June 2003, pp. 12–23.
`B. R. Childers, J. W. Davidson and M. L. Soffa. Continuous Compilation: A New Approach to Aggressive and
`Adaptive Code Transformation. Proceedings of the 17th International Parallel and Distributed Processing Sympo-
`sium, Nice, France April 2003, pp. 205–214.
`K. Scott, N. Kumar, S. Velusamy, B. Childers, J. W. Davidson and M. L. Soffa. Retargetable and Reconfigu-
`rable Software Dynamic Translation. Proceedings of the International Symposium on Code Generation and Optimi-
`zation, San Francisco, CA, March 2003, pp. 36–47.
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`J. K. Scott and J. W. Davidson. Safe Virtual Execution Using Software Dynamic Translation. Proceedings of the
`18th Annual Computer Security Applications Conference, Las Vegas, NV, December 2002, pp. 209–218.
`C. W. Milner and J. W. Davidson. QUICK PIPING: A Fast, High-Level Model for Describing Processor
`Pipelines. Proceedings of the Joint Conference on Languages, Compilers, and Tools for Embedded Systems and Software
`and Compilers for Embedded Systems, Berlin, Germany, June 2002, pp. 175–184.
`W. Zhao, B. Cai, D. Whalley, M. Bailey, R. van Englen, X. Yuan, J. Hiser, J. W. Davidson, K. Gallivan and D.
`L. Jones. VISTA: A System for Interactive Code Improvement. Proceedings of the Joint Conference on Languages,
`Compilers, and Tools for Embedded Systems and Software and Compilers for Embedded Systems, Berlin, Germany,
`June 2002, pp. 155–164.
`C. L. Coleman and J. W. Davidson. Automatic Memory Hierarchy Characterization. Proceedings of the 2001
`IEEE International Symposium on Performance Analysis of Systems and Software, Tucson, AZ, November 2001,
`pp. 103–110.
`C. Wang, J. W. Davidson, J. C. Knight and J. Hill. Protection of Software-based Survivability Mechanisms.
`Proceedings of the 2001 International Conference on Dependable Systems and Networks, Göteburg, Sweden, June
`2001, pp. 193–202.
`J. K. Scott, and J. W. Davidson. Exploring the Limits of Sub-word Level Parallelism. Proceedings of the 2000
`International Conference on Parallel Architectures and Compilation Techniques, Philadelphia, PA, October 2000,
`pp. 81–91.
`B. R. Childers and J. W. Davidson. Custom Wide Counterflow Pipelines for High-Performance Embedded
`Applications. Proceedings of the 2000 International Conference on Parallel Architecture and Compilation Techniques,
`Philadelphia, PA, October 2000, pp. 57–68.
`B. R. Childers and J. W. Davidson. An Infrastructure for Designing Custom Embedded Counterflow Pipe-
`lines. Proceedings of the 33rd Annual Hawaii International Conference on System Sciences, Maui, HI, January 2000,
`pp. 340–352.
`B. R. Childers and J. W. Davidson. Automatic Architectural Design of Wide-Issue Counterflow Pipelines.
`Workshop on Compiler and Architecture Support for Embedded Systems, Washington, DC, October 1999, pp. 23–27.
`B. R. Childers and J. W. Davidson. Architectural Considerations for Application-Specific Counterflow Pipe-
`lines. Proceedings of the 20th Anniversary Conference on Advanced Research in VLSI, Atlanta, Georgia, March
`1999, pp. 3–22.
`M. W. Bailey and J. W. Davidson. Target-Sensitive Construction of Diagnostic Programs for Procedure Calling
`Sequence Generators. Proceedings of the SIGPLAN '96 Symposium on Programming Language Design and Imple-
`mentation, Philadelphia, PA, May 1996, pp. 249–257.
`S. Jinturkar and J. W. Davidson. Aggressive Loop Unrolling in a Retargetable, Optimizing Compiler. Proceed-
`ings of the 1996 Compiler Construction Conference, Linköping, Sweden, April 1996, pp. 59–73.
`S. Jinturkar and J. W. Davidson. Improving Instruction-level Parallelism by Loop Unrolling and Dynamic
`Memory Disambiguation. Proceedings of the 28th Annual IEEE/ACM International Symposium on Microarchitec-
`ture, Ann Arbor, MI, November 1995, pp. 125–132.
`M. W. Bailey and J. W. Davidson. A Formal Specification for Procedure Calling Conventions. Proceedings of
`the 22nd Annual SIGPLAN-SIGACT Symposium on Principles of Programming Languages, San Francisco, CA,
`January 1995, pp. 298–310.
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`IPR of U.S. Pat. No. 8,141,154
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`000010
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`S. Jinturkar and J. W. Davidson. Memory Access Coalescing: A Technique for Eliminating Redundant Mem-
`ory Accesses. Proceedings of the SIGPLAN '94 Symposium on Programming Language Design and Implementation,
`Orlando, FL, June 1994, pp. 186–195.
`M. E. Benitez and J. W. Davidson. Register Deprivation Measurements. Proceedings of the 1994 Compiler Con-
`struction Conference.
`M. E. Benitez and J. W. Davidson. The Advantages of Machine-Dependent Global Optimization. Proceedings
`of the 1994 Conference on Programming Languages and Systems Architectures, Zurich, Switzerland, March 1994,
`pp. 105–124.
`M. J. Alexander, M. W. Bailey, B. R. Childers, J. W. Davidson, and S. Jinturkar. Memory Bandwidth Optimi-
`zations for Wide-Bus Machines. Proceedings of the 26th Annual Hawaii International Conference on System Sci-
`ences, January 1993, pp. 401–423.
`M. E. Benitez and J. W. Davidson. Code Generation for Streaming: an Access/Execute Mechanism. Proceed-
`ings of the Fourth International Conference on Architectural Support for Programming Languages and Operating Sys-
`tems, Santa Clara, CA, April 1991, pp. 132–141.
`D. B. Whalley and J. W. Davidson, Reducing the Cost of Branches by Using Registers. Proceedings of the 17th
`International Symposium on Computer Architecture, Seattle, WA, May 1990, pp. 182–191.
`D. B. Whalley and J. W. Davidson. Ease: An Environment for Architecture Study and Experimentation. Pro-
`ceedings of the 1990 ACM Sigmetri