`571-272-7822
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`IPR2015-01524, Paper No.25
`January 11, 2017
`
`UNITED STATES PATENT AND TRADEMARK OFFICE
`ALEXANDRIA, VIRGINIA
`
`
`
`SAMSUNG ELECTRONICS CO., LTD,
`Petitioner
`vs.
`
`ELBRUS INTERNATIONAL LIMITED,
`Patent Owner
`______________________________
`
`IPR 2015-01524
`Patent 6,366,130
`U.S. Patent Number 6,366,130
`
`Alexandria, Virginia
`Tuesday, October 18, 2016
`
`
` HEARING before Judge Jeffrey W. Abraham, Judge Justin T. Arbes, and
`Judge Daniel J. Galligan (via videoconference), taken before Michele E. Eddy,
`RPR, CRR, and Notary Public, taken at the U.S. Patent and Trademark Office, 600
`Dulany Street, 9th Floor, Alexandria, Virginia, at 1:00 p.m.
`
`
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`2
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`Case IPR2015-01524
`Patent 6,366,130
`
`A P P E A R A N C E S
`
`
` ON BEHALF OF THE PETITIONER SAMSUNG:
` NAVEEN MODI, ESQUIRE
` JOSEPH RUMPLER, ESQUIRE
` Paul Hastings
` 875 15th Street, Northwest
` Washington, D.C. 20005
` (202) 551-1990
` naveenmodi@paulhastings.com
`
` ON BEHALF OF THE PATENT OWNER:
` CLIFFORD H. KRAFT, ESQUIRE
` Parker & Parker
` 320 Robin Hill Drive
` Naperville, Illinois 60540
` (708) 528-9092
` patentlawyer@iiie.org
`
`
`
`
`
`
`
`
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`Case IPR2015-01524
`Patent 6,366,130
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`3
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`P R O C E E D I N G S
`Alexandria, Virginia
`October 18, 2016
`
` - - -
` JUDGE ABRAHAM: Please be seated. Good afternoon. We are here for
`the oral hearing in IPR 2015-01524 concerning U.S. Patent Number 6,366,130. I
`am Judge Abraham, and with me is Judge Arbes, and we have Judge Galligan
`joining us remotely.
` We'll start with introductions from counsel, but before we do that, I just
`want to remind everybody, because we do have a judge participating remotely, it's
`important that you speak loudly and into the microphone so that he can hear you,
`okay?
` All right. So let's start with introductions. We'll go with Petitioner.
` MR. MODI: Good afternoon, Your Honors. Naveen Modi on behalf of
`Petitioner Samsung. With me is Joseph Rumpler.
` JUDGE ABRAHAM: Welcome. Thank you.
` Patent owner?
` MR. KRAFT: Good afternoon, Your Honors. I'm Clifford Kraft, and I
`represent the patent owner.
` JUDGE ABRAHAM: Thank you. Welcome.
` Okay. Pursuant to our order of September 15, 2016, each side will have 40
`minutes to argue. Petitioner, with the burden of proof, will go first. You may
`reserve rebuttal time if you would like. Patent owner will then have a chance to
`respond. And then followed by any rebuttal from Petitioner.
` To the extent that you do use demonstratives today, we ask that you please
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`refer to slide numbers in the record so that it provides for a clear record. It will
`also allow Judge Galligan to follow along since he is not able to see the screen.
`Just remember that as you're going through your presentations.
` With that, I'll invite Petitioner to begin and ask if you would like to reserve
`any time for rebuttal.
` MR. MODI: Yes, Your Honor, I would, 15 minutes, please.
` JUDGE ABRAHAM: You can start whenever you're ready.
` MR. MODI: Thank you, Your Honors. May it please the Board, I'm
`Naveen Modi on behalf of Petitioner Samsung.
` Based on the petition and supporting evidence, the Board instituted a
`review of certain claims of the '130 patent. The record now includes even more
`evidence than before and that supports the Board's decision and the petition. The
`Board should now issue a final decision cancelling all the claims at issue. Let me
`explain why.
` So if we turn to slide 2, here we have an image from the institution
`decision. As the Board is well aware, there are three grounds at issue in this
`proceeding. There's a ground based on Sukegawa and Lu. There's another ground
`based on Sukegawa, Lu, and Watanabe. And then there's a ground based on
`Sukegawa, Lu, and Hardee.
` If you turn to slide 3, what you can see here is the independent claim that's
`at issue here. That's claim 1. That's the only claim at issue, as the Board is aware,
`in terms of the independent claim. The rest of them are the dependent claims.
` What we've highlighted for the Board's convenience are some of the terms
`that we'll be discussing today. I know the Board has looked at the record. So I
`won't spend too much time on this claim. But, basically in essence, this claim
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`claims a data transfer arrangement. It includes two bus drivers, a voltage
`precharge source, a differential bus. Then we have a latching sense amplifier.
`That includes a first stage and an output stage. And then the first stage is
`connected to a differential data bus, and then there's the precharging limitation,
` which I'm sure we'll spend some time on today.
` So if we look at the Patent Owner's response, and now I'm on slide 4, the
`patent owner's response essentially raises five issues in response to the petition and
`the Board's institution decision, and they are shown on slide 4.
` The first issue is whether Sukegawa and Lu teach the claimed differential
`data bus, whether Sukegawa and Lu teach the claimed precharging, whether
`Sukegawa and Lu render obvious claim 5, and then the last two are for claims 3
`and claim 7.
` For purposes of today, I will focus my presentation on issues 1, 2, and 4.
`I'm happy to address any other issues that the Board would like me to address, but
`we'll rest on our briefs on the other issues.
` So with that, let me jump right into the first issue, whether Sukegawa and
`Lu teach the claimed differential data bus. So let's just take a look at the claim
`again. So now we're on slide 6. If you look at slide 6, as I indicated before, the
`claim requires the differential data bus, and it also requires that the differential data
`bus and the differential bus be precharged to a voltage Vpr.
` So just to set the stage, as the Board is aware, the way the petition was set
`up, it's our contention that Sukegawa discloses each of the limitations of the claim
`except for -- with the exception of charging the differential data bus to Vpr. That's
`really the only limitation that's missing from Sukegawa, from our perspective.
` And we believe there's enough evidence in the record that one of ordinary
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`skill would have combined Sukegawa with Lu, the other reference we rely upon, to
`precharge the differential data bus to Vpr. So -- and let me explain why. But let's
`address, first, the issue of differential data bus.
` So, again, just setting the stage for the Board, now I'm going to jump to
`slide 8. So this is from our petition, paper number 1 at 19. And as the Board can
`see in our petition and the supporting expert declaration, we pointed to what the
`parties have been referring to as the pink lines. I'm sure the Board is, again, very
`well aware of that.
` So if you look at the demonstrative here on slide 8, the Board can see we
`pointed to the pink lines and basically explained that they constitute the differential
`data bus of the Sukegawa reference.
` Now, the Patent Owner takes issue with that. Their first contention is, well,
`those -- it's not really a bus. It's a node. And they also take issue with the fact that
`you wouldn't precharge the bus to -- this bus to the voltage Vpr that's claimed.
` So let me explain the first issue. So if we go to slide 7, actually, this is
`from the Patent Owner's response, where the Patent Owner states that nodes C are
`simply nodes, not a bus. But let's go back, take a look at slide 8 just so that, again,
`the record is clear. What they're pointing to is -- so if you go back and look at the
`image on slide 8, you have the pink lines that are shown that we claim is the
`differential data bus. You also have some designations, N3 and N4. Those are
`referred to in Sukegawa as nodes. We don't dispute that. Sukegawa is very clear
`about that. They are nodes.
` The dispute here is whether the lines that we point to along with those
`nodes constitutes the differential data bus, and it's our contention that it does.
` So the Patent Owner's position here has been shifting a little bit. So I want
`to take the Board back to the preliminary response. So this is on slide 9. So if you
`look at the preliminary response, what the Patent Owner said in the preliminary
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`responses on the top of slide 9, they said the purple lines are not even a bus. They
`are simply a pair of wires having opposite logic levels within a circuit. So that was
`their contention in their preliminary response.
` And, like I said, it's shifted. They have moved away from that language.
`Now they are saying that those lines -- they're essentially ignoring the lines, from
`our perspective, and they're just focusing on the nodes, and they're saying nodes C
`are simply nodes. But it's interesting. If you look at the Patent Owner response
`that's quoted from on the bottom of slide 9, what the Board will see is they actually
`acknowledge -- they say nodes marked C are at the junctions of the pink lines.
` So if the Board looks at the response carefully, the Patent Owner even
`admits there's more than just the nodes there. And if the Board looks at the
`testimony of the Patent Owner's expert, he was very clear there are conductors
`along those lines. It's just not a connection point, as they would like it to be.
` So what does this all boil down to? It boils down to what is the definition
`of a bus. I should note for the record, I don't think there's a dispute -- counsel can
`correct me, for Patent Owner, if I'm misstating anything, but I don't think there's
`any dispute here that there's differential signaling along these nodes or bus, as we
`would like to call it. I think the only issue is whether those, what we have labeled
`the pink lines, constitute a bus.
` So if you look at the definitions of "bus" that have been provided by both
`sides, let's actually start with the Patent Owner's definition, it's our contention --
` JUDGE ABRAHAM: Before you get there, let me ask a question.
` MR. MODI: Sure, Your Honor.
` JUDGE ABRAHAM: In the petition for -- and in the -- well, in all of the
`briefing, "bus" wasn't a term that was construed by either party. So my question is
`-- I know there's sort of differing positions on what a bus is. Is the bus now
`something that we need to construe for purposes of the final written decision?
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` MR. MODI: Your Honor, it's our contention that you don't need to
`construe it. As you know, the Patent Owner has taken the position that no term
`needs to be construed here, but I'll also submit to you that even if the Board
`construed the bus, even if it accepts the Patent Owner's definition or Petitioner's
`definition, I think the results should be the same. There's enough evidence in the
`record that supports our showing that what we have labeled as the so-called pink
`lines are the differential data bus under any definition of bus.
` Let me explain why. So if you look at the Patent Owner's definition -- it's
`here on slide 9 -- the Patent Owner has defined bus as "a common path along
`which power or signals travel from one or several sources to one or several
`destinations." So that's the definition they have given us.
` Now, if you look at the record, starting again with the figure that we
`provided in our petition on the left from the Sukegawa reference, you can see that
`there are sources here. We would call these the sources from right here for the
`transistors (indicating), and there are destinations right at those inverters. And
`there's a path along which the signal travels. And Sukegawa is very clear about
`that. Sukegawa -- the whole purpose of Sukegawa, it's a signal transmission circuit
`for transferring signals. So, clearly, there's more than enough evidence to support
`their definition of the bus.
` What I will also point out is if the Board looks -- and now I'm at slide 11 --
`looks at and compares the '130 patent in Sukegawa, I think that also leads to the
`same result. So if you remember from their slides or their response, they have
`basically alleged that what we have labeled here, for lack of a better color, I guess,
`I'll say pink again, on the '130 patent, you can see they are saying those are
`differential data buses in the '130 patent.
` But if Your Honors go back and look at the '130 patent, you'll notice
`nowhere does the '130 patent specification actually even talk about differential data
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`buses. And all they talk about, like the Sukegawa reference, are nodes. They talk
`about IT. They talk about IC, which are nodes, like Sukegawa, which talks about
`N3 and N4. But one of ordinary skill reading Sukegawa, as our expert has
`testified, would understand those lines to be a bus under their definition or under
`our definition.
` And if we go to our definition now -- now I'm on slide 12. So if you look at
`our definition, we've defined bus as "one or more conductors that are used for the
`transmission of signals, data, or power."
` And, again, you can see how the circuit would satisfy that limitation, right? So
` these lines that we've labeled as "differential data bus" are one or more
`conductors and they are used for transmission of signals. Again, that's the whole
`purpose of Sukegawa.
` In terms of how we get to conductors, if you recall, in the preliminary
`response the patent owner admitted that they were wires. And their expert during
`cross-examination – and you can see that here on the right. We asked him. We
`asked Dr. Huber, we said, "Would you agree that the lines that are depicted
`showing the various connections of N3 and N4 -- those are the nodes, right, in
`Sukegawa -- are conductors?" And he grudgingly said yes.
` So, again, there is enough evidence in the record to support that what we've
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`labeled as the pink lines are a differential data bus.
` JUDGE ARBES: Counsel, do you see any difference between the two
`definitions offered by the parties? One says, "one or more conductors." The other
`says, "a common path." Is there any difference between the two?
` MR. MODI: Your Honor, stepping back, I would say there is very little
`difference, if any. I feel their definition is a little bit narrower, and I think the
`reason we took issue with their definition was it came from a document that was
`from 2005. We felt that was the wrong time frame to use. As you're aware, the
`patent is from much earlier. And that's why we provided a definition that we felt
`was more contemporaneous. But, again, under either definition, we feel the
`evidence here supports this showing that the bus is a conductor.
` JUDGE ARBES: And it's your position that the analysis that you've
`offered is the same even with either construction?
` MR. MODI: That's right, Your Honor. I would say, again, even if the
`words are a little bit different, there's enough evidence to support each of those
`words in the record.
` So then they make this one other argument in the Patent Owner response.
`Now I'm on slide 13, for Judge Galligan's benefit. Slide 13 they say, again, these
`are differential nodes and not a bus. To us, it's the same argument as before, that
`it's all about whether there's a bus or not, and as we've already discussed, there is a
`bus here.
` Now let me turn to the second issue, which is whether Sukegawa and Lu
`teach the claimed precharging. Let's start with the claim again. So in slide 16, we
`have the claim language, and, basically, this precharging limitation states, "wherein
`the differential bus and the differential data bus are precharged to a voltage Vpr
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`between Vdd and ground, where Vpr equals K times Vdd, and K is a precharging
`voltage factor."
` So again, stepping back, just to remind the Board, the rejection the way it
`was set up was there was no dispute that -- from our perspective that Sukegawa
`discloses each of the limitations. The only thing that's missing from Sukegawa is
`whether one of ordinary skill would have modified Sukegawa to precharge the
`differential data bus to Vdd. We submit there is enough evidence, and there is
`even more evidence now than before.
` Let me show you that evidence. So if you go to slide 17, what you have
`here on the left is testimony from Petitioner's expert, and on the right you have
`testimony from Patent Owner's expert. And what this testimony shows is why
`would one of ordinary skill want to precharge a bus such as the differential data
`bus to Vdd/2.
` Your Honors are well aware of Petitioner's expert's testimony so I won't
`repeat that, but I do want to just spend a minute on Patent Owner's expert's
`testimony. So we asked him, we said, "Why does Sukegawa provide a precharge
`voltage that is Vdd/2?"
` Answer, "In general, the use of Vdd/2 means that you establish a
`differential signal more quickly because you are starting in a bid point." I
`think that should say middle point. "If you have a differential line, one line
`can go up, the other line can go down. And they're both actively moved to
`that condition. So generally -- well, there's many advantages to Vdd/2 precharging
`depending on the circuitry. But in this case I believe it's a speed issue primarily."
` We asked him again, we said, well, are there other advantages? And
`then he went on and listed the other advantages that I won't bore the Board
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`by reading more testimony, but it's all in the record. We've cited to it in our
`reply.
` So my point is, Your Honor, it was well-known to charge a bus to
`Vdd/2. Their expert admitted that. Lu discloses it. Our expert has given
`extensive testimony on that. So, again, when you combine the two references,
`one of ordinary skill certainly would have been led to the Vdd/2 precharging
`for Sukegawa.
` So then what are the arguments in light of this evidence that the Patent
`Owner makes?
` Well, their first argument is that if you look at -- this is now on slide 18,
`Judge Galligan. So if we look at slide 18, the first thing that they point to is they
`say, well, if you look at Sukegawa, the inventor chose to charge one of the buses
`to Vdd/2, but he chose to charge the bus that we point to as a differential data bus
`to only Vdd. So, therefore, there is some teaching of it here.
` The law -- this is legally wrong and factually wrong. As the Board is well
`aware, in terms of the teaching of a law, Sukegawa provides no criticism of
`precharging a differential bus to a value under Vdd, such as Vdd/2. In fact, as,
`again, their expert testified and all the testimony here shows, there are several
`advantages to charging the bus to Vdd/2. So there is no teaching away. This is not
`a case where one would have been led away from precharging that bus to Vdd/2.
` So then what's the other argument they make? Actually, before I get to
`that, it's -- slide 29, there is some testimony. So we tried to test this theory with the
`Patent Owner's expert – the teaching away. So what we did was we asked him.
`We said, okay -- on the left is the annotation that Patent Owner's expert provided in
`his declaration. So we said, okay, well, "If you look at the bus drivers on the left
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`here" -- you can see those here (indicating) -- "they consist of nMOS transistors,
`right?" Answer, "Yes."
` "Well, what if you change some of those? What if one of ordinary skill
`wanted to change those to pMOS? Does the patent teach away from charging
`those to pMOS?" And his testimony, not surprisingly -- and it's shown here on the
`right, I won't read it. I'll just paraphrase it for the Board. Not surprisingly, he said,
`"Of course one of ordinary skill would be able to design the circuit to use pMOS."
` So, curiously, when it comes to the prior art, he is not willing to go as far.
`I'll let the Board draw its own conclusions on that, but I just wanted to point that
`out.
` So now if you go to their next argument, their next argument is, well, okay,
`if it doesn't teach away, the solution is unworkable in practice. This is on slide 21.
`And they basically say that it would have been an unacceptable and practically
`unworkable circuit with undesirable leakage currents. So that's what they say.
` But, again, stepping back, if you look at their expert's declaration, it was
`very interesting. What Dr. Huber did is he took the Sukegawa circuit, and he said,
`okay, well, let me modify it as how Dr. Baker testified that it would have been
`modified, that he would basically connect two of the transistors to Vdd/2. So he
`went through this demonstrative in his declaration to show there would be
`problems with that circuit.
` Well, there are a few issues with that. One is they haven't shown that the
`circuit would be an inoperable, one. Leaving that aside, we think what Dr. Huber
`did and Patent Owner has done here is they tried to make a circuit that's
`unworkable.
` During Dr. Baker's deposition, our expert's deposition, they actually asked
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`him about the modification at length. His testimony goes on and on, and I want to
`show the Board some of that testimony.
` So if you go to slide 32, there's some testimony here from our expert, and
`he addresses -- he said, "Well, if the circuit wasn't designed correctly, of course, it's
`possible that there would be problems with the circuit, that you would have
`leakage. But one of skill would know how to address those issues. For example,
`you could make the transistors weaker, meaning longer. You could increase the
`threshold voltage in the transistors. You could use those transistors."
` So he actually explained how one of ordinary skill would have designed the
`circuit to address these issues that the Patent Owner is raising in its response and
`through the Huber declaration.
` What I'm getting at is, this would have been in the realm of one of ordinary
`skill when they were designing -- would have been designing a circuit such as
`Sukegawa or modifying it based on the -- and we actually asked Patent Owner's
`expert about how do you make the circuit weaker? We asked him. We said,
`"Making a transistor weaker is one way a person of skill in the art could lower the
`current that goes through a transistor, correct?" He said "That's true." Again, these
`were tools that were available to a person of ordinary skill when they were
`designing such circuits.
` If you go to slide 23, there's some more testimony from our expert on this
`issue because they asked him extensively, "How would you go about modifying
`this circuit?" And I'll just leave the Board with this one thought on this issue.
`Here is what Dr. Baker said. He said, "I frankly would expect my students in my
`CMOS IC class to be able to perform these" types of edits. That was the testimony
`of Dr. Baker. And he acknowledged, "and they certainly are not the level of one of
`ordinary skill."
` So what we're talking about, these modifications that they complain of, that
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`these problems certainly could have been addressed. It was within the realm of
`one of ordinary skill. And, also, I would note for the record that the law doesn't
`require us to show how the circuit would have been modified. All it requires us to
`show is that they would have a reasonable likelihood of success, which we
`certainly have shown, and I think we've shown more, even how the circuit would
`have been modified.
` So then let's go to their next argument. Well, their next argument is Lu
`fails to precharge. But if you recall, we never relied on Lu for how to precharge.
`All we relied on Lu were the advantages of why one of ordinary skill would charge
`to Vdd/2. But again, if you drill down and even accept their argument at face
`value, let's go through them, we think there's evidence that rebuts their arguments.
` Their first argument is, again, Lu doesn't show precharging. So I'm now on
`slide 25. On slide 25, you can actually see that Lu discloses two mechanisms for
`precharging to Vdd/2. The first mechanism is shown on the left. The second one
`is shown on the right. So what they're saying is simply not true.
` So then their next account with respect to Lu, they make this argument that
`in the case of Lu, "There is no fixed value K. The nodes simply float." And this
`argument to us -- actually, it's an interesting argument that they make, because if
`you look at the '130 patent -- now I'm on slide 27 -- the '130 patent acknowledges
`that the voltage Vpr is an approximate. There is going to be deviation. These are
`circuits. We're talking about circuits. If you go to basic circuitry, there are
`temperature changes in circuits. Those could create differences, the variations.
` What I would like to point out is if I could actually have -- Joe, can we put
`up Exhibit 2006 at 4.
` This is one of the exhibits that patent owner relies upon, and I just want to
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`show the Board an example of what we're talking about here. So this is a JEDEC
`standard from their response. And if you go to page 4, what the Board can see here
`is the Vcc, the power supply, it says, "3.3 plus or minus .3 volts." Even the
`standards that they cite to, again, it was very well-known that you would have
`variations. And the standard acknowledges. It says, "across operating temperature
`ranges."
` So this complaint that there has to be some fixed value is simply not -- it's
`not relevant, we believe, and it's certainly addressed by the evidence.
` Unless the Board has any questions on this issue, I'll go ahead and move to
`claim 3.
` JUDGE ABRAHAM: No questions.
` MR. MODI: So if we can go to claim 3, if we can jump to slide 34, please.
` Okay. So the claim 3 combination was whether Sukegawa, Lu, and
`Watanabe render obvious claim 3. So if you go to slide 35. So if you look at slide
`35 here, we have reproduced claim 3. Again, just to set the stage, how the rejection
`was set up or how our proposed plan was set up, what we did was we were relying
`on Watanabe for the features that are disclosed in claim 3. And we said one of
`ordinary skill would have combined Watanabe with the Sukegawa and Lu circuit,
`okay? So that was the combination we proposed.
` And we showed in Watanabe how -- the input pass transistors that are
`claimed, and the nMOS and the pMOS transistors and how the sources and drains
`match up. And as Your Honors acknowledged in their institution decision, there
`was some dispute there, and I will definitely address that now.
` But, basically, the issue here comes down to how you would label the
`sources and the drains on the transistors. And, again, we think there's enough
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`evidence that supports the Petitioner's contention that they would be certainly
`labeled as Dr. Baker explained in his declaration, and I want to explain why.
` So if you go back to the claim, we have input pass transistors, and then
`separately the claims also claim nMOS and pMOS transistors, okay? But a point
`to note here is that the input pass transistors, the claim is not limited to pMOS or
`nMOS. The claim just said "input pass transistors."
` What they have done is very interesting. So let me go to the next slide.
`What they did -- this is from their patent responses. I'm on slide 36 now. What
`they did was they said, okay, let's take a look at the Watanabe circuit, figure 7,
`which is what we relied on. Let's take the input pass transistors that Petitioner
`relies on. Let's take those and insert them into figure 2 of the '130 patent and show
`you all the problems that occur because of that.
` Well, first -- there are two issues with that. One is, as I pointed out, going
`back to the claim, the claim just recites input pass transistors. It doesn't matter
`whether they're pMOS or nMOS. The second is, our combination, if you recall, it
`was combining Watanabe with Sukegawa, not how Watanabe's circuit could be
`applied to the circuit that's disclosed in the '130 patent.
` But even leaving that aside, let me get to this issue of the sources and
`drains. Let's look at slide 38. I think it's undisputed, like it was during the
`institution phase, that the circuits, the transistor, the sources and drains depend on
`the voltages that are applied across the transistors. That's very clear from the
`Patent Owner's response. Their expert could not be clearer on that.
` Their issue is they want to say that what we have shown, what Dr. Baker
`has shown, that the circuit -- that sources and drains would not be as how Dr.
`Baker labeled it. I'll note on that point, Your Honors, if you go back, look at the
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`testimony from Dr. Huber or Dr. Baker or the Huber declaration, the direct
`testimony, nowhere will you find that they actually disputed that the Watanabe
`circuit, as Dr. Baker demonstrated it in his declaration, is incorrect.
` What they do is they take a piece of that circuit and they apply it to the
`figure 2 in '130. So we think it's actually -- the record is undisputed. I know there
`is obviously a dispute here, but we feel it's undisputed. There's enough evidence
`here that shows that when you apply certain voltages across those transistors, the
` figure 7 of Watanabe, you would definitely have -- at least in one instance, if not
`more than one instance, the sources and drains would be applied as shown by Dr.
`Baker.
` And if you look at, actually, on the '130 patent -- and I think hopefully this
`will help the Board as well. So with respect to the '130 patent, we actually asked
`the Patent Owner's expert, we said, okay -- so just to set this up, so