`Filed: June 24, 2015
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`UNITED STATES PATENT AND TRADEMARK OFFICE
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`BEFORE THE PATENT TRIAL AND APPEAL BOARD
`
`HTC Corporation,
`HTC America, Inc.,
`LG Electronics, Inc.,
`Samsung Electronics Co., Ltd., and
`Samsung Electronics America, Inc.
`Petitioners
`
`v.
`
`
`
`Parthenon Unified Memory Architecture LLC
`Patent Owner
`
`INTER PARTES REVIEW OF U.S. PATENT NO. 7,542,045
`Case IPR No.: To Be Assigned
`
`PETITION FOR INTER PARTES REVIEW OF U.S. PATENT NO. 7,542,045
`UNDER 35 U.S.C. §§ 311-19 AND 37 C.F.R. § 42.100 et seq.
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`Petition for Inter Partes Review of U.S. Pat. No. 7,542,045
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`TABLE OF CONTENTS
`
`V.
`
`
`I.
`INTRODUCTION ........................................................................................... 1
`II. MANDATORY NOTICES UNDER 37 C.F.R. § 42.8(b) .............................. 2
`A.
`Real Parties-in-Interest .......................................................................... 2
`B.
`Related Matters ...................................................................................... 2
`C.
`Lead and Back-Up Counsel ................................................................... 4
`D.
`Service Information ............................................................................... 5
`PAYMENT OF FEES UNDER 37 C.F.R. § 42.15(a) .................................... 5
`III.
`IV. CERTIFICATION OF GROUNDS FOR STANDING UNDER
`37 C.F.R. § 42.104(a) ...................................................................................... 5
`IDENTIFICATION OF CHALLENGES UNDER 37 C.F.R.
`§§ 42.22 AND 42.104(b) ................................................................................. 5
`A.
`Statutory Grounds of Challenge ............................................................ 5
`B.
`The Proposed Grounds are Not Redundant ........................................... 7
`VI. THE ’045 PATENT ......................................................................................... 7
`VII. CLAIM CONSTRUCTION ............................................................................ 8
`A.
`Claim Terms To Be Construed .............................................................. 9
`1.
`“video decoder” ........................................................................... 9
`2.
`“fast bus” ................................................................................... 10
`3.
`“decoder directly supplies a display device with an
`image” ....................................................................................... 11
`Expiration of the ’045 Patent .............................................................. 12
`B.
`VIII. LEVEL OF ORDINARY SKILL IN THE ART ........................................... 13
`IX. SPECIFIC GROUNDS OF CHALLENGE ................................................... 13
`A. Ground A: Rathnam Anticipates, under 35 U.S.C. § 102,
`claims 1-2, 4-7, 9-10, 12-13, and 15-17 .............................................. 13
`Rathnam anticipates claim 1 ..................................................... 13
`1.
`Rathnam anticipates claim 2 ..................................................... 20
`2.
`Rathnam anticipates Claim 4 .................................................... 22
`3.
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`Petition for Inter Partes Review of U.S. Pat. No. 7,542,045
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`Rathnam anticipates Claim 5 .................................................... 25
`4.
`Rathnam anticipates claim 6 ..................................................... 26
`5.
`Rathnam anticipates claim 7 ..................................................... 28
`6.
`Rathnam anticipates claim 9 ..................................................... 28
`7.
`Rathnam anticipates claim 10 ................................................... 29
`8.
`Rathnam anticipates claim 12 ................................................... 29
`9.
`10. Rathnam anticipates claim 13 ................................................... 31
`11. Rathnam anticipates claim 15 ................................................... 31
`12. Rathnam anticipates claim 16 ................................................... 32
`13. Rathnam anticipates claim 17 ................................................... 32
`Ground B: Bowes in view of MPEG Standard renders
`obvious, under 35 U.S.C. § 103, claims 1, 4-5, 7, 10, 12,
`and 16-17 ............................................................................................. 32
`Bowes in view of MPEG Standard renders claim 1
`1.
`obvious. ..................................................................................... 34
`Bowes in view of MPEG Standard renders claim 4
`obvious. ..................................................................................... 40
`Bowes in view of MPEG Standard renders claim 5
`obvious. ..................................................................................... 43
`Bowes in view of MPEG Standard renders claim 7
`obvious. ..................................................................................... 45
`Bowes in view of MPEG Standard renders claim
`10 obvious. ................................................................................ 45
`Bowes in view of MPEG Standard renders claim
`12 obvious. ................................................................................ 46
`Bowes in view of MPEG Standard renders claim
`16 obvious. ................................................................................ 47
`Bowes in view of MPEG Standard renders claim
`17 obvious. ................................................................................ 48
`Ground C: Bowes, in view of MPEG Standard and
`Rathnam, renders obvious, under 35 U.S.C. § 103, claims
`9 and 15 ............................................................................................... 48
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`7.
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`8.
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`ii
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`2.
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`3.
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`4.
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`5.
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`6.
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`B.
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`C.
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`Petition for Inter Partes Review of U.S. Pat. No. 7,542,045
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`2.
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`1.
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`Bowes, in view of MPEG Standard and Rathnam,
`renders claim 9 obvious. ........................................................... 50
`Bowes, in view of MPEG Standard and Rathnam,
`renders claim 15 obvious. ......................................................... 51
`D. Ground D: Bowes, in view of MPEG Standard and
`Stearns, renders obvious, under 35 U.S.C. § 103, claims
`2, 6, and 13 .......................................................................................... 52
`Bowes, in view of MPEG Standard and Stearns,
`1.
`renders claim 2 obvious. ........................................................... 53
`Bowes, in view of MPEG Standard and Stearns,
`renders claim 6 obvious. ........................................................... 55
`Bowes, in view of MPEG Standard and Stearns,
`renders claim 13 obvious. ......................................................... 56
`CONCLUSION .............................................................................................. 56
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`
`2.
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`3.
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`X.
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`iii
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`Petition for Inter Partes Review of U.S. Pat. No. 7,542,045
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`TABLE OF AUTHORITIES
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`
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`Page(s)
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`Federal Cases
`KSR Int’l Co. v. Teleflex Inc.,
`550 U.S. 398 (2007) ................................................................................ 36, 51, 55
`
`Phillips v. AWH Corp.,
`415 F.3d 1303 (Fed. Cir. 2005) (en banc) ...................................................... 9, 13
`
`Parthenon Unified Memory Architecture LLC v. Apple, Inc.,
`No. 2:15-cv-00621-JRG-RSP (E.D. Tex.) ............................................................ 3
`
`Parthenon Unified Memory Architecture LLC v. HTC Corp. et al.,
`No. 2:14-cv-00690-RSP (E.D. Tex.) .................................................................... 3
`
`Parthenon Unified Memory Architecture LLC v. Huawei Techs. Co.,
`Ltd. et al.,
`No. 2:14-cv-00687-JRG-RSP (E.D. Tex.) ............................................................ 3
`
`Parthenon Unified Memory Architecture LLC v. LG Elecs., Inc. et al.,
`No. 2:14-cv-00691-JRG-RSP (E.D. Tex.) ............................................................ 3
`
`Parthenon Unified Memory Architecture LLC v. Motorola Mobility,
`Inc.,
`No. 2:14-cv-00689-JRG-RSP (E.D. Tex.) ............................................................ 3
`
`Parthenon Unified Memory Architecture LLC v. Qualcomm Inc. et al.,
`No. 2:14-cv-00930-JRG-RSP (E.D. Tex.) ............................................................ 3
`
`Parthenon Unified Memory Architecture LLC v. Samsung Elecs. Co.,
`Ltd. et al.,
`No. 2:14-cv-00902-JRG-RSP (E.D. Tex.) ............................................................ 3
`
`Parthenon Unified Memory Architecture LLC v. ZTE Corp. et al.,
`No. 2:15-cv-00225-JRG-RSP (E.D. Tex.) ............................................................ 3
`
`In re Rambus, Inc.,
`694 F.3d 42 (Fed. Cir. 2012) .............................................................................. 12
`
`iv
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`Petition for Inter Partes Review of U.S. Pat. No. 7,542,045
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`STMicroelectronics, Inc. v. Motorola Inc. et al.,
`No. 4:03-cv-00276-LED (E.D. Tex.) .................................................................... 3
`
`Toyota Motor Corp. v. Hagenbuch,
`IPR2013-00483, Paper No. 37 (Dec. 5, 2014) .................................................... 13
`
`In re Translogic Tech., Inc.,
`504 F.3d 1249 (Fed. Cir. 2007) ............................................................................ 9
`
`In re Yamamoto,
`740 F.2d 1569 (Fed. Cir. 1984) ............................................................................ 8
`
`In re Zletz,
`13 USPQ2d 1320 (Fed. Cir. 1989) ....................................................................... 8
`
`Federal Statutes
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`35 U.S.C. § 102(a) ..................................................................................................... 6
`
`35 U.S.C. § 102(b) ..................................................................................................... 6
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`35 U.S.C. § 102(e) ................................................................................................. 6, 7
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`35 U.S.C. § 103 .................................................................................................passim
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`35 U.S.C. § 112 .......................................................................................................... 8
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`35 U.S.C. § 311 ........................................................................................................ 56
`
`Regulations
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`37 C.F.R. § 42.8(b) .................................................................................................... 2
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`37 C.F.R. § 42.15(a) ................................................................................................... 5
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`37 C.F.R. § 42.22 ....................................................................................................... 5
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`37 C.F.R. § 42.101 ..................................................................................................... 6
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`37 C.F.R. § 42.104(a) ................................................................................................. 5
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`37 C.F.R. § 42.104(b) ................................................................................................ 5
`
`77 Fed. Reg. 48,756 (Aug. 14, 2012) ........................................................................ 8
`
`v
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`Petition for Inter Partes Review of U.S. Pat. No. 7,542,045
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`Other Authorities
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`Office Patent Trial Practice Guide ............................................................................. 8
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`vi
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`Petition for Inter Partes Review of US. Pat- No. 7,542,045
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`LIST OF EXHIBITS
`
`International Organization for Standardization, “ISO/IEC 11172—2:
`Information technology—Coding of moving pictures and associated
`audio for digital storage media at up to about 1,5 Mbit/s—Part2:
`Video,” (lst ed. Aug. 1, 1993) (“MPEG Standard”)
`
`S. Rathnam et al., “An Architectural Overview of the Programmable
`Multimedia Processor, TM-l,” IEEE Proceedings of COMPCON ’96,
`pp. 319-326 (1996) (“Rathnam”)
`
`R.J. Gove, “The MVP: A Highly-Integrated Video Compression
`Chip,” Proceedings of the IEEE Data Compression Conference (DCC
`‘94), pp. 215—224 (March 29—3 1, 1994).
`
`Ex. 1007 US. Patent No. 5,774,676 (“Stearns”)
`
`Ex. 1008 Declaration of Dr- Santhana Chari (“Chari Decl.”)
`
`Ex. 1009
`
`International Organization for Standardization, Website of ISO/IEC
`1 1 172-2
`
`
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`Ex. 1010 WorldCat Entry for Rathnam
`
`Ex. 1011
`
`Patent Owner Claim Construction Brief in Case No. 2: 14-cv-690,
`April 7, 2015
`
`Ex. 1012
`
`Patent Owner Claim Construction Brief in Case No. 2: 14-cv-902, June
`
`1 8, 201 5
`
`Ex. 1019
`
`Shanley, et al-, “PCI System Architecture,” Addison-Wesley
`Publishing Company, 1995 (3rd ed.) (“Shanley”)
`
`Ex. 1020
`
`Stone, H., “Microcomputer Interfacing,” Addison-Wesley Publishing
`
`vii
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`Petition for Inter Partes Review of US. Pat- No. 7,542,045
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`_
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`Ex. 1023 US. Patent No. 5,797,028 (“Gulfck 028”)
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`“Accelerated Graphics Port Interface Specification,” Intel
`Corporation, July 31, 1996 (Revision 1.0) (“AG ”)
`
`Proposal,” Version 1.0p (“VUAJA”)
`
`Ex. 1024
`
`Ex. 1025 VESA Unified Memory Architecture Hardware Specifications
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`viii
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`Petition for Inter Partes Review of U.S. Pat. No. 7,542,045
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`I.
`
`INTRODUCTION
`Petitioners1 respectfully request inter partes review of claims 1-2, 4-7, 9-10,
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`12-13, and 15-17 (the “Challenged Claims”) of U.S. Patent No. 7,542,045 (“the
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`’045 patent”) (Ex. 1001). This Petition shows, by a preponderance of the evidence,
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`that there is a reasonable likelihood that Petitioner will prevail on the Challenged
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`Claims of the ’045 patent.
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`The ’045 patent concerns arbitrating access to a memory shared between a
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`video decoder and another device, such as a central processing unit (CPU). See Ex.
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`1001, Abstract, 5:8-15. Conventionally, the ’045 patent alleges, a video decoder
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`would have its own dedicated memory to allow it to operate in real time. See id.,
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`2:43-51, 3:12-19. The dedicated memory would remain unused most of the time
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`and significantly increase costs. See id., 2:43-51. To eliminate the problem of a
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`dedicated memory, the ’045 patent proposed having the video decoder share
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`memory with other devices. See id., 4:64 - 5:51. The ’045 patent accomplishes this
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`using an arbiter, which arbitrates between the video decoder and the device when
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`one of them requests access to the shared memory. See id.
`
`1 “Petitioners” refers collectively to HTC Corporation, HTC America, Inc., LG
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`Electronics, Inc., LG Electronics U.S.A., Inc., LG Electronics MobileComm
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`U.S.A., Inc., Samsung Electronics Co., Ltd., and Samsung Electronics America,
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`Inc.
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`-1-
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`Petition for Inter Partes Review of U.S. Pat. No. 7,542,045
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`But by the ’045 patent’s priority date, others had solved the same problem of
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`a dedicated memory using the same arbitration scheme. For example, Rathnam
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`(Ex. 1005) describes a shared memory multimedia processing system that
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`arbitrates access to the memory between an MPEG decoder and multiple other
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`components including microprocessors. In addition, Bowes (Ex. 1003) eliminates
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`the need for dedicated SRAM memory for its digital signal processor (DSP) 20 by
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`arbitrating between DSP 20 and the computer system when one of them requests
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`access to the shared memory (main memory subsystem 14); see also Stone Decl.,
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`Ex. 1030, ¶ 35-44, 55-59, 64-69, 103, 129, 154, and 176 (discussing Exs. 1019,
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`1020, 1023, 1024, 1025, 1026, 1027, 1028, and 1029).
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`As such, the ’045 patent describes nothing new. As explained below, the
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`prior art anticipates and/or renders obvious each of the Challenged Claims.
`
`II. MANDATORY NOTICES UNDER 37 C.F.R. § 42.8(b)
`A. Real Parties-in-Interest
`The real parties-in-interest are HTC Corporation, HTC America, Inc., LG
`
`Electronics, Inc., LG Electronics U.S.A., Inc., LG Electronics MobileComm
`
`U.S.A., Inc., Samsung Electronics Co., Ltd., and Samsung Electronics America,
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`Inc.
`
`B. Related Matters
`The following would affect, or be affected by, a decision in this proceeding:
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`Petition for Inter Partes Review of U.S. Pat. No. 7,542,045
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`U.S. district court actions in which Patent Owner asserted the ’045
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`1.
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`patent: Parthenon Unified Memory Architecture LLC v. Huawei Techs. Co., Ltd. et
`
`al., No. 2:14-cv-00687-JRG-RSP (E.D. Tex.); Parthenon Unified Memory
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`Architecture LLC v. Motorola Mobility, Inc., No. 2:14-cv-00689-JRG-RSP (E.D.
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`Tex.); Parthenon Unified Memory Architecture LLC v. HTC Corp. et al., No. 2:14-
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`cv-00690-RSP (E.D. Tex.); Parthenon Unified Memory Architecture LLC v. LG
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`Elecs., Inc. et al., No. 2:14-cv-00691-JRG-RSP (E.D. Tex.); Parthenon Unified
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`Memory Architecture LLC v. Samsung Elecs. Co., Ltd. et al., No. 2:14-cv-00902-
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`JRG-RSP (E.D. Tex.); Parthenon Unified Memory Architecture LLC v. Qualcomm
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`Inc. et al., No. 2:14-cv-00930-JRG-RSP (E.D. Tex.); Parthenon Unified Memory
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`Architecture LLC v. ZTE Corp. et al., No. 2:15-cv-00225-JRG-RSP (E.D. Tex.);
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`and Parthenon Unified Memory Architecture LLC v. Apple, Inc., No. 2:15-cv-
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`00621-JRG-RSP (E.D. Tex).
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`2.
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`STMicroelectronics, Inc. v. Motorola Inc. et al., No. 4:03-cv-00276-
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`LED (E.D. Tex.), in which Patent Owner’s predecessor-in-interest asserted U.S.
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`Patent No. 5,812,789, which is related by subject matter to the ’045 patent.
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`Petitioners have filed, or will file shortly, inter partes review petitions
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`against four other patents that are part of the same continuation family: U.S. Patent
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`Nos. 7,321,368; 7,777,753; 8,054,315; and 8,681,164. Because these patents are
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`substantively similar, Petitioners request, for efficiency and consistency, that the
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`-3-
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`Petition for Inter Partes Review of U.S. Pat. No. 7,542,045
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`same panel be assigned to all five petitions.
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`C. Lead and Back-Up Counsel
`Powers of attorney are submitted with this Petition. For Petitioners HTC
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`Corporation and HTC America, Inc., lead counsel is Joseph A. Micallef (Reg. No.
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`39,772, jmicallef@sidley.com), and back-up counsel is Cameron A. Zinsli (Reg.
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`No. 70,028, czinsli@sidley.com). The mailing address
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`for all PTAB
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`correspondence is Sidley Austin LLP, 1501 K Street, N.W., Washington D.C.
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`20005 (Telephone: 202-736-8000 / Facsimile: 202-736-8711).
`
`For Petitioner LG Electronics, Inc., lead counsel is Rajeev Gupta (Reg. No.
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`55,873, LGE_Finnegan_PUMAIPR@finnegan.com), and backup counsel is Darren
`
`M. Jiron (Reg. No. 45,777). The mailing address for all PTAB correspondence is
`
`FINNEGAN, HENDERSON, FARABOW, GARRETT & DUNNER, LLP, 901
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`New York Avenue, N.W., Washington, D.C. 20001-4413 (Telephone: 202-408-
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`4000 / Facsimile: 202-408-4400).
`
`For Petitioners Samsung Electronics Co., Ltd. and Samsung Electronics
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`America, Inc., lead counsel is Allan M. Soobert (Reg. No. 36,284, Samsung-
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`PUMA-IPR@paulhastings.com), and back-up counsel is Naveen Modi (Reg. No.
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`46,224, Samsung-PUMA-IPR@paulhastings.com). The mailing address for all
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`PTAB correspondence is Paul Hastings LLP, 875 15th Street NW, Washington
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`D.C. 20005 (Telephone: 202-551-1700 / Facsimile: 202-551-1705).
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`-4-
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`Petition for Inter Partes Review of U.S. Pat. No. 7,542,045
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`Service Information
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`D.
`Counsel for Petitioners consent to service by electronic mail and hand
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`delivery to the postal mailing addresses of respective lead counsel designated
`
`above.
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`III. PAYMENT OF FEES UNDER 37 C.F.R. § 42.15(a)
`The required fees are submitted herewith. The PTO is authorized to charge
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`any additional fees due at any time during this proceeding to Deposit Account No.
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`50-2613.
`
`IV. CERTIFICATION OF GROUNDS FOR STANDING UNDER
`37 C.F.R. § 42.104(a)
`Petitioners certify that the ’045 patent is available for inter partes review,
`
`and that Petitioners are not barred or estopped from requesting inter partes review
`
`challenging the claims on the grounds identified in this Petition. Each Petitioner
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`was served a complaint asserting infringement of the ’045 patent no earlier than
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`June 24, 2014. No Petitioner, real party-in-interest, or privy of a Petitioner was
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`served before that date. The Petitioners and real parties-in-interest have not
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`initiated a civil action challenging the validity of the ’045 patent.
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`V.
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`IDENTIFICATION OF CHALLENGES UNDER 37 C.F.R. §§ 42.22
`AND 42.104(b)
`A.
`The Challenged Claims are unpatentable on the following grounds:
`
`Statutory Grounds of Challenge
`
`-5-
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`Petition for Inter Partes Review of U.S. Pat. No. 7,542,045
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`Ground A. Under pre-AIA 35 U.S.C. § 102(e), Rathnam (Ex. 1005) anticipates
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`claims 1, 2, 4-7, 9, 10, 12, 13, and 15-17 (see Section IX.A)
`
`Ground B. Under pre-AIA 35 U.S.C. § 103, Bowes (Ex. 1003) in view of MPEG
`
`Standard (Ex. 1004) renders obvious claims 1, 4-5, 7, 10, 12, and 16-
`
`17 (see Section IX.B)
`
`Ground C. Under pre-AIA 35 U.S.C. § 103, Bowes (Ex. 1003), in view of MPEG
`
`Standard (Ex. 1004) and Rathnam (Ex. 1005), renders obvious claims
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`9 and 15 (see Section IX.C)
`
`Ground D. Under 35 U.S.C. § 103, Bowes (Ex. 1003), in view of MPEG
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`Standard (Ex. 1004), and Stearns (Ex. 1007), renders obvious claims
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`2, 6, and 13 (see Section IX.D)
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`Rathnam was published during the IEEE COMPCON ’96 Conference in
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`February 1996 (see Ex. 1005 at 4), was available at the Library of Congress at least
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`as of April 4, 1996 (see id. at 2), and was indexed in the WorldCat library on April
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`23, 1996 (Ex. 1010 at 1), and thus qualifies as prior art at least under pre-AIA 35
`
`U.S.C. § 102(a). Bowes was filed on January 28, 1994, and thus qualifies as prior
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`art at least under pre-AIA 35 U.S.C. § 102(e). MPEG Standard was published in
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`August 1993, and thus qualifies as prior art at least under pre-AIA 35 U.S.C.
`
`§ 102(b). Ex. 1004 at 1-2; Ex. 1008, ¶¶ 4-8; Ex. 1009 at 1. Stearns was filed on
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`October 3, 1995, and thus qualifies as prior art at least under pre-AIA 35 U.S.C.
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`-6-
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`Petition for Inter Partes Review of U.S. Pat. No. 7,542,045
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`§ 102(e).
`
`The Proposed Grounds are Not Redundant
`
`B.
`Ground A and Grounds B-D both challenge claims 1, 2, 4-7, 9, 10, 12, 13,
`
`and 15-17 of the ’045 patent. However, the grounds are not redundant because of
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`several significant differences. For example, Ground A and Grounds B-D
`
`challenge the claims under different statutory bases. Therefore, Patent Owner may
`
`be entitled to different defenses for the references applied in those grounds.
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`Additionally, as an example, Rathnam, the only reference in Ground A, addresses
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`the claimed “decoder” in a different way than Bowes, the primary reference in
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`Grounds B-D (as explained below, Ground A relies on two components working in
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`tandem, whereas Ground B relies on a single component). Therefore, for at least
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`these reasons, Petitioners respectfully requests the Board adopt all proposed
`
`Grounds in this petition, particularly because not adopting one of the grounds may
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`potentially affect how Petitioners may later challenge the validity of the ’045
`
`patent.
`
`VI. THE ’045 PATENT
`The ’045 Patent, entitled “Electronic System and Method for Display Using
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`a Decoder and Arbiter to Selectively Allow Access to a Shared Memory,” issued
`
`on June 2, 2009. The ’045 Patent is a continuation of application no. 10/174,918,
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`filed on June 19, 2002, which is a continuation of application no. 09/539,729, filed
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`-7-
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`
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`Petition for Inter Partes Review of U.S. Pat. No. 7,542,045
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`on March 30, 2000, which is a continuation of application no. 08/702,910, filed on
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`August 26, 1996. The ’045 Patent has 17 claims, including independent claims 1,
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`4, 5, and 12.
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`Rathnam, Bowes, and MPEG Standard were not considered during
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`prosecution of the ’045 patent. See, e.g., Ex. 1001 at 1-4 (References Cited); see
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`generally Ex. 1002.
`
`VII. CLAIM CONSTRUCTION
`inter partes review,
`In
`the Board applies the broadest reasonable
`
`interpretation (“BRI”) standard to construe claim terms of an unexpired patent.2
`
`Under the BRI standard, terms are given their “broadest reasonable interpretation,
`
`consistent with the specification.” In re Yamamoto, 740 F.2d 1569, 1571 (Fed. Cir.
`
`1984); Office Patent Trial Practice Guide, 77 Fed. Reg. 48,756, 48,764 (Aug. 14,
`
`2012). Claim terms are “generally given their ordinary and customary meaning,”
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`which is the meaning that the term would have to a person of ordinary skill in the
`
`
`2 Because the standards applied in litigation differ from PTO proceedings, any
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`interpretation of claim terms herein is not binding upon Petitioners in any related
`
`litigation. See In re Zletz, 13 USPQ2d 1320, 1322 (Fed. Cir. 1989). Petitioners
`
`reserve their rights to make all arguments in the district court with respect to claim
`
`construction and on other grounds (e.g., 35 U.S.C. § 112).
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`-8-
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`Petition for Inter Partes Review of U.S. Pat. No. 7,542,045
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`art. See In re Translogic Tech., Inc., 504 F.3d 1249, 1257 (Fed. Cir. 2007) (quoting
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`Phillips v. AWH Corp., 415 F.3d 1303, 1312, 1313 (Fed. Cir. 2005) (en banc)).
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`A. Claim Terms To Be Construed
`For purposes of this proceeding only, Petitioners propose BRI constructions
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`for the following terms. All remaining terms should be given their plain meaning.
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`“video decoder”
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`1.
`Proposed BRI Construction: “hardware and/or software that translates data
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`streams into video information”
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`The term “video decoder” appears in claims 1-6, 8, 9, and 11-15. The ’045
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`patent generally refers to a decoder as a “video and/or audio decompression
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`device.” Ex. 1001, 1:65-67. According to the specification, “[a]ny conventional
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`decoder including a decoder complying to the MPEG-1, MPEG-2, H.261, or H.261
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`standards, or any combination of them, or any other conventional standard can be
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`used as the decoder/encoder.” Id., 15:30-33 (emphasis added). A conventional
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`decoder around the time of the alleged invention of the ’045 patent was understood
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`to include “any hardware or software system that translates data streams into video
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`or audio information.” Ex. 1014 at 3.
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`Consistent with
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`this understanding of a decoder,
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`the ’045 patent
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`acknowledges that a decoder can be implemented as hardware or software. See,
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`e.g., Ex. 1001, 6:52-58. In one example, the specification explains that video
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`Petition for Inter Partes Review of U.S. Pat. No. 7,542,045
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`decoding can be performed by hardware and audio decoding can be performed by
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`software. Id., 6:55-62. Similarly, claim 4 of the ’045 patent discloses a scenario in
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`which a “first bus interface” is associated with both a decoder and a central
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`processing circuit (the central processing circuit presumably performing some of
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`the software-based functionality of the decoder), and a “second bus interface” is
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`only associated with the central processing circuit. Id., 16:4-5, 16:18-22.
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`Therefore,
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`consistent with
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`the
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`’045
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`patent
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`specification
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`and
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`contemporaneous dictionary definitions, the BRI of the term “video decoder” is
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`“hardware and/or software that translates data streams into video information.”
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`“fast bus”
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`2.
`The term “fast bus” appears in independent claim 4. The ’045 patent
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`describes a “fast bus” as “any bus having a bandwidth sufficient to allow the
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`system to operate in real time.” Ex. 1001, 5:26-31 (emphasis added); see also id.,
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`7:51-58 (explaining how to determine whether a bus’s bandwidth is sufficient for
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`such operation). The specification provides examples of fast buses that purportedly
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`permit “real time” data transfers between a decoder and a memory under at least
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`some bandwidth calculations, including the industry standard PCI bus. Id., 5:26-31.
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`In contrast, during prosecution of U.S. Patent No. 8,681,164 (“the ’164 patent”), a
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`child of the ’045 patent (see Ex. 1015 at 1), Applicants argued (1) a bus’s latency,
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`irrespective of bandwidth, determines whether a bus satisfies a “real time”
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`Petition for Inter Partes Review of U.S. Pat. No. 7,542,045
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`requirement, and, as a result, (2) a PCI bus does not satisfy a “real time”
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`requirement. Ex. 1016 at 8; see also Microsoft Corp. v. Multi-Tech Sys., Inc., 357
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`F.3d 1340, 1350 (Fed. Cir. 2004) (finding an applicant’s statement to the USPTO
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`in a later application is relevant to the scope of the claimed invention in an earlier
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`issued patent); In re Katz Interactive Call Processing Patent Litig., 639 F.3d 1303,
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`1325 (Fed. Cir. 2011).
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`The discrepancy between the description of “real time” in the ’045 patent
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`and the prosecution history of the ’164 patent would have caused one of ordinary
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`skill in the art not to be informed, with reasonable certainty, about the scope of a
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`bus that satisfies the “real time” requirement. Nautilus, Inc. v. Biosig Instruments,
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`Inc., 134 S. Ct. 2120, 2123 (2014). Therefore, the ’045 patent’s description of a
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`“fast bus” as “any bus having a bandwidth sufficient to allow the system to operate
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`in real time,” Ex. 1001, 5:26-31, would have also been indefinite.
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`In related litigation, Patent Owner has argued that the term “fast bus” is a
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`“bus with a bandwidth equal to or greater than the required bandwidth to operate in
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`real time.” (Ex. 1011 at 18; Ex. 1012 at 16.) Therefore, while Petitioners submit
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`that claim 4’s recitation of a “fast bus” is indefinite, Petitioners have applied Patent
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`Owner’s interpretation of “fast bus” when applying the prior art to claim 4.
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`“decoder directly supplies a display device with an image”
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`3.
`The term “decoder directly supplies a display device” appears in dependent
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`Petition for Inter Partes Review of U.S. Pat. No. 7,542,045
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`claims 6 and 13. Petitioners submit that the ’045 patent does not describe any
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`decoder that directly supplies a display device with an image, let alone how a
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`decoder would directly supply a display device with an image. However, Patent
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`Owner may argue that in the ’045 patent, a decoder directly supplies display
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`adapter with an image, and the display adapter is considered to be a part of the
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`display device. See, e.g., Ex. 1001, 5:34-37 (“the decoder directly supplies a
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`display adapter of the screen with an image under decoding which is not used to
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`decode a subsequent image”), 10:42-44 (“[t]he display adapter then supplies these
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`data to a display device such as a screen”). In related litigation, Patent Owner has
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`argued that an image is “directly supplied” if it is supplied without being stored in
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`main memory for purposes of decoding subsequent images. Ex. 1011 at 19; Ex.
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`1012 at 22; see also Ex. 1013 at 1. Therefore, while Petitioners submit that claims
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`6 and 13 lack written description support, Petitioners have applied Patent Owner’s
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`interpretation when applying the prior art to claims 6 and 13.
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`Expiration of the ’045 Patent
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`B.
`In addition to the BRI analysis above, Petitioners recognize that the ’045
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`patent appears set to expire in August 2016, which will be subsequent to the
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`requested institution of trial in this proceeding, but may precede a final decision. In
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`such cases, the Board has held (citing In re Rambus, Inc., 694 F.3d 42, 46 (Fed.
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`Cir. 2012)), that it will construe patent claims, once expired, according to the
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`Petition for Inter Partes Review of U.S. Pat. No. 7,542,045
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`standard applied by the district courts by applying the principles set forth in
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`Phillips, 415 F.3d at 1312. See, e.g., Toyota Motor Corp. v. Hagenbuch, IPR2013-
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`00483, Paper No. 37 at 5 (Dec. 5, 2014). Petitioners respectfully submit that this
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`change in standards would not affect any of the proposed grounds in this Petition,
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`especially in view of Patent Owner’s interpretations of the claims under the
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`Phillips standard.
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`VIII. LEVEL OF ORDINARY SKILL IN THE ART
`A person of ordinary skill in the art at the time of the alleged invention of
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`the ’045 patent would have had an accredited Bachelor’s degree in Electrical
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`Engineering and/or Computer Science and/or Computer Engineering and had three
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`years’ experience in the fields of data compression and overall computer system
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`architecture. This person would have been capable of understanding and applying
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`the prior art references described herein. Ex. 1030, ¶ 78-81.
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`IX. SPECIFIC GROUNDS OF CHALLENGE
`A. Ground A: Rathnam Anticipates, under 35 U.S.C. § 102, claims 1-
`2, 4-7, 9-10, 12-13, and 15-17
`1.
`1[pre]: “An electronic system comprising:”
`Rathnam discloses an electronic system. See, e.g., Ex. 1005 at 12-13; see
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`Rathnam anticipates claim 1
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`a.
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`also Ex. 1030, Stone Decl. at ¶ 84, 86-97, 131, 148, 162. For example, Rathnam
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`describes the TM-1, which “is the first in a family of programmable multimedia
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`Petition for Inter Partes Review of US. Pat- No. 7,542,045
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