US007777753B2
`
`(12) United States Patent
`Owen et al.
`
`(10) Patent No.:
`
`(45) Date of Patent:
`
`US 7,777,753 B2
`*Aug. 17, 2010
`
`(54)
`
`(75)
`
`ELECTRONIC SYSTEM AND METHOD FOR
`SELECTIVELY ALLOWING ACCESS TO A
`SHARED MEMORY
`
`Inventors: Jefferson Eugene Owen, Freemont, CA
`(US); Raul Zegers Diaz, Palo Alto, CA
`(US); Osvaldo Colavin, Tucker, GA
`(US)
`
`(73)
`
`Assignee: STMicroelectronics, Inc., Carrollton,
`TX (US)
`
`(*)
`
`Notice:
`
`Subject to any disclaimer, the term of this
`patent is extended or adjusted under 35
`U.S.C. 154(b) by 0 days.
`
`This patent is subject to a terminal dis-
`claimer.
`
`(21)
`
`(22)
`
`(65)
`
`(63)
`
`(51)
`
`(52)
`
`(58)
`
`Appl. No.: 12/424,389
`
`Filed:
`
`Apr. 15, 2009
`Prior Publication Data
`
`US 2009/0201305 A1
`
`Aug. 13, 2009
`
`Related U.S. Application Data
`
`Continuation of application No. 11/956,165, filed on
`Dec. 13, 2007, now Pat. No. 7,542,045, which is a
`continuation of application No. 10/174,918, filed on
`Jun. 19, 2002, now Pat. No. 7,321,368, which is a
`continuation of application No. 09/539,729, filed on
`Mar. 30, 2000, now Pat. No. 6,427,194, which is a
`continuation of application No. 08/702,910, filed on
`Aug. 26, 1996, now Pat. No. 6,058,459.
`Int. Cl.
`
`(2006.01)
`G06F 15/167
`(2006.01)
`G09G 5/36
`(2006.01)
`G09G 5/39
`U.S. Cl.
`..................... .. 345/541; 345/542; 345/531;
`345/547
`
`Field of Classification Search ............... .. 345/541,
`345/531, 542, 547, 555, 501, 519, 545
`See application file for complete search history.
`
`(56)
`
`CA
`
`References Cited
`U.S. PATENT DOCUMENTS
`
`4,257,095 A
`
`3/1981 Nadir ....................... .. 710/119
`(Continued)
`FOREIGN PATENT DOCUMENTS
`
`2100700
`
`1/1995
`(Continued)
`OTHER PUBLICATIONS
`
`U.S. District Court, Eastern District of Texas Live (Sherman), Civil
`Docket for Case #: 4:03-cv-00276-LED, STMicroelectronics, Inc.,
`Plaintiffv. Motorola, Inc. , andFreescale Semiconductor, Inc., Defen-
`dants, Counterclaim Plaintiffs v. STMicroelectronics N. I/., and
`STMicroelectronics, Inc., Counterclaim Defendants, date filed Jul.
`18, 2003, 47 pages.
`
`(Continued)
`
`Primary Examiner Hau H Nguyen
`(74) Attorney, Agent, or Firm—Lisa K. Jorgenson; David V.
`Carlson
`
`(57)
`
`ABSTRACT
`
`An electronic system, an integrated circuit and a method for
`display are disclosed. The electronic system contains a first
`device, a memory and a video/audio compression/decom-
`pression device such as a decoder/encoder. The electronic
`system is configured to allow the first device and the video/
`audio compression/decompression device to share the
`memory. The electronic system may be included in a com-
`puter in which case the memory is a main memory. Memory
`access is accomplished by one or more memory interfaces,
`direct coupling of the memory to a bus, or direct coupling of
`the first device and decoder/encoder to a bus. An arbiter
`selectively provides access for the first device and/or the
`decoder/encoder to the memory based on priority. The arbiter
`may be monolithically integrated into a memory interface.
`The decoder may be a video decoder configured to comply
`with the MPEG-2 standard. The memory may store predicted
`images obtained from a preceding image.
`
`17 Claims, 6 Drawing Sheets
`
`FIRST DEVICE
`
`MEMORY INIERFACE
`56
`MEMORY CONTROLLER
`
`VIDEO
`DECODING
`CIRCUIT
`AUDIO
`DECODING
`CIRCUIT
`
`VIDEO
`ENCODING
`CIRCUIT
`AUDIO
`ENCODING
`CIRCUIT
`
`
`
`Page 1 of 21
`
`HTC-LG-SAMSUNG EXHIBIT 1001
`
`

`
`US 7,777,753 B2
`Page 2
`
`U.S. PATENT DOCUMENTS
`
`Doug Bailey, et al., “Programmable Vision Processor/Controller for
`Flexible Implementation of Current and Future Image Compression
`Standards,” IEEE Micro, Oct. 1992, pp. 33-39.
`Yin Bao and Adarshpal S. Sethi, “OCP_A: An Efficient QoS Control
`Scheme for Real Time Multimedia Communications,” IEEE Global
`Telecommunications Conference, Conference Record, Nov. 3-8,
`1997, vol. 2 of 3, pp. 741-745.
`Mark Baugher, “The OS/2 Resource Reservation System,” Multime-
`dia Computing and Networking 1995, Feb. 1995, vol. 2417, pp.
`167-176.
`
`Allen J. Baum et al., “A Multimedia Chipset for Consumer Audio-
`Visual Applications,” IEEE Transactions on Consumer Electronics,
`Aug. 1997, vol. 43, No. 3, pp. 646-648.
`Vasudev Bhaskaran et al., “Multimedia Architectures: From Desktop
`Systems to Portable Appliances,” Multimedia Hardware Architec-
`tures 1997, Feb. 12-13, 1997, vol. 3021, pp. 14-25.
`Philip Bonarmon et al., “The Architecture of the Dali Main-Memory
`Storage Manager,” Multimedia Tools andApplications, 1997, vol. 4,
`pp. 1 15 -15 1 .
`C. Bouville et al., “DVFLEX: A Flexible MPEG Real Time Video
`CODEC,” International Conference on Image Processing, Sep.
`16-19, 1996, vol. II ofIII, pp. 829-832.
`V. Michael Bove, Jr., “The Impact of New Multimedia Representa-
`tions on Hardware and Software Systems,” Multimedia Hardware
`Architectures 1997, Feb. 12-13, 1997, vol. 3021, pp. 34-39.
`Apurva Brahmbatt, “A VLSI Architecture for Real Time Code Book
`Generator and Encoder of a Vector Quantizer,” International Confer-
`ence on Image Processing, IEEE Signal Processing Society, vol. 2,
`Sep. 16-19, 1996, pp. 991-994.
`Dave Bursky, “Codec Compresses Images in Real Time: Real-Time
`Motion Video or Still Images Can be Compressed with Single-Chip
`Multistandard Core,” Electronic Design, Oct. 3, 1993.
`Dave Bursky, “Performing Over 8 BOPS, A Two Chip Set Can
`Compress or Expand Video in Real Time Image Processing Chip Set
`Handles Full Motion Video,” Electronic Design, May 3, 1993.
`Navin Chaddha et al., “A Real-Time Scalable Color Quantizer
`Trainer/Encoder,” The Twenty—Eighth Asilomar Conference on Sig-
`nals, Systems & Computers, Oct. 30-Nov. 2, 1994, pp. 203-207.
`Shih-Fu Chang et al., “Columbia’s VoD and Multimedia Research
`Testbed with Heterogeneous Network Support,” Multimedia Tools
`andApplications, 1997, vol. 5, pp. 171-184.
`Shailender Chaudhry and Alok Choudhary, “A Framework for Analy-
`sis of Guaranteed QOS Systems,” Video Techniques and Softwarefor
`Full—Service Networks, Nov. 21, 1996, vol. 2915, pp. 25-38.
`Geng-Lin Chen et al., “Video Encoder Architecture for MPEG2 Real
`Time Encoding,” IEEE Transactions Consumer Electronics, Aug.
`1996, vol. 42, No. 3, pp. 290-299.
`Raymond M.K. Cheng and Donald W. Gillies, “Disk Management
`for a Hard Real-Time File System,” Multimedia Systems, vol. 4, No.
`2, 1996,pp. 255-260.
`Leonardo Chiariglione, “MPEG: A Technological Basis for Multi-
`media Applications,” Multimedia, Spring 1995, vol. 2, No. 1.
`Winston Sijin Choe et al., “ATM-Based Multi-Party Conferencing
`System,”IEEE Global Telecommunications Conference, Nov. 1995,
`vol. 1 of3, pp. 592-596.
`Francoise Colaitis, “Opening Up Multimedia Object Exchange with
`MHEG,” Multimedia, Summer 1994, vol. 2, No. 2.
`Geoff Coulson et al., “The Design of a QoS-Controlled ATM-Based
`Communications System in Chorus,” IEEE Journal on Selected
`Areas in Communications, May 1995, vol. 13, No. 4, pp. 686-699.
`Rabin Deka, “A Comprehensive Study of Digital Signal Processing
`Devices,” Microprocessors and Microsystems, May 1995, vol. 19,
`No. 4, pp. 209-221.
`Erwan Demairy et al., “On the Correctness of Multimedia Applica-
`tions,” The 11”’ Euromicro Conference on Real-Time Systems, IEEE
`Computer Society, Jun. 9-11, 1999, pp. 226-233.
`C.H. Van Dusen et al., “From Concept to an Implementation,” Inter-
`national Broadcasting Convention, Sep. 12-16, 1996.
`Santanu Dutta et al., “VLSI Issues in Memory-System Design for
`Video Signal Processors,” IEEE 1995, pp. 498-503.
`
`................... .. 364/200
`9/1988 Conforti
`1/1990 Marquardt
`................ .. 307/518
`
`6/1991 Bajietal.
`380/20
`5/1993 Normile et al.
`........... .. 382/166
`10/1993 Valentaten et al.
`........ .. 345/189
`11/1994 Takeda ........ ..
`.395/425
`12/1994 Price et al.
`................ .. 395/725
`9/1995 Lehman et al.
`........... .. 395/162
`10/1995 Scalise etal.
`. 348/431.1
`10/1995 Normile et al.
`283/304
`5/1996 Harney
`395/727
`9/1996 Retter etal.
`364/514A
`11/1996 Cheney et al.
`............ .. 348/407
`11/1996 Artieri ...................... .. 348/416
`12/1996 Silverbrook
`395/133
`1/1997 Nallyet al.
`395/520
`4/1997 Joh .... ..
`.. 395/200.02
`4/1997 Popat
`. . . . . . . . .
`. . . . . .. 395/728
`10/1997 Lambrecht ..
`710/128
`5/1998 Tang etal.
`345/521
`6/1998 Wasserman et al.
`395/200.77
`6/1998 Stearns et al.
`709/247
`7/1998 Stearns
`382/233
`8/1998 Okitsu . . . . . . . .
`. . . . . .. 345/535
`8/1998 Gulicketal.
`. 395/800.32
`9/1998 Zenda ......... ..
`345/204
`9/1998 Pollmann et al.
`. 711/151
`9/1998 Diaz et al.
`. 709/247
`9/1998 Muthal
`345/541
`11/1998 Perego ..... ..
`345/202
`6/1999 Malladi et al.
`. 345/521
`7/1999 Sun et al.
`. 370/477
`8/1999 Torborg,Jr.et al.
`. 345/202
`9/1999 Lam ............ ..
`.711/202
`5/2000 Owen etal.
`. 711/151
`10/2001 Mizuyabu et al.
`. 345/540
`12/2001 Yarnashita et al.
`........ .. 711/147
`
`
`
`..
`
`.
`
`4,774,660 A
`4,894,565 A
`5,027,400 A
`5,212,742 A
`5,250,940 A
`5,363,500 A
`5,371,893 A
`5,450,542 A
`5,459,519 A
`5,461,679 A
`5,522,080 A
`5,557,538 A
`5,576,765 A
`5,579,052 A
`5,590,252 A
`5,598,525 A
`5,621,893 A
`5,623,672 A
`5,682,484 A
`5,748,203 A
`5,774,206 A
`5,774,676 A
`5,778,096 A
`5,793,384 A
`5,797,028 A
`5,809,245 A
`5,809,538 A
`5,812,789 A
`5,815,167 A
`5,835,082 A
`5,912,676 A
`5,923,665 A
`5,936,616 A
`5,960,464 A
`6,058,459 A
`6,297,832 B1
`6,330,644 B1
`
`FOREIGN PATENT DOCUMENTS
`
`DE
`EP
`EP
`EP
`EP
`EP
`EP
`EP
`FR
`JP
`JP
`JP
`JP
`JP
`JP
`WO
`
`69631364
`0 639 032
`0 673 171
`0 495 574
`0827348
`0827110
`0 710 029
`0772159
`2740583
`06-030442
`06-178274
`06-348238
`08-018953
`10-108117
`10-145739
`96/20567
`
`11/2004
`7/1994
`9/1995
`3/1997
`3/1998
`9/1998
`3/2002
`1/2004
`4/1997
`2/1994
`6/1994
`12/1994
`1/1996
`4/1998
`5/1998
`7/1996
`
`OTHER PUBLICATIONS
`
`Bryan Ackland, “The Role ofVLSI in Multimedia,” IEEE Journal of
`Solid—State Circuits, Apr. 1994, vol. 29, No. 4, pp. 381-388.
`Joel F. Adam and David L. Tennenhouse, “The Vidboard: A Video
`Capture and Processing Peripheral for a Distributed Multimedia Sys-
`tem,”ACMMultimedia, Aug. 1-6, 1993, vol. 5, No. 2, pp. 113-120.
`Matthew Adiletta, et al., “Architecture of a Flexible Real-Time Video
`Encoder/Decoder: The DECchip 21230,” Multimedia Hardware
`Architectures 1997, Feb. 12-13, 1997, vol. 3021, pp. 136-148.
`T. Araki, et al., “Video DSP Architecture for MPEG2 CODEC,”
`ICASSP—94 S2 AUVN, Speech Processing 2, Audio, Underwater
`Acoustics, VLSI & Neural Networks, Apr. 19-22, 1994, vol. 2, pp.
`417-420.
`
`Page 2 of 21
`
`

`
`US 7,777,753 B2
`Page 3
`
`Fandrianto, Jan and Tim Williams, “A Programmable Solution for
`Standard Video Compression,” in IEEE Computer Society Press,
`Thirty-Seventh IEEE Computer Society International Conference,
`San Francisco, CA, Feb. 24-28, 1992, pp. 47-50.
`Borko Furht, “Multimedia Systems: An Overview,” Multimedia,
`Sprin 1994, vol. 1, No. 1, pp. 47-59.
`Borko Furht, “Processor Architectures for Multimedia: A Survey,”
`Multimedia Modeling, Nov. 17-20, 1997, pp. 89-109.
`Subramanian Ganesan, “A Dual-DSP Microprocessor System for
`Real—Time Digital Correlation,” Microprocessors and Microsystems,
`vol. 15, No. 7, Sep. 1991, pp. 379-384.
`Wanda Gass, “Architecture Trends of MPEG Decoders for Set-Top
`Box,” Multimedia Hardware Architectures 1997, Feb. 12-13, 1997,
`vol. 3021, pp. 162-169.
`J. Goodenough et al., “A General Purpose, Single Chip Video Signal
`Processing (VSP) Architecture for Image Processing, Coding and
`Computer Vision," IEEE 1994, pp. 1-4.
`John Goodenough et al., “A Single Chip Video Signal Processing
`Architecture for Image Processing, Coding and Computer Vision,”
`IEEE Transaction on Circuits andSystemsfor J/zdeo Technology, Oct.
`1995, vol. 5, No. 5, pp. 436-445.
`Robert J. Gove eta1., “Image Computing Requirements for the 1990s:
`From Multimedia to Medicine,” The International Societyfor Opti-
`cal Engineering, Medical Imaging J/.' Image Capture, Formatting and
`Display, Feb. 1991, vol. 1444, pp. 318-333.
`Robert J. Gove, “The MVP: A Highly-IntegratedVideo Compression
`Chip,” DCC ’94, Data Compression Conference, Mar. 29-31, 1994,
`pp. 215-224.
`James L. Green, “Capturing Digital Video Using DVI, Multimedia
`and the i750 video processor,” Dr Dohh’s Journal, Jul. 1992, vol. 17,
`Issue 7.
`Klaus Gruger et al., “MPEG-1 Low-Cost Encoder Solution,” Europe
`Series, Advanced Image and Wdeo Communications and Storage
`Technologies, Mar. 20-23, 1995, vol. 2451, pp. 41-51.
`Fouad Guediri and Pavani Chilamakuri, “An Affordable Solution to
`Real—Time Video Compression,” Technical Conference, Session 10
`Imaging & HDTV, Mar. 8, 1995, pp. 261-265.
`Karl Guttag et al., “A Single-Chip Multiprocessor for Multimedia:
`The MVP,” IEEE Computer Graphics and Applications, Nov. 1992,
`pp. 53-64.
`Y. Hoffner and M.F. Smith, “Communication between two micropro-
`cessors
`through
`common memory,” Microprocessors
`and
`Microsystems, Jul./Aug. 1982, vol. 6, No. 6, pp. 303-308.
`T. Russell Hsing, “The Challenge ofVLSI Technology to Low-Bit
`Rate Video,” pp. 164-168, May 17-19, 1989.
`J. Huang and P.J. Wan, “On Supporting Mission-Critical Multimedia
`Applications,” International Conference on Multimedia Computing
`andSystems, Jun. 17-23, 1996, pp. 46-53.
`Jiandong Huang and Ding-Zhu Du, “Resource Management for Con-
`tinuous Multimedia Database Applications,” Real—Time Systems
`Symposium, Dec. 7-9, 1994, pp. 46-54.
`Khoa D. Huynh and Taghi M. Khoshgoftaar, “Performance Analysis
`of Advanced I/O Architectures for PC-based Video Servers,” Multi-
`media Systems, vol. 2, No. 1, 1994, pp. 36-50.
`M. Irvin et al., “A New Generation of MPEG-2 Video Encoder ASIC
`& ITS Application to New Technology Markets,” International
`Broadcasting Convention, Sep. 12-16, 1996, Pub. No. 428.
`Rajeev Jain et al., “An Integrated Circuit Design for Pruned Tree
`Search Vector Quantization Encoding with an Off-Chip Controller,”
`IEEE Transactions on Circuit andSystemsfor Wdeo Technology, Jun.
`1992, vol. 2, No. 2, pp. 147-158.
`A.A. Kassim et al., “A DSP-Based Video Compression Test-Bed,”
`Microprocessors and Microsystems, vol. 20, 1997, pp. 541-551.
`Dimitris N. Kanellopoulos et al., “The Comprehensive Approach of
`QOS and the Evolution of ACSE Protocols in Multimedia Commu-
`nications,” Proceedings ofthe Third IEEE International Conference
`on Electronics, Circuits, and Systems, Oct. 13-16, 1996, vol. 1, pp.
`323-326.
`Kevin A. Kettler and Jay K. Strosnider, “Scheduling Analysis of the
`Micro Channel Architecture for Multimedia Applications,” Interna-
`tional Conference on Multimedia Computing and Systems, May
`14-19, 1994, pp. 403-414.
`
`Page 3 of 21
`
`Saied Hosseini Khayat and Adreas D. Bovopoulos, “A Proposed Bus
`Arbitration Scheme for Multimedia Workstations,” International
`Conference on Multimedia Computing and Systems, May 14-19,
`1994, pp. 415-423.
`D. Kim et al., “A Real—Time MPEG Encoder Using a Programmable
`Processor,” IEEE, 1994, pp. 161-170.
`Toshiro Kinugasa et al., “A Video Pre/Post-processing LSI for Video
`Capture,” 1996 Digest ofTechnical Papers, Jun. 5-7, 1996, pp. 396-
`397.
`Kiyoshi Kohiyama et al., “Architecture of MPEG-2 Digital Set—Top—
`Box for CATV Vod System,” IEEE, 1996, pp. 667-672.
`Takeo Koinuma and Noriharu Miyaho, “ATM in B-ISDN Commu-
`nication Systems andVLSI Realization,” IEEEJournal ofSolid—State
`Circuits, Apr. 1995, vol. 30, No. 4, pp. 341-347.
`Toshio Kondo et al., “Two-Chip MPEG-2 Video Encoder,” IEEE
`Micro, Apr. 1996, vol. 16, No. 2, pp. 51-58.
`S.W. Lau and John C.S. Lui, “A Novel Video-On-Demand Storage
`Architecture for Supporting Constant Frame Rate with Variable Bit
`Rate Retrieval,” Network and Operating Systems Supportfor Digital
`Audio and Wdeo, Apr. 19-21, 1995, pp. 294-305.
`Woobin Lee et al., “MediaStation 5000: Integrating Video and
`Audio,”Multimedia, Summer 1994, vol. 1, No. 2, pp. 50-61.
`Woobin Lee eta1., “Real—Time MPEG Video Compression Using the
`MVP,” Data Compression Conference ’94, Mar. 29-31, 1994.
`Chia-Hsing Lin et al., “Low Power Design for MPEG-2 Video
`Decoder,” IEEE Transactions on Consumer Electronics, Aug. 1996,
`vol. 42, No. 3, pp. 513-521.
`Cha-Hsing Lin and Chein-WeiJen, “On the Bus Arbitration for
`MPEG2 Video Decoder,” VLSI Tech, Systems and Appl. 1995 Sym-
`posium, pp. 201-205.
`J. Lin et al., “DMA-based Communications between PC and DSP,”
`Microprocessors and Microsystems, Apr. 1991, vol. 15, No. 3, pp.
`137-142.
`Ferran Lisa et al., “A Reconfigurable Coprocessor for a PCI-based
`Real Time Computer Vision System,” Field—Programmable Logic
`and Applications, 7”’ International Workshop, FPL 1997, London,
`UK, Sep. 1-3, 1997, pp. 392-399.
`M. Norley Liu, “MPEG Decoder Architecture for Embedded Appli-
`cations,” IEEE Transactions on Consumer Electronics, Nov. 1996,
`vol. 42, No. 4, pp. 1021-1028.
`Kamal N. Majeed, “Dual Processor Automotive Controller,” IEEE,
`1988, pp. 39-44.
`Masatoshi Matsuo et al., “A Programmable Video Codec System for
`Low-Bit-Rate Communication,” IEEE Transactions on Consumer
`Electronics, Aug. 1997, vol. 43, No. 3, pp. 903-910.
`Kiyoshi Miura et al., “A 600 mW Single Chip MPEG2 Video
`Decoder,” IEICE Trans. Electrono, Dec. 1995, vol. E78-C, No. 12,
`pp. 1691-1696.
`Steven G. Morton, “A236 Parallel DSP Chip Provides Real—Time
`Video Processing Economically and Efficiently,” Electro ’96 Profes-
`sional Program Proceedings, Apr. 30-May 2, 1996, pp. 261-268.
`Raymond T. Ng and Jinhai Yang, “An analysis of buffer sharing and
`prefetching techniques for multimedia systems,” Multimedia Sys-
`tems, vol. 4, No. 2, 1996, pp. 55-69.
`Agnes Ngai et al., “A Scalable Chip Set for MPEG2 Real—Time
`Encoding,” CompCon, 1996, pp. 193-198.
`Lek Heng Ngoh eta1., “On Storage Server Issues for Multimedia-on-
`Demand System,” Multimedia Modeling, Nov. 1995, pp. 393-409.
`Huw Oliver et al., “Distributed Connection Management for Real-
`Time Multimedia Services,” From Multimedia Services to Network
`Services, Dec. 1997, pp. 59-74.
`T.H. Ooi et al., “A PC-Based MPEG Compressed Data Decoder,”
`IEEE Transactions on ConsumerElectronics, Nov. 1995, vol. 41, No.
`4, pp. 1169-1173.
`Yasushi Ooi et al., “An MPEG-2 Encoder Architecture Based on a
`Single Chip Dedicated LSI with a Control MPU,” IEEE, 1997, pp.
`599-602.
`Banu Ozden et al., “On the Design of a Low-Cost Video-on-Demand
`Storage System,” IEEE Journal of Solid State Circuits, Apr. 1994,
`vol. 29, No. 4, pp. 40-54.
`Pallavi Shah, “Multimedia on the Internet,” The Twentieth Annual
`International Computer Software & Applications Conference, Aug.
`21-23, 1996, p. 150.
`
`

`
`US 7,777,753 B2
`Page 4
`
`Pramod Pancha and Magda El Zarki, “Bandwidth-Allocation
`Schemes for Variable-Bit-Rate MPEG Sources in ATM Networks,”
`IEEE Transactions on Circuits and Systems for Wdeo Technology,
`Jun. 1993, vol. 3, No. 3, pp. 190-198.
`R. Radhakrishna Pillai, “Multimedia Over tl1e Internet,” The Twen-
`tieth Annual International Computer Software & Applications Con-
`ference, Aug. 21, 23, 1996, p. 149.
`Peter Pirsch et al., “Architectural Approaches for Multimedia Pro-
`cessors,” Multimedia Hardware Architectures 1997, Feb. 12-13,
`1997, V01. 3021, pp. 2-13.
`Peter Pirsch et al., “VLSI Architectures for Video Compression—A
`Survey,” Proceedings of the IEEE, Feb. 1995, vol. 83, No. 2, pp.
`220-246.
`Peter Pirsch and Winfried Gehrke, “VLSI Architectures for Video
`Signal Processing,” Image Processing and its Applications, Jul. 4-6,
`1995, Conference Publication No. 410, pp. 6-10.
`Herbert Plansky, “Variable Block-Size Vector Quantization in the
`Transform Domain,” Signal Processing VI Theories and Applica-
`tions, vol. III, 1992, pp. 1243-1246.
`P. Venkat Rangan et al., “Designing an On-Demand Multimedia
`Service,”IEEE Communications Magazine, Jul. 1992, vol. 30, No. 7,
`pp. 56-64.
`S.F. Reddaway, “Fractal Graphics and Image Compression on a
`DAP,” The Design and Application ofParallel Digital Processors,
`Apr. 11-15, 1988, p. 201.
`William D. Richard et al., “The Washington University Broadband
`Terminal,”IEEE Journal on SelectedAreas in Communications, Feb.
`1993, vol. 11, No. 2, pp. 276-282.
`William D. Richard et al., “The Washington University Multimedia
`System,” Multimedia Systems, vol. 1, No. 3, 1993, pp. 120-131.
`Reza Rooholamini andVladimir Cherkassky, “ATM-Based Multime-
`dia Servers,” Multimedia, Spring 1995, vol. 2, No. 1, pp. 39-52.
`Amr Sabaa et al., “Design and Modelling of a Nonblocking Input
`Buffer ATM Switch,” Can. 1. Elect. & Comp. Eng., vol. 22, Nov. 3,
`1997, pp. 87-93.
`N.L. Seed et al., “An Enhanced Transputer Module for Real-Time
`Image Processing,” Third International Conference on Image Pro-
`cessing, 1989, pp. 131-135.
`Pallavi Shah, “Multimedia on the Internet,” The Twentieth Annual
`International Computer Software & Applications Conferences,
`COMPSAC ’96, Aug. 21-23, 1996, p. 150.
`Doug Shepherd et al., “Quality-of-Service Support for Multimedia
`Applications,” Multimedia, Fall 1996, vol. 3, No. 3, pp. 78-82.
`N. Sriskanthan et al., “A Real-Time PC-Based Video Phone System
`on ISDN/Lan,” IEEE Transactions on Consumer Electronics, May
`1995, vol. 41, No. 2, pp. 332-342.
`Paul A. Stirpe and Dinesh C. Verma, “Application Migration to
`Reserved Bandwidth Networks,” Multimedia Computing and Net-
`working 1995, Feb. 1995, vol. 2417, pp. 428-434.
`Ichiro Tamitani et al., “An Encoder/Decoder Chip Set for the MPEG
`Video Standard,” IEEE International Conference on Acoustics,
`Speech and Signal Processing, Mar. 23-26., 1992, pp. 661-664.
`Prasoon Tiwari and Eric Viscito, “A Parallel MPEG-2 Video Encoder
`with Look-Ahead Rate Control,” The 1996 IEEE International Con-
`ference on Acoustics, Speech, and signal Processing Conference,
`May 7-10, 1996, pp. 1994-1997.
`Fouad A. Tobagi et al., “Streaming RAID—A Disk Array Manage-
`ment System for Video Files,” ACMMultimedia 93, Aug. 1-6, 1993,
`pp. 393-400.
`Kevin Tsang and Belle W.Y. Wei, “A VLSI Architecture for a Real-
`Time Code Book Generator and Encoder of a Vector Quantizer,”
`IEEE Transactions on a Joint Publication of IEEE Circuits and
`Systems Society, the IEEE Computer Society, the IEEE Solid—State
`Circuits Council, Sep. 1994, vol. 2, No. 3, pp. 360-364.
`Shin-ichi Uramoto et al., “An MPEG2 Video Decoder LSI with
`Hierarchical Control Mechanism,” IEEE 1997 Custom Integrated
`Circuits Conference, Apr. 26, 1995, pp. 1697-1708.
`OlivierVerscheure and Jean-Pierre Hubaux. “Perceptual Video Qual-
`ity and Activity Metrics: Optimization of Video Service Based on
`MPEG-2 Encoding,” Multimedia Telecommunications and Applica-
`tions, Nov. 1996, pp. 249-265.
`Andreas Vogel et al., “Distributed Multimedia and QOS: A Survey,”
`Multimedia, Summer 1995, vol. 2, No. 2, pp. 10-19.
`
`Page 4 of 21
`
`Marco Winzker et al., “Architecture and Memory Requirements for
`Stand-Alone and Hierarchical MPEG2 HDTV-Decoders with Syn-
`chronous DRAMs,” IEEE International Symposium on Circuits and
`Systems, Apr. 30-May 3, 1995, pp. 609-612.
`AndrewWolfe et al., “Design Methodology for Programmable Video
`Signal Processors,” Multimedia Hardware Architectures 1997, Feb.
`12-13, 1997, vol. 3021, pp. 26-31.
`Lars C. Wolfe and Ralf Steinmetz, “Concepts for Resource Reserva-
`tion in Advance,” Multimedia Tools and Applications, 1997, pp.
`255-278.
`
`Jeffrey J. Wong et al., “The H-Bus: A Media Acquisition Bus Opti-
`mized for Multiple Streams,” Multimedia Hardware Architectures
`1997, Feb. 12-13, 1997, vol. 3021, pp. 40-50.
`Dallas E. Wrege and Jorg Liebeherr, “Video Traffic Characterization
`for Multimedia Networks with a Deterministic Service,” IEEE
`Inforcom ’96, Mar. 1996, vol. 2, pp. 537-544.
`Chen-Mie Wu et al., “A Function-Pipelined Architecture and VLSI
`Chip for MPEG Video Image Coding,” IEEE Transactions on Con-
`sumer Electronics, Nov. 1995, vol. 41, No. 4, pp. 1127-1137.
`A. Yamada et al., “Real-time MPEG2 Encoding and Decoding with a
`Dual-Issue RISC Processor,” Proceedings ofthe IEEE 1997 Custom
`Integrated Circuits Conference, May 5-8, 1997, pp. 225-228.
`Katsuyuki Yamazaki et al., “ATM Networking and Video -Coding
`Techniques for QOS Control in B-ISDN,” IEEE Transactions on
`Circuits and Systemsfor Wdeo Technology, Jun. 1993, vol. 3, No. 3,
`pp. 175-181.
`Masahiko Yoshimoto et al., “ULSI Realization of MPEG2 Realtime
`Video Encoder and Decoder—An Overview,” IEICE Trans. Electron,
`May 23, 1995, vol. E78-C, No. 12, pp. 1668-1681.
`Frank Fran-Ko Yu et al., “Resource Management Issues of a Video
`Server,” Multimedia Storage and Archiving Systems, Nov. 18-19,
`1996, vol. 2916, pp. 290-300.
`Saif S. Zahir and Hussein Alnuweiri, “VBR MPEG-2 Encoded Video
`Over Broadband Network,” Proceedings of SPIE, Nov. 3-5, 1997,
`vol. 3231, pp. 372-381.
`Hui Zhang and Edward W. Kightly, “Red-VBR: A New Approach to
`Support Delay-Sensitive VBR Video in Packet-Switched Networks,”
`Network and Operating System Supportfor DigitalAudio and J/zdeo,
`Apr. 19-21, 1995, pp. 258-272.
`Subramaniam Ganesan, “A Dual-DSP Microprocessor System for
`Real-Time Digital Correlation,” Microprocessors andMicrosystems,
`Sep. 1991, vol. 15, No. 7, pp. 29-37.
`The Motorola MCD212 Video Decoder and System Controller
`(“MCD212”)(as described in the Advance Information manual, pub-
`lished in the U.S. Aug. 1995, at MOT-S 723153-723240).
`the
`Apple Macintosh Quadra
`840AV when
`executing
`“Fusionrecorder 1.0” application as described in the 1993 Developer
`Note entitled Macintosh Quadra 840AV and Macintosh Centris
`660AV Computers.
`C-Cube CL450 MPEGVideo Decoder (“CL450”) as described in the
`“CL450 MPEG Decoder User’s Manual,” C-Cube Microsystems,
`Milpitas, CA 1992 (MOT-S 721789-721874).
`S. Undy et al., “A low-cost graphics and multimedia workstation chip
`set,” IEEE Micro, vol. 14, No. 2, Apr. 1994, pp. 10-22.
`Bhed, H. and P. Srinivasan, “A High-Performance Cross-Platform
`MPEG Decoder,” Digital Video Compression on Personal Comput-
`ers.'Algorithms and Technologies, SPIE Proceedings, Feb. 7-8, 1994,
`vol. 2187, pp. 241-248.
`Bursky D., “Highly Integrated Controller Eases MPEG-2 Adoption,”
`Electronic Design, vol. 43, No. 17, pp. 141-142, Aug. 21, 1995.
`Butler, B. and T. Mace, “The Great Leap Forward,” PC Magazine, pp.
`241-244, 246, 248, 250, 253-254, 256, 260-261, 264, 266-268, 273-
`275, 278, Oct. 11, 1994.
`Doquilo, J. “Symmetric Multiprocessing Servers: Scaling the Perfor-
`mance Wall,” Infoworld, pp. 82-85, 88-92, Mar. 27, 1995.
`Galbi, D. et al., “An MPEG-1 Audio/Video Decoder with Run-
`Length Compressed Antialiased Video Overlays,” IEEE Interna-
`tional Solid State Circuits Conference, pp. 286-287, 381, 1995.
`Giorgis, T., “SMP Network Operating Systems,” Computer Dealer
`News, vol. 12, No. 16, Aug. 8, 1996.
`
`

`
`US 7,777,753 B2
`Page 5
`
`King, A., Inside Windows 95, Microsoft Press, Redmond Washing-
`ton, pp. 85-90, 1994.
`Maturi, G., “Single Chip MPEG Audio Decoder,”IEEE Transactions
`on Consumer Electronics, vol. 38, No. 3, pp. 348-356, Aug. 1992.
`“MPEG Video Overview,” SGS—Thomson Microelectronics Techni—
`cal Note, pp. 1-4, 1992.
`
`Video Electronics Standards Association, “VESA Unified Memory
`Architecture Hardware Specifications Proposal,” Version: l.0p, pp.
`1-38, Oct. 31, 1995.
`Video Electronics Standards Association, VESA Unified Memory
`Architecture VESA BIOS Extensions (VUMA-SBE Proposal), Ver-
`sion l.0p, pp. 1-26, Nov. 1, 1995.
`
`Page 5 of 21
`
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`Aug. 17, 2010
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`

`
`US 7,777,753 B2
`
`1
`ELECTRONIC SYSTEM AND METHOD FOR
`SELECTIVELY ALLOWING ACCESS TO A
`SHARED MEMORY
`
`CROSS-REFERENCE TO RELATED
`APPLICATIONS
`
`This application is a continuation of U.S. patent applica-
`tion Ser. No. 11/956,165, filed Dec. 13, 2007, and allowed
`Apr. 6, 2009; which is a continuation ofU.S. Pat. No. 7,321,
`368, issued Jan. 22, 2008; which is a continuation ofU.S. Pat.
`No. 6,427,194, issued Jul. 30, 2002; which is a continuation
`of U.S. Pat. No. 6,058,459, issued May 2, 2000. All of the
`U.S. patents, U.S. patent application publications, U.S. patent
`applications, foreign patents, foreign patent applications and
`non-patent publications referred to in this specification and/or
`listed in the Application Data Sheet, are incorporated herein
`by reference, in their entirety.
`
`CROSS-REFERENCE TO OTHER RELATED
`APPLICATIONS
`
`The present application contains some text and drawings in
`common with U.S. patent application Ser. No. 08/702,911,
`filedAug. 26, 1996, and issued Sep. 22, 1998 as U.S. Pat. No.
`5,812,789, entitled: “VIDEO AND/OR AUDIO DECOM-
`PRESSION AND/OR COMPRESSION DEVICE THAT
`
`SHARES A MEMORY INTERFACE” by Raul Z. Diaz and
`Jefferson E. Owen, which had the same effective filing date
`and ownership as the present application, and to that extent is
`related to the present application, which is incorporated
`herein by reference.
`
`BACKGROUND
`
`The present invention relates to the field of electronic sys-
`tems having a video and/or audio decompression and/or com-
`pression device, and is more specifically directed to sharing a
`memory interface between a video and/or audio decompres-
`sion and/or compression device and another device contained
`in the electronic system.
`The size of a digital representation of uncompressed video
`images is dependent on the resolution and color depth of the
`image. A movie composed of a sequence of such images, and
`the audio signals that go along with them, quickly become
`large enough so that, uncompressed, such a movie typically
`carmot fit entirely onto a conventional recording medium
`such as a Compact Disc (CD). It is now also typically pro-
`hibitively expensive to transmit such a movie uncompressed.
`It is therefore advantageous to compress video and audio
`sequences before they are transmitted or stored. A great deal
`of effort is being expended to develop systems to compress
`these sequences. Several coding standards currently in use are
`based on the discrete cosine transfer algorithm including
`MPEG-1, MPEG-2, H.261, and H.263. (MPEG stands for
`“Motion Picture Expert Group”, a committee of the Interna-
`tional Organization for Standardization, also known as the
`International Standards Organization, or ISO.) The MPEG-1,
`MPEG-2, H.261, and H.263 standards are decompression
`protocols that describe how an encoded bitstream is to be
`decoded. The encoding can be done in any manner, as long as
`the resulting bitstrea1n complies with the standard.
`Video and/or audio compression devices (hereinafter
`“encoders”) are used to encode the video and/or audio
`sequence before it is transmitted or stored. The resulting
`bitstream is decoded by a video and/or audio decompression
`device (hereinafter “decoder”) before the video and/or audio
`
`10
`
`15
`
`20
`
`25
`
`30
`
`35
`
`40
`
`45
`
`50
`
`55
`
`60
`
`65
`
`2
`
`sequence is displayed. However, a bitstream can only be
`decoded by a decoder if it complies with the standard used by
`the decoder. To be able to decode the bitstream on a large
`number of systems, it is advantageous to encode the video
`and/or audio sequences in compliance with a well accepted
`decompression standard. The MPEG standards are currently
`well accepted standards for one-way communication. H-261,
`and H.263 are currently well accepted standards for video
`telephony.
`Once decoded, the images can be displayed on an elec-
`tronic system dedicated to displaying video and audio, such
`as television or a Digital Video Disk (DVD) player, or on
`electronic systems where image display is just one feature of
`the system, such as a computer. A decoder needs to be added
`to these systems to allow them to display compressed
`sequences, such as received images and associated audio, or
`ones taken from a