\HWMMW
`
`U3005797028A
`
`United States Patent
`
`Gulick et al.
`
`[11] Patent Number:
`[:9]
`
`1451 Date of Patent: Aug. 18, 1998
`
`
`5,797,028
`
`[54] COMPUTER SYSTEM HAVDIG AN
`INEPROVED DIGITAL AND ANALOG
`CONFIGURATION
`
`[75]
`
`Inventors: Dale E. Gulick: Andy Lambrecht'.
`Mike Webb: Larry Hewitt. all of
`Austin: Brian Barnes. Round Rock. all
`of Tex.
`
`[73] Assignee: Advanced Micro Devices, Inc.
`Sunnyvale. Calif.
`
`[21} Appl. No; 526.488
`
`Sep. 11, 1995
`
`Filed:
`[22]
`Int. CL“
`[51]
`[52] US. (:1.
`
`Got-l? 15m
`395130032; 3640.286;
`364fDIG. 1
`
`395:800. 300.32.
`[58] Field of Search
`395/30035.idealism-ates. 228.6. DIG. 1
`
`[56]
`
`References Cited
`US. PATENT DOCUNIENTS
`
`52li}.806
`5.434.9i3
`5.59239!
`
`........................... 381MB}
`54'I993 Kihara el al.
`
`JTMOZ
`'Ii1995 Tung et a].
`.. 36-!!489
`........
`”[99? Muyshondt et a].
`OTHER PUBLICATIONS
`
`PCI Local Buy—PC! Multimedia Design Guide—Revision
`Lil—Mar. 29. 1994. 43 pages.
`
`Primary Examiner-Flohn E. Hatrity
`Afton-ac); Agent. or Finn—Conley. Rose 81. Tayon: Jeffrey C.
`Hood
`
`ABSTRACT
`[57]
`A computer system including separate digital and analog
`system chips which provides increased performance over
`current computer architectures. The computer system of the
`present
`invention includes a digital system chip which
`performs various digital functions. including multimedia
`functions and chipset functions. and a separate analog chip
`which performs analog functions. including digital to analog
`and analog to digital conversions. Thus the present invention
`optimizes silicon use and design by splitting up digital and
`analog functions on separate chips. The system of the
`present invention also separates digital noise from analog
`noise. allowing a higher degree of integration while increas—
`ing stability.
`
`32 Claims, 11 Drawing Sheets
`
`51'1983 Kupnicki et a].
`4.742.544
`5.0272“ H199l Fujimoci
`231992 Ida et al.
`5.091.951
`5:1992 Gasperet ai.
`5,|ll.4-09
`
`. 348F233 .. 381f63
`
`380!”
`
`- 395t80‘i
`
`
`
`
`
`122
`
`124
`
`Page 1 of 20
`Page 1 of 20
`
`HTC-LG-SAMSUNG EXHIBIT 1023
`HTC-LG-SAMSUNG EXHIBIT 1023
`
`

`

`US. Patent
`
`Aug. 18. 1998
`
`Sheet 1 of 11
`
`5,797,028
`
`aoEmEI9:0
`Ems.E9w>m
`
`.955
`
`zomEEamm:
`
`79".
`
`{0:52Pm:
`
`28in
`
`um“mm“
`
`om.
`
`
`
`k2_u._
`
`:13%:
`
`QED
`
`omuS
`
`.SEoE
`
`we“
`
`ago
`
`0:m2m2
`
`Page 2 of 20
`Page 2 of 20
`
`
`
`

`

`US. Patent
`
`Aug. 18., 1998
`
`Sheet 2 of 11
`
`5,797,028
`
`mcacm
`$20mam
`
`mow
`
`
`
`.929th>039“.
`
`5:25”.3:250
`
`
`
`can...oumtBE
`
`EoEwEwmw
`.cmEmmmcmE385;
`Exam3396385
`Egon.@950
`060..awn.
`
`=m_._wm
`
`mumtBE
`
`Ezmtmmmm:
`
`tom8.2.2:.
`
`NNN
`
`mEmcm
`
`«mm
`
`.955
`
`atom
`
`Page 3 of 20
`Page 3 of 20
`
`

`

`US. Patent
`
`Aug. 18, 1993
`
`Sheet 3 of 11
`
`5 ,797,028
`
`<m:\
`
`a;Y'-
`N
`
`.929.th
`cozoczu
`
`050..
`
`6:23.00
`EQOE
`
`03:25
`
`\Ezwm
`
`Egan.
`
`to;
`
`momth_
`
`$8922
`
`:25”.
`
`20¢
`
`mm:
`
`oomth.
`
`NNN
`
`Page 4 of 20
`Page 4 of 20
`
`

`

`US. Patent
`
`Aug. 18, 1998
`
`Sheet 4 of 11
`
`5,797,028
`
`e.9".
`
`06mm
`
`Eamomcmfi
`
`N3.
`
`I.
`
`52835...
`
`3%.
`
`mvv
`
`mg.»
`
`292.2
`
`vmvwage,
`
`SEE.
`
`O<D
`
`Sac.
`
`3%.
`
`vmvImm...»H23¢
`
`
`
`NWVuomE>Lwt0>coo
`
`Omkz
`
`L95...2.
`
`Sac.
`
`Page 5 of 20
`Page 5 of 20
`
`
`
`
`

`

`US. Patent
`
`Aug. 13, 1998
`
`Sheet 5 of 11
`
`5,797,028
`
`m.m_n_Hum;NNF
`
`x5352Em...
`98in
`
`ON“
`
`
`
`o:
`
`mm:
`
`v2.
`
`:62@292
`0622E2m>m
`
`
`
`935x:38¢
`
`I
`
`.92.
`
`ma
`
`NO“
`
`Duo
`
`Page 6 of 20
`Page 6 of 20
`
`
`
`
`
`

`

`US. Patent
`
`Aug. 18, 1998
`
`Sheet 6 of 11
`
`5,797,028
`
`mmhfik
`
`5:250
`
`92..
`
`2.5
`
`5:03:00
`
`EwEmmmcmE
`
`A-..T..____..
`(\Iy...
`N
`
`boEmE3m
`053823.982.;
`630mawe
`his0Exammm:mfizwm
`358:8fl
`5:82".280
`053._m__o=coo
`
`momtwi
`
`$65
`
`36ch
`
`$09:&
`
`NNN
`
`Page 7 of 20
`Page 7 of 20
`
`

`

`US. Patent
`
`Aug. 18, 1998
`
`Sheet 7 of 11
`
`5,797,028
`
`68350
`
`mofic<f
`
`X:
`
`mm“
`
`89>
`
`EEO—2
`
`Emam.965
`
`95\.
`
`
`
`IIIzom.atommm:
`
`Page 8 of 20
`Page 8 of 20
`
`
`
`

`

`US. Patent
`
`Aug. 18, 1998
`
`Sheet 8 of 11
`
`5,797,028
`
`w.9".
`
`.9:N95coacmaxwm
`
`F:
`
`co_mcqum_
`
`mam
`
`wantm
`
`mam5m
`
`03
`
`82>
`
`52:22
`
`Page 9 of 20
`Page 9 of 20
`
`
`
`
`

`

`US. Patent
`
`Aug. 18, 1998
`
`Sheet 9 of 11
`
`5,797,028
`
`HE
`
`camcmaxm
`
`mam
`
`maucm
`
`mamcoacmnxm
`
`82>mm“
`
`92 5:53.
`
`5.22
`
`boEmE
`
`
`
`XhogwwzWW».
`
`Page 10 of 20
`Page 10 of 20
`
`
`
`

`

`US. Patent
`
`Aug. 18, 1993
`
`Sheet 10 of 11
`
`5,797 ,028
`
`0m:.\
`
`2.9".
`
`530.”.
`
`EmEmmmcms.
`
`fiBcacma
`
`cozocnm
`
`050..
`
`38E
`
`5:05:00
`
`mothE
`
`zmcmm
`
`.285".
`
`tom
`
`85:25
`
`$6ch
`
`$093;
`
`awn.
`
`$822.2
`
`22$”.
`
`EOE
`
`_On_
`
`08:25
`
`9N
`
`mm:
`
`momtEE
`
`WNW
`
`Page 11 of 20
`Page 11 of 20
`
`

`

`US. Patent
`
`Aug. 18. 1998
`
`Sheet 11 of 11
`
`5,797,028
`
`$tx\
`
`3.9...—
`
`w:
`
`523mg;
`
`23:4
`
`823
`
`063
`
`:EE.>._.
`
`05mm
`
`52823...
`
`Sac—
`
`09.2
`
`65200
`
`Page 12 of 20
`Page 12 of 20
`
`

`

`5.797.028
`
`l
`COMPUTER SYSTEM HAVING AN
`IMPROVED DIGITAL AND ANALOG
`CONFIGURATION
`FIELD OF THE MENTION
`
`10
`
`15
`
`25
`
`35
`
`45
`
`SS
`
`The present invention relates to a computer system having
`separate digital and analog system chips which is optimized
`for real-time multimedia and communications applications.
`wherein the digital chip integrates digital portions of mu!-
`timedia and communications processing and the analog chip
`integrates analog portions of multimedia and communica-
`tions processing.
`DESCRIPTION OF THE RELATED ART
`
`Computer architectures generally include a plurality of
`devices interconnected by one or more various buses. For
`example. modern computer systems typically include a CPU
`coupled through bridge logic to main memory. The bridge
`logic also typically couples to a high bandwidth local
`expansion bus. such as the peripheral component intercon-
`nect (PCI) bus or the VESA {Video Electronics Standards
`Association) VI. bus. Examples of devices which can be
`coupled to local expansion buses include video accelerator
`cards. audio cards. telephony cards. SCSI adapters. network
`interface cards. etc. An older type expansion bus is generally
`coupled to the local expansion bus. Examples of such
`expansion buses included the industry standard architecture
`(ISA) bus. also referred to as the AT bus.
`the extended
`industry standard architecture (EISA) bus. or the ruicrochan-
`nel architecture (MCA) bus. Various devices may be coupled
`to this second expansion bus. including a fax/modem. sound
`card. etc.
`
`Personal computer systems were originally developed for
`business applications such as word processing and
`spreadsheets. among others. However. computer systems are
`currently being used to handle a number of real
`time
`applications.
`including multimedia applications having
`video and audio components. video captain: and playback.
`telephony applications. and speech recognition and
`synthesis. among others. These real that: applications typi»
`cally require a large amount of system resources and band-
`width.
`
`One problem that has arisen is that computer systems
`originally designed for business applications are not well
`suited for the realntirne requirements of modern multimedia
`and communications applications. For example. modern
`personal computer system ardutectnres still presume that
`the majority of applications executing on the computer
`system are non real-time business applications such as word
`processing andfor spreadsheet applications. which execute
`primarily on the main CPU. In general. computer systems
`have not traditionally been designed with multimedia antitru-
`communication hardware as part of the system. and thus the
`system is not optinfized for multimedia applications. Rather.
`multimedia andfor communication hardware is typically
`designed as an add-in card for optional
`insertion in an
`expansion bus of the computer system
`In many cases. multimedia hardware cards situated on an
`expansion bus do not have the required access to system
`memory and other system resources for proper operation. In
`addition. since the computer system architecture is not
`optimized for real—time applications. multimedia and com—
`munications hardware cards generally do not make efficient
`use of system resources. As an example. hardware cards
`which perfon'n video. audio andlor communications func—
`tions each typically include a digital portion which processes
`digital data and an analog portion which processes analog
`data.
`
`2
`For example. a video and includes digital circuitry which
`performs polygon rendering.
`texture mapping and other
`pixel manipulation operations. and also includes the digital
`memory portion of a RAMDAC (random access memory
`digital to analog converter). A video card also includes
`analog circuitry which performs the digital to analog con—
`version and generates RGB (red. green and blue) analog
`voltages which drive a video monitor. Likewise. a sound
`card includes digital circuitry which performs audio pro-
`cessing functions such as MIDI. wavetable synthesis. etc.
`and also includes analog circuitry to generate the appropriate
`analog audio signals that are provided to the speakers.
`As multimedia and communication applications become
`more prevalent. multimedia and communication hardware
`will correspondingly become essential components in per-
`sonal computer systems. Therefore. an improved computer
`system architecture is desired which is optimized for mul-
`timedia and communication applications as well as for
`non—reaitirne applications.
`
`SUNNARY OF THE INVENTION
`
`invention comprises a computer system
`The present
`which provides increased performance over current com-
`puter architectures. The computer system of the present
`inVention includes a digital system chip which performs
`various digital functions. including multimedia and commu—
`nication functions. and a separate analog chip which per-
`forms analog functions. Thus the present invention opti-
`mizes silicon use and design by splitting up digital and
`analog functions on separate chips. The system of the
`present invention also separates digital noise from analog
`noise. allowing a higher degree of integration while increas—
`ing stability.
`the computer system
`In the preferred embodiment.
`includes a CPU coupled through chip set or bridge logic to
`main memory. The bridge logic also couples to a local
`expansion bus such as the PCI bus. Various devices may be
`conneaed to the PCI bus. including a network interface
`card. as well as other peripherals. The bridge logic and main
`memory also couple to a digital system chip which performs
`various digital functions in the computer system. In one
`embodiment. the digital system chip couples directly to the
`CPU and main memory. and the digital system chip includes
`the PCI bridge logic. the main memory controller logic. and
`other chipset logic.
`The digital system chip includes one or more DSPengines
`that perform video. graphics. audio andlor telephony appli-
`cations. 'I‘he DSP engines may comprise either dedicated
`video. audio andlor communication engines or general pur—
`pose DSP engines. The digital system chip also performs
`various digital operations in the computer system. including
`one or more of power management functions. floppy con—
`troller functions. serial and parallel IIO port functions. and
`hard disk interface functions. As desired. the digital system
`chip may perform other functions. including. ElDE support
`and SCSI support. Thus the digital system chip performs a
`number of real—time digital functions. including audio and
`video functions. as well as others.
`
`An analog system chip is connected directly to the digital
`system chip and performs various analog functions. includ—
`ing analog-to—digital (AID) conversion and digital to analog
`(DEA) conversion for various functions. including video.
`audio. modem functionality. and a telephone handset. among
`others. In one embodiment. the analog system chip only
`includes analog portions of the ND and DIA logic
`functionality. and the digital portion of the AID and DIA
`
`Page 13 of 20
`Page 13 of 20
`
`

`

`5.797.028
`
`3
`logic is comprised in the digital system chip. The analog
`system chip further includes video ports for coupling to a
`video monitor. audio ports for coupling to an audio DAC or
`speakers. and one or more communication ports for trans-
`ferring analog information. In one embodiment. the analog
`system chip includes one or more of a radio transceiver.
`infrared (IR) transceiver. analog mixer. and a NTSC
`(National Television Standards Committee) converter. The
`analog system chip further includes analog inputs for receiv—
`ing input from various peripherals. such as a microphone-
`CD-ROM. stereo system and TV tuner. among others.
`In an alternate embodiment.
`the digital system chip
`couples to the PCI bus. The digital system chip may be
`comprised on the motherboard or. alternatively. the digital
`chip is comprised on a modular expansion card adapted for
`insertion into a connector slot on the PCI bus. thus allowing
`for improved modularity and upgradeability. The analog
`system chip preferably couples directly to the digital system
`chip. and the analog system chip couples to various
`peripherals. including a monitor and speakers.
`In one embodiment.
`the computer system includes a
`separate intermediate bus coupled between the digital sys—
`tern chip and the analog system chip. In this embodiment.
`one or more digital system chips are coupled to the PCI bus.
`wherein the one or more digital system chips connect to the
`intermediate bus. One or more analog system chips are also
`coupled to the intermediate bus. This configuration allow
`for improved modularity and upgradeability. This configu-
`ration also allows communication between each of the
`digital system chips and analog system chips. as well as
`communication between the respective digital system chips
`and communication betWeen the respective analog system
`chips.
`Therefore. the present invention comprises a novel com-
`puter system architecture which increases the performance
`of real—time appLications. A dedicated digital system chip is
`included in the system which performs various digital mul»
`timedia and communication operations. and an analog sys~
`tern chip is coupled directly to the digital system chip which
`performs various corresponding analog functions. This sepa-
`ration of digital and analog functionality optimizes silicon
`use and reduces noise issues while also providing improved
`performance.
`BRIEF DESCRIPTION OF THE DRAWINGS
`
`A better understanding of the present invention can be
`obtained when the following detailed description of the
`preferred embodiment is considered in conjunction with the
`following drawings. in which:
`FIG. 1 is a block diagram of a computer system including
`a digital system chip and an analog system chip according to
`the preferred embodiment of the pesent invention:
`FIG. 2 is a block diagram of the digital system chip of
`FIG. 1;
`FIG. 3 is a block diagram of an alternate embodiment of
`the digital system chip of FIG. 1 according to the present
`invention;
`FIG. 4 is a bloolt diagram of the analog system chip of
`FIG. 1;
`FIG. 5 is a block diagram of a computer system including
`a digital system chip and an analog chip according to an
`alternate embodiment of the present invention:
`FIG. 6 is a block diagram of the digital system chip of
`FIG. 5:
`
`FIG. 7 is a block diagram of a computer system including
`a digital system chip and an analog chip according to a third
`embodiment of the present invention:
`
`4
`
`FIG. 8 is a block diagram of a computer system including
`digital and analog system chips coupled to a PCI expansion
`bus according to an alternate embodiment of the present
`invention;
`FIG. 9 illustrates the computer system of FIG. 8 including
`a plurality of digital and analog system chips. wherein the
`system includes a bus comprised between the digital and
`analog system chips:
`FIG. 10 is a block diagram of the digital system chip of
`FIGS. 8 and 9: and
`
`FIG. 11 is a block diagram of the analog system chip of
`FIGS. 8 and 9.
`
`DETAILED DESCRIPTION OF THE
`PREFERRED EMBODINIEI‘IT
`Incorporation by Reference
`PCI System Architecture by Tom Shanley and Don Ander-
`son and available from Mindshare Press. 2202 Buttercup
`Dr.. Richardson. Tex. 75082 (214) 231-2216.
`is hereby
`incorporated by reference in its entirety.
`The Intel Peripherals Handbook. 1994 and 1995 editions.
`available from Intel Corporation. are hereby incorporated by
`reference in their entirety. Also. data sheets on the Intel
`82430FX PCIset chipset. also referred to as the ”hitch
`chipset. are hereby incorporated by reference in their
`entirety. including the 82430 Cache Memory Subsystem
`data sheet (Order No. 290482-004). the 82420182430 PCIsct
`ISA and EISA bridge data sheet (Order No. 290483-004).
`and the Intel 324wa PCIset Product Brief (Order No.
`297559-001). all of which are available from Intel
`Corporation. literature Sales. PO. Box 7641. Mt. Prospect.
`Ill. 60056-7641 (1800-8794683). and all of which are
`hereby incorporated by reference in their entirety.
`U.S. Pat. No. 4.994.301 titled “Apparatus Adaptable for
`Use in Efi’ecting Communication Between an Analog Device
`and a Digital Device“. which was filed on Oct. 30. 1989. and
`which issued Feb. 19. 1991. whose inventors are Saf Asghar.
`John Bartkowialt. and Mild Moyal. and which is assigned to
`Advanced Micro Devices Corporation. is hereby inccnpo—
`rated by reference in its entirety.
`Computer System Block Diagram
`Referring now to FIG. 1. a block diagram of a computer
`system according to the present invention is shown. As
`shown. the computer system includes a central processing
`unit {CPU} 102 which is coupled through a CPU local bus
`to a hostiPCIlcadie bridge or chipset 106. The chipset
`includes arbitration logic 107 as shown. The chipset 106 is
`preferably similar to the Triton chipset available from Intel
`Corporation. A second level or L2 cache memory {not
`shown) may be coupled to a cache controller in the chipset.
`as desired. The bridge or chipset [06 couples through a
`memory bus 108 to main memory 110. The main memory
`110 is preferably DRAM (dynamic random access memory}
`or EDO (extended data out) memory. as desired.
`The hosb'Plecache bridge or dripset 106 also interfaces
`to a peripheral component interconnect (PCI) bus 120. In the
`preferred embodiment. a PCI local bus is used. However. it
`is noted that other local buses may be used. such as the
`VESA (Video Electronics Standards Association) VI. bus.
`Various types of devices may be connected to the PCI bus
`120.
`
`10
`
`15
`
`’20
`
`25
`
`3t)
`
`35
`
`45
`
`55
`
`65
`
`In the embodiment shown in FIG. 1. a digital system chip
`112 according to the present invention is coupled to the
`chipset 106. The digital system chip 112 performs various
`digital functions. including multimedia functions such as
`video and audio. as discussed further below. The digital
`system chip 112 includes a Universal Serial Bus (USE)
`
`Page 14 of 20
`Page 14 of 20
`
`

`

`5
`
`5.797.028
`
`6
`
`10
`
`15
`
`25
`
`interface. The
`interface as well as a paralleUseriai port
`digital system chip 112 also preferably includes an ISDN
`(Integrated Services Digital Network) interface. The digital
`system chip 112 also preferably couples to floppy drive 141.
`Various other devices may be coupled to the digital system
`chip 112. such as a hard drive or other digital devices. 'lhe
`digital system chip 112 preferably only comprises digital
`circuitry.
`The digital system chip 112 preferably communicates
`with devices on the PCI bus 120 through the chipset 106. In
`one embodiment. the digital system chip 112 includes a PCI
`interface for coupling directly to the PCI bus 120. In this
`embodiment. the digital system chip 112 can arbitrate for the
`PCI bus and can communicate directly with devices on the
`PCI bus with less involvement of the chipset logic 106, The
`digital system chip 112 is also preferably coupled to other
`devices in the computer system to perform power manage—
`ment functions. as well as other functions. as desired.
`An analog system chip 114 is coupled to the digital system
`chip 112. The analog system chip 114 performs various
`analog functions.
`including analog to digital (ND)
`conversion. digital to analog (BIA) conversion. and modem
`functionality. among others. The analog system chip 114 is
`coupled to provide outputs to various analog devices.
`including a video monitor 132 and speakers 134. The analog
`system chip 114 also includes an analog modem output 136
`for coupling to a telephone line.The analog system chip 114
`also couples to various devices to receive various analog
`inputs. including a microphone 142. a (ID-ROM 144. and a
`TV tuner 146. It is noted that only the analog output of the
`CD-ROM is provided to the analog system chip 1.14. The
`analog system chip 114 preferably substantially comprises
`analog circuitry. and preferably only includes digital “front-
`end“ circuitry for interfacing to the digital system chip 112.
`Various devices may be coupled to the PCI bus 120. For
`example. a hard disk 12 and a network interface controller
`124 are shown coupled to the PCI bus 120. A SCSI (small
`computer systems tutu-face) adapter (not shown) may also
`be coupled to the PCI bus 120. In one embodiment. the
`digital system chip 112 includes a hard disk interface for
`coupling to a hard disk and a SCSI interface for coupling to
`SCSI devices. In addition. the digital system chip 112 may
`also include network interface circuitry such as Ethernet or
`token ring circuitry for interfacing to a network. However. in
`the preferred embodiment. the digital system chip 112 does
`not include network circuitry. but rather network functions
`are performed by a modular network card coupled to the PC]
`bus 120. Various other devices may be connected to the PCI
`bus 120. as is well known in the art
`Expansion bus bridge logic (not shown} is also preferably
`coupled to the PCI bus 120. The expansion bus bridge logic
`interfaces to an expansion bus (not shown). The expansion
`bus may be any of varying types. including the industry
`standard architecture (ISA) bus. also referred to as the AT
`bus. the extended indusn'y standard architecture (EISA) bus.
`or the microchannel architecture (RICA) bus. Various
`devices may be coupled to the expansion bus. such as
`expansion bus memory (not shown).
`Digital System Chip Block Diagram
`Referring now to FIG. 2. a more detailed block diagram
`illustrating the digital system chip 112 is shown. The digital
`system chip 112 includes a connector 201 for connecting to
`analog system chip 114. and also includes a connector 203
`for coupling to the chipset logic 106. Although not shown in
`FIG. 2. the various devices in the digital system chip 112 are
`interconnected through respective data channels or signal
`traces to form a functional unit. The digital system chip 112
`
`also preferably includes one or more inputi’outpul (U0)
`channels for transmitting data to the analog system chip 114
`and to the chipset logic 106.
`In the preferred embodiment shown in FIG. 2. the digital
`system chip 112 includes a videofgraphics engine 202 which
`performs video and graphics operations such as polygon
`rendering. texture mapping. and other pixel manipulation
`operations. among others. The videoigraphics engine 202
`performs operations similar to currently available graphics
`accelerators from companies such as SS. Tseng. Weitek. and
`others. The digital system chip 112 may also include a
`dedicated MPEG (Motion Pictures Electronics Group)
`decoder (not shown).
`The digital system chip 112 also includes an audio engine
`204 which performs digital audio processing operations such
`as MJDI and wavetable synthesis. among others. the audio
`engine 294 performs operations similar to currently avail»
`able sound cards such as SoundBlaster or SoundBlaster-
`compatible cards.
`The digital system chip 112 also preferably includes a
`general purpose DSP engine 206 which is programmable to
`perform various functions. such as MPEG decoding. LZ
`compression. and other advanced video. audio. andior com-
`munications functions. A read only memory (ROM) 20‘? is
`preferably coupled to the DSP Engine 206 which stores
`instructions for use by the DSP Engine 206. Alternatively. a
`non-volatile RAM or SRAM is used which receives down-
`loadable instructions from the main memory 110. In one
`embodiment. the DSP engine 206 is a dedicated communi-
`cation engine which performs digital communication
`operations. such as ISBN operations andior
`telephony
`operations. In another embodiment. the digital system chip
`112 includes a dedicated communication engine (not shown)
`in addition to the general purpose DSP engine 206. and the
`dedicated communication engine performs ISBN andfor
`telephony operations.
`In one embodiment. the digital system chip 112 includes
`multimedia memory {not shown) for storing multimedia
`data. such as video data and audio data. The multimedia
`memory corresponds to video RAM (VRAM) found on
`current video accelerator cards. and is also used for storing
`audio data as well as other multimedia and communications
`data. The multimedia memory preferably comprises VRAM.
`DRAM (dynamic RAM}. SRAM [static RAM). or EDO
`(extended data out) RAM. as desired. Allin-natively. the
`multimedia memory is located elf-chip and is coupled
`directly to the digital system chip 112.
`In one embodiment. the digital system chip 112 does not
`include multimedia memory. but rather video data and audio
`data are stored in the system memory 110 according to a
`unified memory architecture. In this embodiment. the digital
`system chip 112 preferably includes a memory buffer 234
`and a direct memory access (DMA) engine 236 for trans-
`ferring data from the main memory 110 to the memory
`buffer 234 in the digital system chip 112.
`In one embodiment. the video engine 202 and audio
`engine 204 couple through one or more U0 channels to
`respective digital [)0 ports 232. including video and audio
`ports. The digital video port is included for providing digital
`video data to peripheral devices. such as an MPEG decoder
`or a digital video display. The digital audio port is included
`for providing digital audio data to digital peripheral devices.
`such as for external mixing. as desired In an embodiment
`which includes a dedicated communication engine.
`the
`digital system chip 112 preferably includes one or more
`digital communication ports 232 for coupling to an ISDN
`line or other digital line.
`
`35
`
`4-5
`
`55
`
`65
`
`Page 15 of 20
`Page 15 of 20
`
`

`

`7
`
`5.797.028
`
`8
`
`store microcode corresponding to video. audio and commu-
`nication processing instructions. or receive downloadable
`microcode from the system memory 110.
`Analog System Chip
`Refen'ing now to FIG. 4. the analog system chip 114 is
`shown. In the preferred embodiment shown in FIG. 4. the
`analog system chip 114 includes analog to digital (AID)
`circuitry 402 and digital to analog (BIA) clrcuihy 404. The
`analog system chip 114 preferably includes ND and BM
`logic for video. audio. modem and telephone handset func-
`tionality. In the preferred embodiment. the analog system
`chip 114 include a single AID converter and a single DIA
`converter for all of the above functions. Alternatively. the
`ND circuitry block 402 and the BIA circuitry block 404
`each include a plurality of ND converters and a plurality of
`WA converters. respectively. for each of the above func~
`tions.
`
`10
`
`15
`
`the digital system chip 112 also preferably
`As shown.
`includes a USB (Universal Serial Bus) interface 222 for
`interfacing to a Universal Serial Bus. The Universal Serial
`Bus is a bus specification proposed by Microsoft and Intel
`which is designed to replace the various peripheral connec-
`tors on current PCs with a single connector for most
`peripherals. such as keyboards. mice. monitors. and other
`devices. The digital system chip 112 also preferably includes
`scrialr'parallel port interface logic 224 for providing a serial
`port and a parallel port. The serial/parallel port interface
`logic 224 preferably implements a universal asynchronous
`receivert‘transmitter (HART). The digital system chip I12
`also preferably includes a floppy controller interface 226 for
`interfacing to floppy drive 141. The digital system chip 112
`may include other functions. including EIDE support and
`SCSI support.
`In the preferred embodiment. the digital system chip 112
`includes video processing circuitry andlor firmware com-
`prised in the video engine 202. including the digital portion
`of a random access memory digital to analog converter
`(RAMDAC). including the random access memory (RAM)
`260 of the RAMDAC. As described below.
`the analog
`system drip 114 preferably includes the analog portion of
`the RAMDAC and associated logic circuiu-y for converting
`video data into appropriate analog signals. preferably red.
`green and blue (RG13) signals. for output directly to video
`monitor 132. as described below.
`The digital system chip 112 may also include various
`peripheral function logic 228. including an interrupt system.
`a real time clock (ETC) and timers. a direct memory access
`(DMA) system. and ROMlFlash memory. Other peripherals
`may be comprised in the peripheral function logic 228 in the
`digital system chip 112. including communications ports.
`diagnostics ports. commandr‘status registers. and non-
`volatile static random access memory (NVSRAM). The
`digital system chip 112 also preferably includes modem
`logic which performs digital modulator“ and demodulator
`functions.
`Alienate Embodiment
`
`25
`
`35
`
`In one embodunent. the analog system chip 114 includes
`only the analog circuitry portion of the ND and DIA logic.
`and the digital portion ofthis logic is comprised in the digital
`system chip 112. Thus. assuming a simple sigma delta
`converter. the digital system chip 112 includes digital noise
`filter circuitry which moves in-band noise to out-ol—band
`noise. as well as other digital ND and Dirt logic. and the
`analog system chip 114 includes the analog circuitry portion
`of the AID and BM which receives and/or produces the
`analog signals.
`The analog system chip 114 also includes various input
`ports and input circuitry such as TV tuner input circuitry
`412. CD-ROM input circuitry 414. and microphone input
`circuitry 416. The TV tuner input circuitry 412 includes a
`NTSC (National Television Standards Committee) con-
`verter. The CD-ROM input circuitry 414 is adapted for
`interfacing to a CD-ROM. The microphone input circuitry
`416 is adapted for interfacing to a microphone.
`The analog system chip 114 also includes a radio trans-
`ceiver 442. an infrared (IR) transceiver 444. and a plurality
`of audio system inputs 446 for coupling to the outputs of an
`audio entertainment system The analog system chip 114
`also may include one or more line level inputs and synthe-
`sizer inputs. among others. The analog system chip 114 also
`includes mixers 406 for performing analog signal mixing
`and a voltage inverter 454. as well as one or more filters and
`digital tone control logic (not shown).
`The analog system chip 114 includes video pert circuin
`422 connected to video port 432 and audio port circuitry 424
`connected to audio port 434. In one embodiment. the video
`channel between the video port circuitry 422 and video port
`432 and the audio channel between the audio port circuitry
`424 and the audio port 434 are preferably synchronized with
`each other to ensure synchronized audio and video during
`multimedia presentations.
`The analog system chip 114 also includes modem cir—
`cuitry 426 which connects to a modem port 436. The modem
`circuitry 426 preferably includes DAA (data access
`arrangement) logic. which is analog logic that interfaces
`between the modern and the phone line and perfonns ring
`detect. and two wire to four wire hybrid functions. among
`other functions.
`
`Referring now to FIG. 3. in an alternate embodiment.
`digital system chip 112A includes one or more general
`purpose DSP engines. preferably three DSP engines 242.
`244. and 246. which preferably perform video. audio and
`communication processing functions. In this embodiment.
`the DSP engine 242 performs video processing functions.
`the DSP engine 244 performs audio processing functions.
`and the DSP engine 246 performs communication process-
`ing functions as well as other real-time functions. In one
`embodiment. each DSP engine 242. 244. and 246 includes
`one or more ROMS or RAMs 207 which store microcode
`corresponding to video. audio and communications process-
`mg.
`
`45
`
`In one embodiment. the DSP engines 242. 244. and 246
`are not assigned specific functions. but rather each DSP
`engine is dynamically assigned tasks such as video. audio or
`communications functions by a real-time operating system
`executing on the CPU 102. For example.
`in this
`embodiment. the Intel lA-Spox operating system executes
`on the CPU 102 to control the DSP engines in the digital
`system chip 112A and assigned tasks to each of the engines.
`In an alternate embodiment. the digital system chip 112A
`includes only one DSP engine which preferably performs
`video and audio processing functions. In this embodiment.
`the DSP engine is a general purpose DSP engine that
`performs both video and audio processing functions as well
`as other real-time functions. In this embodiment. the single
`DSP engine includes one or more ROM or RAMs 207 which
`
`SS
`
`65
`
`Page 16 of 20
`Page 16 of 20
`
`In die preferred embodiment. as mentioned above. the
`digital system chip 112 includes video processing circuitry
`andlor firmware. including the digital portion of a random
`ac