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`MICROELECTRONIC
`DEVICES AND CIRCUITS
`
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`Page 1 of 4
`
`Clifton G. Fonstad
`Department of Electrical Engineering
`and Computer Science
`Massachusetts Institute of Technology
`
`3 =;
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`FE
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`New York’ St. Louis San Francisco Auckland Bogotzi
`Caracas Lisbon London Madrid Mexico City Milan
`Montreal New Delhi
`San Juan Singapore Sydney Tokyo Toronto
`
`McGraW-Hill, Inc.
`
`SAMSUNG EXHIBIT 2009
`
`NVIDIA V. SAMSUNG
`
`Trial IPR2015-01327
`
`Page 1 of 4
`
`SAMSUNG EXHIBIT 2009
`NVIDIA v. SAMSUNG
`Trial IPR2015-01327
`
`

`
`Dedicated to the memory of my father, Clifton G. Fonstad, Sr.
`
`This book was set in Times Roman by Publication Services.
`The editors were Anne T. Brown and John M. Morriss;
`the production supervisor was Denise L. Puryear.
`The cover was designed by John Hite.
`Project supervision was done by Publication Services.
`R. R. Donnelley & Sons Company was printer and binder.
`
`MICROELECTRONIC DEVICES AND CIRCUITS
`
`Copyright © 1994 by McGraw—Hill, Inc. All rights reserved. Printed in the United States of Amer-
`ica. Except as permitted under the United States Copyright Act of 1976, no part of this publication
`may be reproduced or distributed in any form or by any means, or stored in a data base or retrieval
`system, without the prior written permission of the publisher.
`
`This book is printed on recycled, acid—free paper containing
`10% postconsumer waste.
`
`234567890 DOCDOC 90987654
`
`ISBN 0-07-021496-4
`
`Library of Congress Cataloging-in-Publication Data
`
`Fonstad, Clifton G.
`Microelectronic devices and circuits / Clifton G. Fonstad.
`p.
`cm. — (McGraw-Hill series in electrical and computer
`engineering. Electronics and VLSI circuits)
`Includes index.
`ISBN 0-07-02l496—4
`2. Electric circuit analysis.
`1. Microelectronics.
`circuits, Nonlinear.‘
`I. Title. H. Series.
`TK7874.F645
`1994
`621 .381—dc20
`
`3. Electric
`
`93-32500
`
`Page 2 of 4
`
`

`
`a number
`
`' 0; (b) by
`1d ground.
`
`CHAPTER
`
`9
`
`THE MOS
`CAPACITOR
`
`In modern semiconductor electronics there are a number of fundamental structures,
`including the p—n junction, the metal-semiconductor contact, and the metal-oxide-
`semiconductor capacitor. We discussed p-n junctions in Chaps. 6 and 7, and
`Appendix E deals with metal—serniconductor contacts. In this chapter we focus
`our attention on the metal—oxide—semiconductor (MOS) capacitor structure.
`The MOS capacitor forms the heart of an important family of devices called
`MOS field eflect transistors, or MOSFETS. In much the same Way that under-
`standing p—n junctions is central to understanding the operation of bipolar junc—
`tion transistors, understanding the MOS capacitor is central to understanding the
`operation of MOSFETS. The MOS capacitor is also a useful device in its own
`right (i.e., as a capacitor), and the MOS capacitor structure is also useful as an
`optical sensor.
`We will begin our study of the MOS capacitor in this chapter by looking at
`this structure in thermal equilibrium. We will then study what happens when we
`apply voltage to an MOS capacitor and look at the unique features that make the
`MOS capacitor so useful in devices.
`
`9.1 THE MOS CAPACITOR IN THERMAL
`EQUILIBRIUM
`
`To form an MOS capacitor we start with a sample of uniformly doped semicon-
`ductor, say p-type silicon, with an ohmic contact on one side. The other side is
`covered with a thin insulating layer; in the case of silicon this is usually silicon
`dioxide, SiO2, or a combination of silicon dioxide and silicon nitride, Si3N4. A
`thin film of metal—aluminum is a common example—deposited on this insula-
`
`241
`
`Page 3 of 4
`
`

`
`THE MOS CAPACITOR
`
`243
`
`-61%
`
`(6)
`
`FIGURE 9.2
`(a) One-dimensional MOS capacitor structure with its terminals shorted and in
`thermal equilibrium; (b) the variation in the electrostatic potential relative to
`intrinsic silicon through this structure; and (c) the corresponding net charge
`distribution.
`
`9.2. 1 Flat—band
`
`to the left-hand capacitor electrode,
`first applying a voltage val;
`Consider
`which we label G for “gate,” relative to the ohmic contact, which we la-
`bel B for “back,” that
`is negative. The potential at
`the interface between
`the oxide and the semiconductor, q.'>(O), decreases toward (bp, and the deple-
`tion region width also decreases. At the same time the positive charge is re-
`moved from the capacitor electrode (i.e., at x = —to). For some particular
`applied voltage,
`there will be no depletion of the semiconductor and the po-
`tential at
`the surface of the semiconductor will equal
`that
`in its bulk [i.e.,
`¢(0) = gbp]. This situation,
`illustrated in Figs. 9.3a and b,
`is called the flat-
`band condition, and the corresponding applied voltage VFB is an important
`
`Page 4 of 4

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